OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * This program is free software; you can redistribute it and/or |
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3 | * modify it under the terms of the GNU General Public License |
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4 | * as published by the Free Software Foundation; either version 2 |
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5 | * of the License, or (at your option) any later version. |
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6 | * |
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7 | * This program is distributed in the hope that it will be useful, |
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8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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10 | * GNU General Public License for more details. |
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11 | * |
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12 | * Copyright (C) 2013 John Crispin <blogic@openwrt.org> |
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13 | * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com> |
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14 | */ |
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15 | |||
16 | #include <linux/if.h> |
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17 | #include <linux/module.h> |
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18 | #include <linux/init.h> |
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19 | #include <linux/list.h> |
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20 | #include <linux/if_ether.h> |
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21 | #include <linux/skbuff.h> |
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22 | #include <linux/netdevice.h> |
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23 | #include <linux/netlink.h> |
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24 | #include <linux/bitops.h> |
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25 | #include <net/genetlink.h> |
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26 | #include <linux/switch.h> |
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27 | #include <linux/delay.h> |
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28 | #include <linux/phy.h> |
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29 | #include <linux/netdevice.h> |
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30 | #include <linux/etherdevice.h> |
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31 | #include <linux/lockdep.h> |
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32 | #include <linux/workqueue.h> |
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33 | #include <linux/of_device.h> |
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34 | |||
35 | #include "mt7530.h" |
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36 | |||
37 | #define MT7530_CPU_PORT 6 |
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38 | #define MT7530_NUM_PORTS 8 |
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39 | #ifdef CONFIG_SOC_MT7621 |
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40 | #define MT7530_NUM_VLANS 4095 |
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41 | #else |
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42 | #define MT7530_NUM_VLANS 16 |
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43 | #endif |
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44 | #define MT7530_MAX_VID 4095 |
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45 | #define MT7530_MIN_VID 0 |
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46 | |||
47 | #define MT7530_PORT_MIB_TXB_ID 2 /* TxGOC */ |
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48 | #define MT7530_PORT_MIB_RXB_ID 6 /* RxGOC */ |
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49 | |||
50 | #define MT7621_PORT_MIB_TXB_ID 18 /* TxByte */ |
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51 | #define MT7621_PORT_MIB_RXB_ID 37 /* RxByte */ |
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52 | |||
53 | /* registers */ |
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54 | #define REG_ESW_VLAN_VTCR 0x90 |
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55 | #define REG_ESW_VLAN_VAWD1 0x94 |
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56 | #define REG_ESW_VLAN_VAWD2 0x98 |
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57 | #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2)) |
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58 | |||
59 | #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30) |
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60 | #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28) |
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61 | #define REG_ESW_VLAN_VAWD1_VALID BIT(0) |
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62 | |||
63 | /* vlan egress mode */ |
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64 | enum { |
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65 | ETAG_CTRL_UNTAG = 0, |
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66 | ETAG_CTRL_TAG = 2, |
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67 | ETAG_CTRL_SWAP = 1, |
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68 | ETAG_CTRL_STACK = 3, |
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69 | }; |
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70 | |||
71 | #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8)) |
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72 | #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8)) |
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73 | #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8)) |
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74 | |||
75 | #define REG_HWTRAP 0x7804 |
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76 | |||
77 | #define MIB_DESC(_s , _o, _n) \ |
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78 | { \ |
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79 | .size = (_s), \ |
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80 | .offset = (_o), \ |
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81 | .name = (_n), \ |
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82 | } |
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83 | |||
84 | struct mt7xxx_mib_desc { |
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85 | unsigned int size; |
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86 | unsigned int offset; |
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87 | const char *name; |
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88 | }; |
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89 | |||
90 | static const struct mt7xxx_mib_desc mt7620_mibs[] = { |
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91 | MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT0, "PPE_AC_BCNT0"), |
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92 | MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT0, "PPE_AC_PCNT0"), |
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93 | MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT63, "PPE_AC_BCNT63"), |
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94 | MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT63, "PPE_AC_PCNT63"), |
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95 | MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT0, "PPE_MTR_CNT0"), |
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96 | MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT63, "PPE_MTR_CNT63"), |
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97 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GBCNT, "GDM1_TX_GBCNT"), |
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98 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GPCNT, "GDM1_TX_GPCNT"), |
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99 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_SKIPCNT, "GDM1_TX_SKIPCNT"), |
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100 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_COLCNT, "GDM1_TX_COLCNT"), |
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101 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GBCNT1, "GDM1_RX_GBCNT1"), |
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102 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GPCNT1, "GDM1_RX_GPCNT1"), |
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103 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_OERCNT, "GDM1_RX_OERCNT"), |
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104 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FERCNT, "GDM1_RX_FERCNT"), |
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105 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_SERCNT, "GDM1_RX_SERCNT"), |
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106 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_LERCNT, "GDM1_RX_LERCNT"), |
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107 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_CERCNT, "GDM1_RX_CERCNT"), |
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108 | MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FCCNT, "GDM1_RX_FCCNT"), |
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109 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GBCNT, "GDM2_TX_GBCNT"), |
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110 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GPCNT, "GDM2_TX_GPCNT"), |
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111 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_SKIPCNT, "GDM2_TX_SKIPCNT"), |
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112 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_COLCNT, "GDM2_TX_COLCNT"), |
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113 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GBCNT, "GDM2_RX_GBCNT"), |
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114 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GPCNT, "GDM2_RX_GPCNT"), |
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115 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_OERCNT, "GDM2_RX_OERCNT"), |
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116 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FERCNT, "GDM2_RX_FERCNT"), |
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117 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_SERCNT, "GDM2_RX_SERCNT"), |
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118 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_LERCNT, "GDM2_RX_LERCNT"), |
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119 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_CERCNT, "GDM2_RX_CERCNT"), |
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120 | MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FCCNT, "GDM2_RX_FCCNT") |
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121 | }; |
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122 | |||
123 | static const struct mt7xxx_mib_desc mt7620_port_mibs[] = { |
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124 | MIB_DESC(1, MT7620_MIB_STATS_PORT_TGPCN, "TxGPC"), |
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125 | MIB_DESC(1, MT7620_MIB_STATS_PORT_TBOCN, "TxBOC"), |
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126 | MIB_DESC(1, MT7620_MIB_STATS_PORT_TGOCN, "TxGOC"), |
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127 | MIB_DESC(1, MT7620_MIB_STATS_PORT_TEPCN, "TxEPC"), |
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128 | MIB_DESC(1, MT7620_MIB_STATS_PORT_RGPCN, "RxGPC"), |
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129 | MIB_DESC(1, MT7620_MIB_STATS_PORT_RBOCN, "RxBOC"), |
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130 | MIB_DESC(1, MT7620_MIB_STATS_PORT_RGOCN, "RxGOC"), |
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131 | MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC1N, "RxEPC1"), |
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132 | MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N, "RxEPC2") |
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133 | }; |
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134 | |||
135 | static const struct mt7xxx_mib_desc mt7621_mibs[] = { |
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136 | MIB_DESC(1, MT7621_STATS_TDPC, "TxDrop"), |
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137 | MIB_DESC(1, MT7621_STATS_TCRC, "TxCRC"), |
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138 | MIB_DESC(1, MT7621_STATS_TUPC, "TxUni"), |
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139 | MIB_DESC(1, MT7621_STATS_TMPC, "TxMulti"), |
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140 | MIB_DESC(1, MT7621_STATS_TBPC, "TxBroad"), |
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141 | MIB_DESC(1, MT7621_STATS_TCEC, "TxCollision"), |
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142 | MIB_DESC(1, MT7621_STATS_TSCEC, "TxSingleCol"), |
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143 | MIB_DESC(1, MT7621_STATS_TMCEC, "TxMultiCol"), |
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144 | MIB_DESC(1, MT7621_STATS_TDEC, "TxDefer"), |
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145 | MIB_DESC(1, MT7621_STATS_TLCEC, "TxLateCol"), |
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146 | MIB_DESC(1, MT7621_STATS_TXCEC, "TxExcCol"), |
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147 | MIB_DESC(1, MT7621_STATS_TPPC, "TxPause"), |
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148 | MIB_DESC(1, MT7621_STATS_TL64PC, "Tx64Byte"), |
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149 | MIB_DESC(1, MT7621_STATS_TL65PC, "Tx65Byte"), |
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150 | MIB_DESC(1, MT7621_STATS_TL128PC, "Tx128Byte"), |
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151 | MIB_DESC(1, MT7621_STATS_TL256PC, "Tx256Byte"), |
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152 | MIB_DESC(1, MT7621_STATS_TL512PC, "Tx512Byte"), |
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153 | MIB_DESC(1, MT7621_STATS_TL1024PC, "Tx1024Byte"), |
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154 | MIB_DESC(2, MT7621_STATS_TOC, "TxByte"), |
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155 | MIB_DESC(1, MT7621_STATS_RDPC, "RxDrop"), |
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156 | MIB_DESC(1, MT7621_STATS_RFPC, "RxFiltered"), |
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157 | MIB_DESC(1, MT7621_STATS_RUPC, "RxUni"), |
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158 | MIB_DESC(1, MT7621_STATS_RMPC, "RxMulti"), |
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159 | MIB_DESC(1, MT7621_STATS_RBPC, "RxBroad"), |
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160 | MIB_DESC(1, MT7621_STATS_RAEPC, "RxAlignErr"), |
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161 | MIB_DESC(1, MT7621_STATS_RCEPC, "RxCRC"), |
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162 | MIB_DESC(1, MT7621_STATS_RUSPC, "RxUnderSize"), |
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163 | MIB_DESC(1, MT7621_STATS_RFEPC, "RxFragment"), |
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164 | MIB_DESC(1, MT7621_STATS_ROSPC, "RxOverSize"), |
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165 | MIB_DESC(1, MT7621_STATS_RJEPC, "RxJabber"), |
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166 | MIB_DESC(1, MT7621_STATS_RPPC, "RxPause"), |
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167 | MIB_DESC(1, MT7621_STATS_RL64PC, "Rx64Byte"), |
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168 | MIB_DESC(1, MT7621_STATS_RL65PC, "Rx65Byte"), |
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169 | MIB_DESC(1, MT7621_STATS_RL128PC, "Rx128Byte"), |
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170 | MIB_DESC(1, MT7621_STATS_RL256PC, "Rx256Byte"), |
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171 | MIB_DESC(1, MT7621_STATS_RL512PC, "Rx512Byte"), |
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172 | MIB_DESC(1, MT7621_STATS_RL1024PC, "Rx1024Byte"), |
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173 | MIB_DESC(2, MT7621_STATS_ROC, "RxByte"), |
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174 | MIB_DESC(1, MT7621_STATS_RDPC_CTRL, "RxCtrlDrop"), |
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175 | MIB_DESC(1, MT7621_STATS_RDPC_ING, "RxIngDrop"), |
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176 | MIB_DESC(1, MT7621_STATS_RDPC_ARL, "RxARLDrop") |
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177 | }; |
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178 | |||
179 | enum { |
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180 | /* Global attributes. */ |
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181 | MT7530_ATTR_ENABLE_VLAN, |
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182 | }; |
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183 | |||
184 | struct mt7530_port_entry { |
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185 | u16 pvid; |
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186 | }; |
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187 | |||
188 | struct mt7530_vlan_entry { |
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189 | u16 vid; |
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190 | u8 member; |
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191 | u8 etags; |
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192 | }; |
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193 | |||
194 | struct mt7530_priv { |
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195 | void __iomem *base; |
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196 | struct mii_bus *bus; |
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197 | struct switch_dev swdev; |
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198 | |||
199 | bool global_vlan_enable; |
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200 | struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS]; |
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201 | struct mt7530_port_entry port_entries[MT7530_NUM_PORTS]; |
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202 | }; |
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203 | |||
204 | struct mt7530_mapping { |
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205 | char *name; |
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206 | u16 pvids[MT7530_NUM_PORTS]; |
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207 | u8 members[MT7530_NUM_VLANS]; |
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208 | u8 etags[MT7530_NUM_VLANS]; |
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209 | u16 vids[MT7530_NUM_VLANS]; |
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210 | } mt7530_defaults[] = { |
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211 | { |
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212 | .name = "llllw", |
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213 | .pvids = { 1, 1, 1, 1, 2, 1, 1 }, |
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214 | .members = { 0, 0x6f, 0x50 }, |
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215 | .etags = { 0, 0x40, 0x40 }, |
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216 | .vids = { 0, 1, 2 }, |
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217 | }, { |
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218 | .name = "wllll", |
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219 | .pvids = { 2, 1, 1, 1, 1, 1, 1 }, |
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220 | .members = { 0, 0x7e, 0x41 }, |
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221 | .etags = { 0, 0x40, 0x40 }, |
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222 | .vids = { 0, 1, 2 }, |
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223 | }, { |
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224 | .name = "lwlll", |
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225 | .pvids = { 1, 2, 1, 1, 1, 1, 1 }, |
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226 | .members = { 0, 0x7d, 0x42 }, |
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227 | .etags = { 0, 0x40, 0x40 }, |
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228 | .vids = { 0, 1, 2 }, |
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229 | }, |
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230 | }; |
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231 | |||
232 | struct mt7530_mapping* |
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233 | mt7530_find_mapping(struct device_node *np) |
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234 | { |
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235 | const char *map; |
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236 | int i; |
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237 | |||
238 | if (of_property_read_string(np, "mediatek,portmap", &map)) |
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239 | return NULL; |
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240 | |||
241 | for (i = 0; i < ARRAY_SIZE(mt7530_defaults); i++) |
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242 | if (!strcmp(map, mt7530_defaults[i].name)) |
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243 | return &mt7530_defaults[i]; |
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244 | |||
245 | return NULL; |
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246 | } |
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247 | |||
248 | static void |
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249 | mt7530_apply_mapping(struct mt7530_priv *mt7530, struct mt7530_mapping *map) |
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250 | { |
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251 | int i = 0; |
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252 | |||
253 | for (i = 0; i < MT7530_NUM_PORTS; i++) |
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254 | mt7530->port_entries[i].pvid = map->pvids[i]; |
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255 | |||
256 | for (i = 0; i < MT7530_NUM_VLANS; i++) { |
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257 | mt7530->vlan_entries[i].member = map->members[i]; |
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258 | mt7530->vlan_entries[i].etags = map->etags[i]; |
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259 | mt7530->vlan_entries[i].vid = map->vids[i]; |
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260 | } |
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261 | } |
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262 | |||
263 | static int |
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264 | mt7530_reset_switch(struct switch_dev *dev) |
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265 | { |
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266 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
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267 | int i; |
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268 | |||
269 | memset(priv->port_entries, 0, sizeof(priv->port_entries)); |
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270 | memset(priv->vlan_entries, 0, sizeof(priv->vlan_entries)); |
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271 | |||
272 | /* set default vid of each vlan to the same number of vlan, so the vid |
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273 | * won't need be set explicitly. |
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274 | */ |
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275 | for (i = 0; i < MT7530_NUM_VLANS; i++) { |
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276 | priv->vlan_entries[i].vid = i; |
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277 | } |
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278 | |||
279 | return 0; |
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280 | } |
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281 | |||
282 | static int |
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283 | mt7530_get_vlan_enable(struct switch_dev *dev, |
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284 | const struct switch_attr *attr, |
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285 | struct switch_val *val) |
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286 | { |
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287 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
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288 | |||
289 | val->value.i = priv->global_vlan_enable; |
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290 | |||
291 | return 0; |
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292 | } |
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293 | |||
294 | static int |
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295 | mt7530_set_vlan_enable(struct switch_dev *dev, |
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296 | const struct switch_attr *attr, |
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297 | struct switch_val *val) |
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298 | { |
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299 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
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300 | |||
301 | priv->global_vlan_enable = val->value.i != 0; |
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302 | |||
303 | return 0; |
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304 | } |
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305 | |||
306 | static u32 |
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307 | mt7530_r32(struct mt7530_priv *priv, u32 reg) |
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308 | { |
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309 | u32 val; |
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310 | if (priv->bus) { |
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311 | u16 high, low; |
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312 | |||
313 | mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff); |
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314 | low = mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf); |
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315 | high = mdiobus_read(priv->bus, 0x1f, 0x10); |
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316 | |||
317 | return (high << 16) | (low & 0xffff); |
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318 | } |
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319 | |||
320 | val = ioread32(priv->base + reg); |
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321 | pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg, val); |
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322 | |||
323 | return val; |
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324 | } |
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325 | |||
326 | static void |
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327 | mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val) |
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328 | { |
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329 | if (priv->bus) { |
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330 | mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff); |
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331 | mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf, val & 0xffff); |
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332 | mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16); |
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333 | return; |
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334 | } |
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335 | |||
336 | pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg, val); |
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337 | iowrite32(val, priv->base + reg); |
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338 | } |
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339 | |||
340 | static void |
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341 | mt7530_vtcr(struct mt7530_priv *priv, u32 cmd, u32 val) |
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342 | { |
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343 | int i; |
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344 | |||
345 | mt7530_w32(priv, REG_ESW_VLAN_VTCR, BIT(31) | (cmd << 12) | val); |
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346 | |||
347 | for (i = 0; i < 20; i++) { |
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348 | u32 val = mt7530_r32(priv, REG_ESW_VLAN_VTCR); |
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349 | |||
350 | if ((val & BIT(31)) == 0) |
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351 | break; |
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352 | |||
353 | udelay(1000); |
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354 | } |
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355 | if (i == 20) |
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356 | printk("mt7530: vtcr timeout\n"); |
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357 | } |
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358 | |||
359 | static int |
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360 | mt7530_get_port_pvid(struct switch_dev *dev, int port, int *val) |
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361 | { |
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362 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
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363 | |||
364 | if (port >= MT7530_NUM_PORTS) |
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365 | return -EINVAL; |
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366 | |||
367 | *val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(port)); |
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368 | *val &= 0xfff; |
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369 | |||
370 | return 0; |
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371 | } |
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372 | |||
373 | static int |
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374 | mt7530_set_port_pvid(struct switch_dev *dev, int port, int pvid) |
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375 | { |
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376 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
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377 | |||
378 | if (port >= MT7530_NUM_PORTS) |
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379 | return -EINVAL; |
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380 | |||
381 | if (pvid < MT7530_MIN_VID || pvid > MT7530_MAX_VID) |
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382 | return -EINVAL; |
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383 | |||
384 | priv->port_entries[port].pvid = pvid; |
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385 | |||
386 | return 0; |
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387 | } |
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388 | |||
389 | static int |
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390 | mt7530_get_vlan_ports(struct switch_dev *dev, struct switch_val *val) |
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391 | { |
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392 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
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393 | u32 member; |
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394 | u32 etags; |
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395 | int i; |
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396 | |||
397 | val->len = 0; |
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398 | |||
399 | if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS) |
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400 | return -EINVAL; |
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401 | |||
402 | mt7530_vtcr(priv, 0, val->port_vlan); |
||
403 | |||
404 | member = mt7530_r32(priv, REG_ESW_VLAN_VAWD1); |
||
405 | member >>= 16; |
||
406 | member &= 0xff; |
||
407 | |||
408 | etags = mt7530_r32(priv, REG_ESW_VLAN_VAWD2); |
||
409 | |||
410 | for (i = 0; i < MT7530_NUM_PORTS; i++) { |
||
411 | struct switch_port *p; |
||
412 | int etag; |
||
413 | |||
414 | if (!(member & BIT(i))) |
||
415 | continue; |
||
416 | |||
417 | p = &val->value.ports[val->len++]; |
||
418 | p->id = i; |
||
419 | |||
420 | etag = (etags >> (i * 2)) & 0x3; |
||
421 | |||
422 | if (etag == ETAG_CTRL_TAG) |
||
423 | p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED); |
||
424 | else if (etag != ETAG_CTRL_UNTAG) |
||
425 | printk("vlan egress tag control neither untag nor tag.\n"); |
||
426 | } |
||
427 | |||
428 | return 0; |
||
429 | } |
||
430 | |||
431 | static int |
||
432 | mt7530_set_vlan_ports(struct switch_dev *dev, struct switch_val *val) |
||
433 | { |
||
434 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
435 | u8 member = 0; |
||
436 | u8 etags = 0; |
||
437 | int i; |
||
438 | |||
439 | if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS || |
||
440 | val->len > MT7530_NUM_PORTS) |
||
441 | return -EINVAL; |
||
442 | |||
443 | for (i = 0; i < val->len; i++) { |
||
444 | struct switch_port *p = &val->value.ports[i]; |
||
445 | |||
446 | if (p->id >= MT7530_NUM_PORTS) |
||
447 | return -EINVAL; |
||
448 | |||
449 | member |= BIT(p->id); |
||
450 | |||
451 | if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED)) |
||
452 | etags |= BIT(p->id); |
||
453 | } |
||
454 | priv->vlan_entries[val->port_vlan].member = member; |
||
455 | priv->vlan_entries[val->port_vlan].etags = etags; |
||
456 | |||
457 | return 0; |
||
458 | } |
||
459 | |||
460 | static int |
||
461 | mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr, |
||
462 | struct switch_val *val) |
||
463 | { |
||
464 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
465 | int vlan; |
||
466 | u16 vid; |
||
467 | |||
468 | vlan = val->port_vlan; |
||
469 | vid = (u16)val->value.i; |
||
470 | |||
471 | if (vlan < 0 || vlan >= MT7530_NUM_VLANS) |
||
472 | return -EINVAL; |
||
473 | |||
474 | if (vid < MT7530_MIN_VID || vid > MT7530_MAX_VID) |
||
475 | return -EINVAL; |
||
476 | |||
477 | priv->vlan_entries[vlan].vid = vid; |
||
478 | return 0; |
||
479 | } |
||
480 | |||
481 | static int |
||
482 | mt7621_get_vid(struct switch_dev *dev, const struct switch_attr *attr, |
||
483 | struct switch_val *val) |
||
484 | { |
||
485 | val->value.i = val->port_vlan; |
||
486 | return 0; |
||
487 | } |
||
488 | |||
489 | static int |
||
490 | mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr, |
||
491 | struct switch_val *val) |
||
492 | { |
||
493 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
494 | u32 vid; |
||
495 | int vlan; |
||
496 | |||
497 | vlan = val->port_vlan; |
||
498 | |||
499 | vid = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan)); |
||
500 | if (vlan & 1) |
||
501 | vid = vid >> 12; |
||
502 | vid &= 0xfff; |
||
503 | |||
504 | val->value.i = vid; |
||
505 | return 0; |
||
506 | } |
||
507 | |||
508 | static void |
||
509 | mt7530_write_vlan_entry(struct mt7530_priv *priv, int vlan, u16 vid, |
||
510 | u8 ports, u8 etags) |
||
511 | { |
||
512 | int port; |
||
513 | u32 val; |
||
514 | |||
515 | #ifndef CONFIG_SOC_MT7621 |
||
516 | /* vid of vlan */ |
||
517 | val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan)); |
||
518 | if (vlan % 2 == 0) { |
||
519 | val &= 0xfff000; |
||
520 | val |= vid; |
||
521 | } else { |
||
522 | val &= 0xfff; |
||
523 | val |= (vid << 12); |
||
524 | } |
||
525 | mt7530_w32(priv, REG_ESW_VLAN_VTIM(vlan), val); |
||
526 | #endif |
||
527 | |||
528 | /* vlan port membership */ |
||
529 | if (ports) |
||
530 | mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC | |
||
531 | REG_ESW_VLAN_VAWD1_VTAG_EN | (ports << 16) | |
||
532 | REG_ESW_VLAN_VAWD1_VALID); |
||
533 | else |
||
534 | mt7530_w32(priv, REG_ESW_VLAN_VAWD1, 0); |
||
535 | |||
536 | /* egress mode */ |
||
537 | val = 0; |
||
538 | for (port = 0; port < MT7530_NUM_PORTS; port++) { |
||
539 | if (etags & BIT(port)) |
||
540 | val |= ETAG_CTRL_TAG << (port * 2); |
||
541 | else |
||
542 | val |= ETAG_CTRL_UNTAG << (port * 2); |
||
543 | } |
||
544 | mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val); |
||
545 | |||
546 | /* write to vlan table */ |
||
547 | #ifdef CONFIG_SOC_MT7621 |
||
548 | mt7530_vtcr(priv, 1, vid); |
||
549 | #else |
||
550 | mt7530_vtcr(priv, 1, vlan); |
||
551 | #endif |
||
552 | } |
||
553 | |||
554 | static int |
||
555 | mt7530_apply_config(struct switch_dev *dev) |
||
556 | { |
||
557 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
558 | int i, j; |
||
559 | u8 tag_ports; |
||
560 | u8 untag_ports; |
||
561 | |||
562 | if (!priv->global_vlan_enable) { |
||
563 | for (i = 0; i < MT7530_NUM_PORTS; i++) |
||
564 | mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00400000); |
||
565 | |||
566 | mt7530_w32(priv, REG_ESW_PORT_PCR(MT7530_CPU_PORT), 0x00ff0000); |
||
567 | |||
568 | for (i = 0; i < MT7530_NUM_PORTS; i++) |
||
569 | mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x810000c0); |
||
570 | |||
571 | return 0; |
||
572 | } |
||
573 | |||
574 | /* set all ports as security mode */ |
||
575 | for (i = 0; i < MT7530_NUM_PORTS; i++) |
||
576 | mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0003); |
||
577 | |||
578 | /* check if a port is used in tag/untag vlan egress mode */ |
||
579 | tag_ports = 0; |
||
580 | untag_ports = 0; |
||
581 | |||
582 | for (i = 0; i < MT7530_NUM_VLANS; i++) { |
||
583 | u8 member = priv->vlan_entries[i].member; |
||
584 | u8 etags = priv->vlan_entries[i].etags; |
||
585 | |||
586 | if (!member) |
||
587 | continue; |
||
588 | |||
589 | for (j = 0; j < MT7530_NUM_PORTS; j++) { |
||
590 | if (!(member & BIT(j))) |
||
591 | continue; |
||
592 | |||
593 | if (etags & BIT(j)) |
||
594 | tag_ports |= 1u << j; |
||
595 | else |
||
596 | untag_ports |= 1u << j; |
||
597 | } |
||
598 | } |
||
599 | |||
600 | /* set all untag-only ports as transparent and the rest as user port */ |
||
601 | for (i = 0; i < MT7530_NUM_PORTS; i++) { |
||
602 | u32 pvc_mode = 0x81000000; |
||
603 | |||
604 | if (untag_ports & BIT(i) && !(tag_ports & BIT(i))) |
||
605 | pvc_mode = 0x810000c0; |
||
606 | |||
607 | mt7530_w32(priv, REG_ESW_PORT_PVC(i), pvc_mode); |
||
608 | } |
||
609 | |||
610 | /* first clear the swtich vlan table */ |
||
611 | for (i = 0; i < MT7530_NUM_VLANS; i++) |
||
612 | mt7530_write_vlan_entry(priv, i, i, 0, 0); |
||
613 | |||
614 | /* now program only vlans with members to avoid |
||
615 | clobbering remapped entries in later iterations */ |
||
616 | for (i = 0; i < MT7530_NUM_VLANS; i++) { |
||
617 | u16 vid = priv->vlan_entries[i].vid; |
||
618 | u8 member = priv->vlan_entries[i].member; |
||
619 | u8 etags = priv->vlan_entries[i].etags; |
||
620 | |||
621 | if (member) |
||
622 | mt7530_write_vlan_entry(priv, i, vid, member, etags); |
||
623 | } |
||
624 | |||
625 | /* Port Default PVID */ |
||
626 | for (i = 0; i < MT7530_NUM_PORTS; i++) { |
||
627 | int vlan = priv->port_entries[i].pvid; |
||
628 | u16 pvid = 0; |
||
629 | u32 val; |
||
630 | |||
631 | if (vlan < MT7530_NUM_VLANS && priv->vlan_entries[vlan].member) |
||
632 | pvid = priv->vlan_entries[vlan].vid; |
||
633 | |||
634 | val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(i)); |
||
635 | val &= ~0xfff; |
||
636 | val |= pvid; |
||
637 | mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val); |
||
638 | } |
||
639 | |||
640 | return 0; |
||
641 | } |
||
642 | |||
643 | static int |
||
644 | mt7530_get_port_link(struct switch_dev *dev, int port, |
||
645 | struct switch_port_link *link) |
||
646 | { |
||
647 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
648 | u32 speed, pmsr; |
||
649 | |||
650 | if (port < 0 || port >= MT7530_NUM_PORTS) |
||
651 | return -EINVAL; |
||
652 | |||
653 | pmsr = mt7530_r32(priv, 0x3008 + (0x100 * port)); |
||
654 | |||
655 | link->link = pmsr & 1; |
||
656 | link->duplex = (pmsr >> 1) & 1; |
||
657 | speed = (pmsr >> 2) & 3; |
||
658 | |||
659 | switch (speed) { |
||
660 | case 0: |
||
661 | link->speed = SWITCH_PORT_SPEED_10; |
||
662 | break; |
||
663 | case 1: |
||
664 | link->speed = SWITCH_PORT_SPEED_100; |
||
665 | break; |
||
666 | case 2: |
||
667 | case 3: /* forced gige speed can be 2 or 3 */ |
||
668 | link->speed = SWITCH_PORT_SPEED_1000; |
||
669 | break; |
||
670 | default: |
||
671 | link->speed = SWITCH_PORT_SPEED_UNKNOWN; |
||
672 | break; |
||
673 | } |
||
674 | |||
675 | return 0; |
||
676 | } |
||
677 | |||
678 | static u64 get_mib_counter(struct mt7530_priv *priv, int i, int port) |
||
679 | { |
||
680 | unsigned int port_base; |
||
681 | u64 lo; |
||
682 | |||
683 | port_base = MT7621_MIB_COUNTER_BASE + |
||
684 | MT7621_MIB_COUNTER_PORT_OFFSET * port; |
||
685 | |||
686 | lo = mt7530_r32(priv, port_base + mt7621_mibs[i].offset); |
||
687 | if (mt7621_mibs[i].size == 2) { |
||
688 | u64 hi; |
||
689 | |||
690 | hi = mt7530_r32(priv, port_base + mt7621_mibs[i].offset + 4); |
||
691 | lo |= hi << 32; |
||
692 | } |
||
693 | |||
694 | return lo; |
||
695 | } |
||
696 | |||
697 | static int mt7621_sw_get_port_mib(struct switch_dev *dev, |
||
698 | const struct switch_attr *attr, |
||
699 | struct switch_val *val) |
||
700 | { |
||
701 | static char buf[4096]; |
||
702 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
703 | int i, len = 0; |
||
704 | |||
705 | if (val->port_vlan >= MT7530_NUM_PORTS) |
||
706 | return -EINVAL; |
||
707 | |||
708 | len += snprintf(buf + len, sizeof(buf) - len, |
||
709 | "Port %d MIB counters\n", val->port_vlan); |
||
710 | |||
711 | for (i = 0; i < ARRAY_SIZE(mt7621_mibs); ++i) { |
||
712 | u64 counter; |
||
713 | len += snprintf(buf + len, sizeof(buf) - len, |
||
714 | "%-11s: ", mt7621_mibs[i].name); |
||
715 | counter = get_mib_counter(priv, i, val->port_vlan); |
||
716 | len += snprintf(buf + len, sizeof(buf) - len, "%llu\n", |
||
717 | counter); |
||
718 | } |
||
719 | |||
720 | val->value.s = buf; |
||
721 | val->len = len; |
||
722 | return 0; |
||
723 | } |
||
724 | |||
725 | static u64 get_mib_counter_7620(struct mt7530_priv *priv, int i) |
||
726 | { |
||
727 | return mt7530_r32(priv, MT7620_MIB_COUNTER_BASE + mt7620_mibs[i].offset); |
||
728 | } |
||
729 | |||
730 | static u64 get_mib_counter_port_7620(struct mt7530_priv *priv, int i, int port) |
||
731 | { |
||
732 | return mt7530_r32(priv, |
||
733 | MT7620_MIB_COUNTER_BASE_PORT + |
||
734 | (MT7620_MIB_COUNTER_PORT_OFFSET * port) + |
||
735 | mt7620_port_mibs[i].offset); |
||
736 | } |
||
737 | |||
738 | static int mt7530_sw_get_mib(struct switch_dev *dev, |
||
739 | const struct switch_attr *attr, |
||
740 | struct switch_val *val) |
||
741 | { |
||
742 | static char buf[4096]; |
||
743 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
744 | int i, len = 0; |
||
745 | |||
746 | len += snprintf(buf + len, sizeof(buf) - len, "Switch MIB counters\n"); |
||
747 | |||
748 | for (i = 0; i < ARRAY_SIZE(mt7620_mibs); ++i) { |
||
749 | u64 counter; |
||
750 | len += snprintf(buf + len, sizeof(buf) - len, |
||
751 | "%-11s: ", mt7620_mibs[i].name); |
||
752 | counter = get_mib_counter_7620(priv, i); |
||
753 | len += snprintf(buf + len, sizeof(buf) - len, "%llu\n", |
||
754 | counter); |
||
755 | } |
||
756 | |||
757 | val->value.s = buf; |
||
758 | val->len = len; |
||
759 | return 0; |
||
760 | } |
||
761 | |||
762 | static int mt7530_sw_get_port_mib(struct switch_dev *dev, |
||
763 | const struct switch_attr *attr, |
||
764 | struct switch_val *val) |
||
765 | { |
||
766 | static char buf[4096]; |
||
767 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
768 | int i, len = 0; |
||
769 | |||
770 | if (val->port_vlan >= MT7530_NUM_PORTS) |
||
771 | return -EINVAL; |
||
772 | |||
773 | len += snprintf(buf + len, sizeof(buf) - len, |
||
774 | "Port %d MIB counters\n", val->port_vlan); |
||
775 | |||
776 | for (i = 0; i < ARRAY_SIZE(mt7620_port_mibs); ++i) { |
||
777 | u64 counter; |
||
778 | len += snprintf(buf + len, sizeof(buf) - len, |
||
779 | "%-11s: ", mt7620_port_mibs[i].name); |
||
780 | counter = get_mib_counter_port_7620(priv, i, val->port_vlan); |
||
781 | len += snprintf(buf + len, sizeof(buf) - len, "%llu\n", |
||
782 | counter); |
||
783 | } |
||
784 | |||
785 | val->value.s = buf; |
||
786 | val->len = len; |
||
787 | return 0; |
||
788 | } |
||
789 | |||
790 | static int mt7530_get_port_stats(struct switch_dev *dev, int port, |
||
791 | struct switch_port_stats *stats) |
||
792 | { |
||
793 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
794 | |||
795 | if (port < 0 || port >= MT7530_NUM_PORTS) |
||
796 | return -EINVAL; |
||
797 | |||
798 | stats->tx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_TXB_ID, port); |
||
799 | stats->rx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_RXB_ID, port); |
||
800 | |||
801 | return 0; |
||
802 | } |
||
803 | |||
804 | static int mt7621_get_port_stats(struct switch_dev *dev, int port, |
||
805 | struct switch_port_stats *stats) |
||
806 | { |
||
807 | struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev); |
||
808 | |||
809 | if (port < 0 || port >= MT7530_NUM_PORTS) |
||
810 | return -EINVAL; |
||
811 | |||
812 | stats->tx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_TXB_ID, port); |
||
813 | stats->rx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_RXB_ID, port); |
||
814 | |||
815 | return 0; |
||
816 | } |
||
817 | |||
818 | static const struct switch_attr mt7530_global[] = { |
||
819 | { |
||
820 | .type = SWITCH_TYPE_INT, |
||
821 | .name = "enable_vlan", |
||
822 | .description = "VLAN mode (1:enabled)", |
||
823 | .max = 1, |
||
824 | .id = MT7530_ATTR_ENABLE_VLAN, |
||
825 | .get = mt7530_get_vlan_enable, |
||
826 | .set = mt7530_set_vlan_enable, |
||
827 | }, { |
||
828 | .type = SWITCH_TYPE_STRING, |
||
829 | .name = "mib", |
||
830 | .description = "Get MIB counters for switch", |
||
831 | .get = mt7530_sw_get_mib, |
||
832 | .set = NULL, |
||
833 | }, |
||
834 | }; |
||
835 | |||
836 | static const struct switch_attr mt7621_port[] = { |
||
837 | { |
||
838 | .type = SWITCH_TYPE_STRING, |
||
839 | .name = "mib", |
||
840 | .description = "Get MIB counters for port", |
||
841 | .get = mt7621_sw_get_port_mib, |
||
842 | .set = NULL, |
||
843 | }, |
||
844 | }; |
||
845 | |||
846 | static const struct switch_attr mt7621_vlan[] = { |
||
847 | { |
||
848 | .type = SWITCH_TYPE_INT, |
||
849 | .name = "vid", |
||
850 | .description = "VLAN ID (0-4094)", |
||
851 | .set = mt7530_set_vid, |
||
852 | .get = mt7621_get_vid, |
||
853 | .max = 4094, |
||
854 | }, |
||
855 | }; |
||
856 | |||
857 | static const struct switch_attr mt7530_port[] = { |
||
858 | { |
||
859 | .type = SWITCH_TYPE_STRING, |
||
860 | .name = "mib", |
||
861 | .description = "Get MIB counters for port", |
||
862 | .get = mt7530_sw_get_port_mib, |
||
863 | .set = NULL, |
||
864 | }, |
||
865 | }; |
||
866 | |||
867 | static const struct switch_attr mt7530_vlan[] = { |
||
868 | { |
||
869 | .type = SWITCH_TYPE_INT, |
||
870 | .name = "vid", |
||
871 | .description = "VLAN ID (0-4094)", |
||
872 | .set = mt7530_set_vid, |
||
873 | .get = mt7530_get_vid, |
||
874 | .max = 4094, |
||
875 | }, |
||
876 | }; |
||
877 | |||
878 | static const struct switch_dev_ops mt7621_ops = { |
||
879 | .attr_global = { |
||
880 | .attr = mt7530_global, |
||
881 | .n_attr = ARRAY_SIZE(mt7530_global), |
||
882 | }, |
||
883 | .attr_port = { |
||
884 | .attr = mt7621_port, |
||
885 | .n_attr = ARRAY_SIZE(mt7621_port), |
||
886 | }, |
||
887 | .attr_vlan = { |
||
888 | .attr = mt7621_vlan, |
||
889 | .n_attr = ARRAY_SIZE(mt7621_vlan), |
||
890 | }, |
||
891 | .get_vlan_ports = mt7530_get_vlan_ports, |
||
892 | .set_vlan_ports = mt7530_set_vlan_ports, |
||
893 | .get_port_pvid = mt7530_get_port_pvid, |
||
894 | .set_port_pvid = mt7530_set_port_pvid, |
||
895 | .get_port_link = mt7530_get_port_link, |
||
896 | .get_port_stats = mt7621_get_port_stats, |
||
897 | .apply_config = mt7530_apply_config, |
||
898 | .reset_switch = mt7530_reset_switch, |
||
899 | }; |
||
900 | |||
901 | static const struct switch_dev_ops mt7530_ops = { |
||
902 | .attr_global = { |
||
903 | .attr = mt7530_global, |
||
904 | .n_attr = ARRAY_SIZE(mt7530_global), |
||
905 | }, |
||
906 | .attr_port = { |
||
907 | .attr = mt7530_port, |
||
908 | .n_attr = ARRAY_SIZE(mt7530_port), |
||
909 | }, |
||
910 | .attr_vlan = { |
||
911 | .attr = mt7530_vlan, |
||
912 | .n_attr = ARRAY_SIZE(mt7530_vlan), |
||
913 | }, |
||
914 | .get_vlan_ports = mt7530_get_vlan_ports, |
||
915 | .set_vlan_ports = mt7530_set_vlan_ports, |
||
916 | .get_port_pvid = mt7530_get_port_pvid, |
||
917 | .set_port_pvid = mt7530_set_port_pvid, |
||
918 | .get_port_link = mt7530_get_port_link, |
||
919 | .get_port_stats = mt7530_get_port_stats, |
||
920 | .apply_config = mt7530_apply_config, |
||
921 | .reset_switch = mt7530_reset_switch, |
||
922 | }; |
||
923 | |||
924 | int |
||
925 | mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan) |
||
926 | { |
||
927 | struct switch_dev *swdev; |
||
928 | struct mt7530_priv *mt7530; |
||
929 | struct mt7530_mapping *map; |
||
930 | int ret; |
||
931 | |||
932 | mt7530 = devm_kzalloc(dev, sizeof(struct mt7530_priv), GFP_KERNEL); |
||
933 | if (!mt7530) |
||
934 | return -ENOMEM; |
||
935 | |||
936 | mt7530->base = base; |
||
937 | mt7530->bus = bus; |
||
938 | mt7530->global_vlan_enable = vlan; |
||
939 | |||
940 | swdev = &mt7530->swdev; |
||
941 | if (bus) { |
||
942 | swdev->alias = "mt7530"; |
||
943 | swdev->name = "mt7530"; |
||
944 | } else if (IS_ENABLED(CONFIG_SOC_MT7621)) { |
||
945 | swdev->alias = "mt7621"; |
||
946 | swdev->name = "mt7621"; |
||
947 | } else { |
||
948 | swdev->alias = "mt7620"; |
||
949 | swdev->name = "mt7620"; |
||
950 | } |
||
951 | swdev->cpu_port = MT7530_CPU_PORT; |
||
952 | swdev->ports = MT7530_NUM_PORTS; |
||
953 | swdev->vlans = MT7530_NUM_VLANS; |
||
954 | if (IS_ENABLED(CONFIG_SOC_MT7621)) |
||
955 | swdev->ops = &mt7621_ops; |
||
956 | else |
||
957 | swdev->ops = &mt7530_ops; |
||
958 | |||
959 | ret = register_switch(swdev, NULL); |
||
960 | if (ret) { |
||
961 | dev_err(dev, "failed to register mt7530\n"); |
||
962 | return ret; |
||
963 | } |
||
964 | |||
965 | |||
966 | map = mt7530_find_mapping(dev->of_node); |
||
967 | if (map) |
||
968 | mt7530_apply_mapping(mt7530, map); |
||
969 | mt7530_apply_config(swdev); |
||
970 | |||
971 | /* magic vodoo */ |
||
972 | if (!IS_ENABLED(CONFIG_SOC_MT7621) && bus && mt7530_r32(mt7530, REG_HWTRAP) != 0x1117edf) { |
||
973 | dev_info(dev, "fixing up MHWTRAP register - bootloader probably played with it\n"); |
||
974 | mt7530_w32(mt7530, REG_HWTRAP, 0x1117edf); |
||
975 | } |
||
976 | dev_info(dev, "loaded %s driver\n", swdev->name); |
||
977 | |||
978 | return 0; |
||
979 | } |