OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 7cc8226e45b2c6b9f06ce82ba6995b8f911afe25 Mon Sep 17 00:00:00 2001 |
2 | From: Zhi Mao <zhi.mao@mediatek.com> |
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3 | Date: Wed, 25 Oct 2017 18:11:01 +0800 |
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4 | Subject: [PATCH 161/224] pwm: mediatek: Add MT2712/MT7622 support |
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5 | |||
6 | Add support for MT2712 and MT7622. Due to register offset address of |
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7 | pwm7 for MT2712 is not fixed 0x40, add mtk_pwm_reg_offset array for PWM |
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8 | register offset. |
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9 | |||
10 | Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> |
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11 | Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> |
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12 | Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> |
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13 | Signed-off-by: Thierry Reding <thierry.reding@gmail.com> |
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14 | --- |
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15 | drivers/pwm/pwm-mediatek.c | 53 ++++++++++++++++++++++++++++++++++++++-------- |
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16 | 1 file changed, 44 insertions(+), 9 deletions(-) |
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17 | |||
18 | --- a/drivers/pwm/pwm-mediatek.c |
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19 | +++ b/drivers/pwm/pwm-mediatek.c |
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20 | @@ -16,6 +16,7 @@ |
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21 | #include <linux/module.h> |
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22 | #include <linux/clk.h> |
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23 | #include <linux/of.h> |
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24 | +#include <linux/of_device.h> |
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25 | #include <linux/platform_device.h> |
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26 | #include <linux/pwm.h> |
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27 | #include <linux/slab.h> |
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28 | @@ -40,11 +41,19 @@ enum { |
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29 | MTK_CLK_PWM3, |
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30 | MTK_CLK_PWM4, |
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31 | MTK_CLK_PWM5, |
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32 | + MTK_CLK_PWM6, |
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33 | + MTK_CLK_PWM7, |
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34 | + MTK_CLK_PWM8, |
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35 | MTK_CLK_MAX, |
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36 | }; |
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37 | |||
38 | -static const char * const mtk_pwm_clk_name[] = { |
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39 | - "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5" |
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40 | +static const char * const mtk_pwm_clk_name[MTK_CLK_MAX] = { |
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41 | + "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7", |
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42 | + "pwm8" |
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43 | +}; |
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44 | + |
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45 | +struct mtk_pwm_platform_data { |
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46 | + unsigned int num_pwms; |
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47 | }; |
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48 | |||
49 | /** |
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50 | @@ -59,6 +68,10 @@ struct mtk_pwm_chip { |
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51 | struct clk *clks[MTK_CLK_MAX]; |
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52 | }; |
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53 | |||
54 | +static const unsigned int mtk_pwm_reg_offset[] = { |
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55 | + 0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220 |
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56 | +}; |
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57 | + |
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58 | static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip) |
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59 | { |
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60 | return container_of(chip, struct mtk_pwm_chip, chip); |
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61 | @@ -103,14 +116,14 @@ static void mtk_pwm_clk_disable(struct p |
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62 | static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num, |
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63 | unsigned int offset) |
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64 | { |
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65 | - return readl(chip->regs + 0x10 + (num * 0x40) + offset); |
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66 | + return readl(chip->regs + mtk_pwm_reg_offset[num] + offset); |
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67 | } |
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68 | |||
69 | static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip, |
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70 | unsigned int num, unsigned int offset, |
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71 | u32 value) |
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72 | { |
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73 | - writel(value, chip->regs + 0x10 + (num * 0x40) + offset); |
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74 | + writel(value, chip->regs + mtk_pwm_reg_offset[num] + offset); |
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75 | } |
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76 | |||
77 | static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, |
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78 | @@ -185,6 +198,7 @@ static const struct pwm_ops mtk_pwm_ops |
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79 | |||
80 | static int mtk_pwm_probe(struct platform_device *pdev) |
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81 | { |
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82 | + const struct mtk_pwm_platform_data *data; |
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83 | struct mtk_pwm_chip *pc; |
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84 | struct resource *res; |
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85 | unsigned int i; |
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86 | @@ -194,15 +208,22 @@ static int mtk_pwm_probe(struct platform |
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87 | if (!pc) |
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88 | return -ENOMEM; |
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89 | |||
90 | + data = of_device_get_match_data(&pdev->dev); |
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91 | + if (data == NULL) |
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92 | + return -EINVAL; |
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93 | + |
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94 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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95 | pc->regs = devm_ioremap_resource(&pdev->dev, res); |
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96 | if (IS_ERR(pc->regs)) |
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97 | return PTR_ERR(pc->regs); |
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98 | |||
99 | - for (i = 0; i < MTK_CLK_MAX; i++) { |
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100 | + for (i = 0; i < data->num_pwms + 2; i++) { |
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101 | pc->clks[i] = devm_clk_get(&pdev->dev, mtk_pwm_clk_name[i]); |
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102 | - if (IS_ERR(pc->clks[i])) |
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103 | + if (IS_ERR(pc->clks[i])) { |
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104 | + dev_err(&pdev->dev, "clock: %s fail: %ld\n", |
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105 | + mtk_pwm_clk_name[i], PTR_ERR(pc->clks[i])); |
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106 | return PTR_ERR(pc->clks[i]); |
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107 | + } |
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108 | } |
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109 | |||
110 | platform_set_drvdata(pdev, pc); |
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111 | @@ -210,7 +231,7 @@ static int mtk_pwm_probe(struct platform |
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112 | pc->chip.dev = &pdev->dev; |
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113 | pc->chip.ops = &mtk_pwm_ops; |
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114 | pc->chip.base = -1; |
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115 | - pc->chip.npwm = 5; |
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116 | + pc->chip.npwm = data->num_pwms; |
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117 | |||
118 | ret = pwmchip_add(&pc->chip); |
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119 | if (ret < 0) { |
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120 | @@ -228,9 +249,23 @@ static int mtk_pwm_remove(struct platfor |
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121 | return pwmchip_remove(&pc->chip); |
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122 | } |
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123 | |||
124 | +static const struct mtk_pwm_platform_data mt2712_pwm_data = { |
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125 | + .num_pwms = 8, |
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126 | +}; |
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127 | + |
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128 | +static const struct mtk_pwm_platform_data mt7622_pwm_data = { |
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129 | + .num_pwms = 6, |
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130 | +}; |
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131 | + |
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132 | +static const struct mtk_pwm_platform_data mt7623_pwm_data = { |
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133 | + .num_pwms = 5, |
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134 | +}; |
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135 | + |
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136 | static const struct of_device_id mtk_pwm_of_match[] = { |
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137 | - { .compatible = "mediatek,mt7623-pwm" }, |
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138 | - { } |
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139 | + { .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data }, |
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140 | + { .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data }, |
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141 | + { .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data }, |
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142 | + { }, |
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143 | }; |
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144 | MODULE_DEVICE_TABLE(of, mtk_pwm_of_match); |
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145 |