OpenWrt – Blame information for rev 1
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1 | office | 1 | From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001 |
2 | From: Hauke Mehrtens <hauke@hauke-m.de> |
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3 | Date: Fri, 6 Jan 2017 17:55:24 +0100 |
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4 | Subject: [PATCH 2/2] usb: dwc2: add support for other Lantiq SoCs |
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5 | |||
6 | The size of the internal RAM of the DesignWare USB controller changed |
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7 | between the different Lantiq SoCs. We have the following sizes: |
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8 | |||
9 | Amazon + Danube: 8 KByte |
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10 | Amazon SE + arx100: 2 KByte |
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11 | xrx200 + xrx300: 2.5 KByte |
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12 | |||
13 | For Danube SoC we do not provide the params and let the driver decide |
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14 | to use sane defaults, for the Amazon SE and arx100 we use small fifos |
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15 | and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo. |
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16 | The auto detection of max_transfer_size and max_packet_count should |
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17 | work, so remove it. |
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18 | |||
19 | Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> |
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20 | --- |
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21 | drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++------- |
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22 | 1 file changed, 39 insertions(+), 7 deletions(-) |
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23 | |||
24 | --- a/drivers/usb/dwc2/params.c |
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25 | +++ b/drivers/usb/dwc2/params.c |
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26 | @@ -83,7 +83,14 @@ static void dwc2_set_rk_params(struct dw |
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27 | GAHBCFG_HBSTLEN_SHIFT; |
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28 | } |
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29 | |||
30 | -static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) |
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31 | +static void dwc2_set_ltq_danube_params(struct dwc2_hsotg *hsotg) |
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32 | +{ |
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33 | + struct dwc2_core_params *p = &hsotg->params; |
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34 | + |
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35 | + p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; |
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36 | +} |
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37 | + |
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38 | +static void dwc2_set_ltq_ase_params(struct dwc2_hsotg *hsotg) |
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39 | { |
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40 | struct dwc2_core_params *p = &hsotg->params; |
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41 | |||
42 | @@ -91,12 +98,20 @@ static void dwc2_set_ltq_params(struct d |
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43 | p->host_rx_fifo_size = 288; |
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44 | p->host_nperio_tx_fifo_size = 128; |
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45 | p->host_perio_tx_fifo_size = 96; |
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46 | - p->max_transfer_size = 65535; |
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47 | - p->max_packet_count = 511; |
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48 | p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << |
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49 | GAHBCFG_HBSTLEN_SHIFT; |
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50 | } |
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51 | |||
52 | +static void dwc2_set_ltq_xrx200_params(struct dwc2_hsotg *hsotg) |
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53 | +{ |
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54 | + struct dwc2_core_params *p = &hsotg->params; |
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55 | + |
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56 | + p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; |
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57 | + p->host_rx_fifo_size = 288; |
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58 | + p->host_nperio_tx_fifo_size = 128; |
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59 | + p->host_perio_tx_fifo_size = 136; |
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60 | +} |
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61 | + |
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62 | static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg) |
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63 | { |
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64 | struct dwc2_core_params *p = &hsotg->params; |
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65 | @@ -140,8 +155,11 @@ const struct of_device_id dwc2_of_match_ |
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66 | { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params }, |
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67 | { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params }, |
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68 | { .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params }, |
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69 | - { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params }, |
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70 | - { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params }, |
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71 | + { .compatible = "lantiq,danube-usb", .data = &dwc2_set_ltq_danube_params }, |
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72 | + { .compatible = "lantiq,ase-usb", .data = &dwc2_set_ltq_ase_params }, |
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73 | + { .compatible = "lantiq,arx100-usb", .data = &dwc2_set_ltq_ase_params }, |
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74 | + { .compatible = "lantiq,xrx200-usb", .data = &dwc2_set_ltq_xrx200_params }, |
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75 | + { .compatible = "lantiq,xrx300-usb", .data = &dwc2_set_ltq_xrx200_params }, |
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76 | { .compatible = "snps,dwc2" }, |
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77 | { .compatible = "samsung,s3c6400-hsotg" }, |
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78 | { .compatible = "amlogic,meson8-usb", |