OpenWrt – Blame information for rev 1
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
1 | office | 1 | --- a/arch/arm/mach-cns3xxx/core.c |
2 | +++ b/arch/arm/mach-cns3xxx/core.c |
||
3 | @@ -307,13 +307,26 @@ void __init cns3xxx_timer_init(void) |
||
4 | |||
5 | #ifdef CONFIG_CACHE_L2X0 |
||
6 | |||
7 | -void __init cns3xxx_l2x0_init(void) |
||
8 | +static int cns3xxx_l2x0_enable = 1; |
||
9 | + |
||
10 | +static int __init cns3xxx_l2x0_disable(char *s) |
||
11 | +{ |
||
12 | + cns3xxx_l2x0_enable = 0; |
||
13 | + return 1; |
||
14 | +} |
||
15 | +__setup("nol2x0", cns3xxx_l2x0_disable); |
||
16 | + |
||
17 | +static int __init cns3xxx_l2x0_init(void) |
||
18 | { |
||
19 | - void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); |
||
20 | + void __iomem *base; |
||
21 | u32 val; |
||
22 | |||
23 | + if (!cns3xxx_l2x0_enable) |
||
24 | + return 0; |
||
25 | + |
||
26 | + base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); |
||
27 | if (WARN_ON(!base)) |
||
28 | - return; |
||
29 | + return 0; |
||
30 | |||
31 | /* |
||
32 | * Tag RAM Control register |
||
33 | @@ -343,7 +356,10 @@ void __init cns3xxx_l2x0_init(void) |
||
34 | |||
35 | /* 32 KiB, 8-way, parity disable */ |
||
36 | l2x0_init(base, 0x00500000, 0xfe0f0fff); |
||
37 | + |
||
38 | + return 0; |
||
39 | } |
||
40 | +arch_initcall(cns3xxx_l2x0_init); |
||
41 | |||
42 | #endif /* CONFIG_CACHE_L2X0 */ |
||
43 | |||
44 | --- a/arch/arm/mach-cns3xxx/cns3420vb.c |
||
45 | +++ b/arch/arm/mach-cns3xxx/cns3420vb.c |
||
46 | @@ -217,8 +217,6 @@ static struct platform_device *cns3420_p |
||
47 | |||
48 | static void __init cns3420_init(void) |
||
49 | { |
||
50 | - cns3xxx_l2x0_init(); |
||
51 | - |
||
52 | platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); |
||
53 | |||
54 | cns3xxx_ahci_init(); |
||
55 | --- a/arch/arm/mach-cns3xxx/core.h |
||
56 | +++ b/arch/arm/mach-cns3xxx/core.h |
||
57 | @@ -16,12 +16,6 @@ |
||
58 | extern struct smp_operations cns3xxx_smp_ops; |
||
59 | extern void cns3xxx_timer_init(void); |
||
60 | |||
61 | -#ifdef CONFIG_CACHE_L2X0 |
||
62 | -void __init cns3xxx_l2x0_init(void); |
||
63 | -#else |
||
64 | -static inline void cns3xxx_l2x0_init(void) {} |
||
65 | -#endif /* CONFIG_CACHE_L2X0 */ |
||
66 | - |
||
67 | #ifdef CONFIG_PCI |
||
68 | extern void __init cns3xxx_pcie_init_late(void); |
||
69 | #else |