OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From cd4dcd6da7a2610e0562a6e130bb68cc544a8fb1 Mon Sep 17 00:00:00 2001 |
2 | From: Christian Lamparter <chunkeey@gmail.com> |
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3 | Date: Wed, 4 Oct 2017 01:00:11 +0200 |
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4 | Subject: [PATCH 19/25] crypto: crypto4xx - overhaul crypto4xx_build_pd() |
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5 | |||
6 | This patch overhauls and fixes code related to crypto4xx_build_pd() |
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7 | |||
8 | * crypto4xx_build_pd() did not handle chained source scatterlist. |
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9 | This is fixed by replacing the buggy indexed-access of &src[idx] |
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10 | with sg_next() in the gather array setup loop. |
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11 | |||
12 | * The redundant is_hash, direction, save_iv and pd_ctl members |
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13 | in the crypto4xx_ctx struct have been removed. |
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14 | - is_hash can be derived from the crypto_async_request parameter. |
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15 | - direction is already part of the security association's |
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16 | bf.dir bitfield. |
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17 | - save_iv is unused. |
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18 | - pd_ctl always had the host_ready bit enabled anyway. |
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19 | (the hash_final case is rather pointless, since the ahash |
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20 | code has been deactivated). |
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21 | |||
22 | * make crypto4xx_build_pd()'s caller responsible for converting |
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23 | the IV to the LE32 format. |
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24 | |||
25 | * change crypto4xx_ahash_update() and crypto4xx_ahash_digest() to |
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26 | initialize a temporary destination scatterlist. This allows the |
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27 | removal of an ugly cast of req->result (which is a pointer to an |
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28 | u8-array) to a scatterlist pointer. |
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29 | |||
30 | * change crypto4xx_build_pd() return type to int. After all |
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31 | it returns -EINPROGRESS/-EBUSY. |
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32 | |||
33 | * fix crypto4xx_build_pd() thread-unsafe sa handling. |
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34 | |||
35 | Signed-off-by: Christian Lamparter <chunkeey@gmail.com> |
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36 | Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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37 | --- |
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38 | drivers/crypto/amcc/crypto4xx_alg.c | 87 +++++++++++------------- |
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39 | drivers/crypto/amcc/crypto4xx_core.c | 128 ++++++++++++++++------------------- |
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40 | drivers/crypto/amcc/crypto4xx_core.h | 12 ++-- |
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41 | 3 files changed, 103 insertions(+), 124 deletions(-) |
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42 | |||
43 | --- a/drivers/crypto/amcc/crypto4xx_alg.c |
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44 | +++ b/drivers/crypto/amcc/crypto4xx_alg.c |
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45 | @@ -75,27 +75,29 @@ static void set_dynamic_sa_command_1(str |
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46 | int crypto4xx_encrypt(struct ablkcipher_request *req) |
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47 | { |
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48 | struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); |
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49 | + unsigned int ivlen = crypto_ablkcipher_ivsize( |
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50 | + crypto_ablkcipher_reqtfm(req)); |
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51 | + __le32 iv[ivlen]; |
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52 | |||
53 | - ctx->direction = DIR_OUTBOUND; |
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54 | - ctx->is_hash = 0; |
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55 | - ctx->pd_ctl = 0x1; |
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56 | + if (ivlen) |
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57 | + crypto4xx_memcpy_to_le32(iv, req->info, ivlen); |
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58 | |||
59 | return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, |
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60 | - req->nbytes, req->info, |
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61 | - crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req))); |
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62 | + req->nbytes, iv, ivlen, ctx->sa_out, ctx->sa_len); |
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63 | } |
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64 | |||
65 | int crypto4xx_decrypt(struct ablkcipher_request *req) |
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66 | { |
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67 | struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); |
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68 | + unsigned int ivlen = crypto_ablkcipher_ivsize( |
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69 | + crypto_ablkcipher_reqtfm(req)); |
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70 | + __le32 iv[ivlen]; |
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71 | |||
72 | - ctx->direction = DIR_INBOUND; |
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73 | - ctx->is_hash = 0; |
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74 | - ctx->pd_ctl = 1; |
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75 | + if (ivlen) |
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76 | + crypto4xx_memcpy_to_le32(iv, req->info, ivlen); |
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77 | |||
78 | return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, |
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79 | - req->nbytes, req->info, |
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80 | - crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req))); |
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81 | + req->nbytes, iv, ivlen, ctx->sa_in, ctx->sa_len); |
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82 | } |
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83 | |||
84 | /** |
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85 | @@ -153,11 +155,6 @@ static int crypto4xx_setkey_aes(struct c |
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86 | key, keylen); |
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87 | sa->sa_contents.w = SA_AES_CONTENTS | (keylen << 2); |
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88 | sa->sa_command_1.bf.key_len = keylen >> 3; |
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89 | - ctx->is_hash = 0; |
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90 | - ctx->direction = DIR_INBOUND; |
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91 | - memcpy(sa + get_dynamic_sa_offset_state_ptr_field(sa), |
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92 | - (void *)&ctx->state_record_dma_addr, 4); |
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93 | - ctx->offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(sa); |
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94 | |||
95 | memcpy(ctx->sa_out, ctx->sa_in, ctx->sa_len * 4); |
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96 | sa = ctx->sa_out; |
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97 | @@ -206,7 +203,7 @@ int crypto4xx_setkey_rfc3686(struct cryp |
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98 | if (rc) |
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99 | return rc; |
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100 | |||
101 | - memcpy(ctx->state_record, |
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102 | + crypto4xx_memcpy_to_le32(ctx->state_record->save_iv, |
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103 | key + keylen - CTR_RFC3686_NONCE_SIZE, CTR_RFC3686_NONCE_SIZE); |
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104 | |||
105 | return 0; |
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106 | @@ -215,27 +212,29 @@ int crypto4xx_setkey_rfc3686(struct cryp |
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107 | int crypto4xx_rfc3686_encrypt(struct ablkcipher_request *req) |
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108 | { |
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109 | struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); |
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110 | - __be32 iv[AES_IV_SIZE / 4] = { *(u32 *)ctx->state_record, |
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111 | - *(u32 *) req->info, *(u32 *) (req->info + 4), cpu_to_be32(1) }; |
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112 | - |
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113 | - ctx->direction = DIR_OUTBOUND; |
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114 | - ctx->pd_ctl = 1; |
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115 | + __le32 iv[AES_IV_SIZE / 4] = { |
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116 | + ctx->state_record->save_iv[0], |
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117 | + cpu_to_le32p((u32 *) req->info), |
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118 | + cpu_to_le32p((u32 *) (req->info + 4)), |
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119 | + cpu_to_le32(1) }; |
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120 | |||
121 | return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, |
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122 | - req->nbytes, iv, AES_IV_SIZE); |
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123 | + req->nbytes, iv, AES_IV_SIZE, |
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124 | + ctx->sa_out, ctx->sa_len); |
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125 | } |
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126 | |||
127 | int crypto4xx_rfc3686_decrypt(struct ablkcipher_request *req) |
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128 | { |
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129 | struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); |
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130 | - __be32 iv[AES_IV_SIZE / 4] = { *(u32 *)ctx->state_record, |
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131 | - *(u32 *) req->info, *(u32 *) (req->info + 4), cpu_to_be32(1) }; |
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132 | - |
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133 | - ctx->direction = DIR_INBOUND; |
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134 | - ctx->pd_ctl = 1; |
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135 | + __le32 iv[AES_IV_SIZE / 4] = { |
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136 | + ctx->state_record->save_iv[0], |
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137 | + cpu_to_le32p((u32 *) req->info), |
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138 | + cpu_to_le32p((u32 *) (req->info + 4)), |
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139 | + cpu_to_le32(1) }; |
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140 | |||
141 | return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, |
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142 | - req->nbytes, iv, AES_IV_SIZE); |
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143 | + req->nbytes, iv, AES_IV_SIZE, |
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144 | + ctx->sa_out, ctx->sa_len); |
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145 | } |
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146 | |||
147 | /** |
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148 | @@ -253,7 +252,6 @@ static int crypto4xx_hash_alg_init(struc |
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149 | int rc; |
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150 | |||
151 | ctx->dev = my_alg->dev; |
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152 | - ctx->is_hash = 1; |
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153 | |||
154 | /* Create SA */ |
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155 | if (ctx->sa_in_dma_addr || ctx->sa_out_dma_addr) |
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156 | @@ -284,13 +282,9 @@ static int crypto4xx_hash_alg_init(struc |
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157 | SA_SEQ_MASK_OFF, SA_MC_ENABLE, |
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158 | SA_NOT_COPY_PAD, SA_NOT_COPY_PAYLOAD, |
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159 | SA_NOT_COPY_HDR); |
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160 | - ctx->direction = DIR_INBOUND; |
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161 | /* Need to zero hash digest in SA */ |
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162 | memset(sa->inner_digest, 0, sizeof(sa->inner_digest)); |
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163 | memset(sa->outer_digest, 0, sizeof(sa->outer_digest)); |
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164 | - sa->state_ptr = ctx->state_record_dma_addr; |
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165 | - ctx->offset_to_sr_ptr = |
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166 | - get_dynamic_sa_offset_state_ptr_field(&sa->ctrl); |
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167 | |||
168 | return 0; |
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169 | } |
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170 | @@ -306,23 +300,22 @@ int crypto4xx_hash_init(struct ahash_req |
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171 | __crypto_ahash_cast(req->base.tfm)); |
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172 | sa->sa_command_0.bf.digest_len = ds >> 2; |
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173 | sa->sa_command_0.bf.load_hash_state = SA_LOAD_HASH_FROM_SA; |
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174 | - ctx->is_hash = 1; |
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175 | - ctx->direction = DIR_INBOUND; |
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176 | |||
177 | return 0; |
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178 | } |
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179 | |||
180 | int crypto4xx_hash_update(struct ahash_request *req) |
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181 | { |
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182 | + struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); |
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183 | struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); |
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184 | + struct scatterlist dst; |
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185 | + unsigned int ds = crypto_ahash_digestsize(ahash); |
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186 | + |
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187 | + sg_init_one(&dst, req->result, ds); |
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188 | |||
189 | - ctx->is_hash = 1; |
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190 | - ctx->pd_ctl = 0x11; |
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191 | - ctx->direction = DIR_INBOUND; |
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192 | - |
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193 | - return crypto4xx_build_pd(&req->base, ctx, req->src, |
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194 | - (struct scatterlist *) req->result, |
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195 | - req->nbytes, NULL, 0); |
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196 | + return crypto4xx_build_pd(&req->base, ctx, req->src, &dst, |
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197 | + req->nbytes, NULL, 0, ctx->sa_in, |
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198 | + ctx->sa_len); |
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199 | } |
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200 | |||
201 | int crypto4xx_hash_final(struct ahash_request *req) |
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202 | @@ -332,14 +325,16 @@ int crypto4xx_hash_final(struct ahash_re |
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203 | |||
204 | int crypto4xx_hash_digest(struct ahash_request *req) |
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205 | { |
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206 | + struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); |
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207 | struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); |
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208 | + struct scatterlist dst; |
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209 | + unsigned int ds = crypto_ahash_digestsize(ahash); |
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210 | |||
211 | - ctx->pd_ctl = 0x11; |
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212 | - ctx->direction = DIR_INBOUND; |
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213 | + sg_init_one(&dst, req->result, ds); |
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214 | |||
215 | - return crypto4xx_build_pd(&req->base, ctx, req->src, |
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216 | - (struct scatterlist *) req->result, |
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217 | - req->nbytes, NULL, 0); |
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218 | + return crypto4xx_build_pd(&req->base, ctx, req->src, &dst, |
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219 | + req->nbytes, NULL, 0, ctx->sa_in, |
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220 | + ctx->sa_len); |
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221 | } |
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222 | |||
223 | /** |
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224 | --- a/drivers/crypto/amcc/crypto4xx_core.c |
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225 | +++ b/drivers/crypto/amcc/crypto4xx_core.c |
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226 | @@ -194,7 +194,6 @@ void crypto4xx_free_state_record(struct |
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227 | static u32 crypto4xx_build_pdr(struct crypto4xx_device *dev) |
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228 | { |
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229 | int i; |
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230 | - struct pd_uinfo *pd_uinfo; |
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231 | dev->pdr = dma_alloc_coherent(dev->core_dev->device, |
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232 | sizeof(struct ce_pd) * PPC4XX_NUM_PD, |
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233 | &dev->pdr_pa, GFP_ATOMIC); |
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234 | @@ -224,11 +223,14 @@ static u32 crypto4xx_build_pdr(struct cr |
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235 | if (!dev->shadow_sr_pool) |
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236 | return -ENOMEM; |
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237 | for (i = 0; i < PPC4XX_NUM_PD; i++) { |
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238 | - pd_uinfo = &dev->pdr_uinfo[i]; |
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239 | + struct ce_pd *pd = &dev->pdr[i]; |
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240 | + struct pd_uinfo *pd_uinfo = &dev->pdr_uinfo[i]; |
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241 | + |
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242 | + pd->sa = dev->shadow_sa_pool_pa + |
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243 | + sizeof(union shadow_sa_buf) * i; |
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244 | |||
245 | /* alloc 256 bytes which is enough for any kind of dynamic sa */ |
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246 | pd_uinfo->sa_va = &dev->shadow_sa_pool[i].sa; |
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247 | - pd_uinfo->sa_pa = dev->shadow_sa_pool_pa + 256 * i; |
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248 | |||
249 | /* alloc state record */ |
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250 | pd_uinfo->sr_va = &dev->shadow_sr_pool[i]; |
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251 | @@ -291,14 +293,6 @@ static u32 crypto4xx_put_pd_to_pdr(struc |
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252 | return 0; |
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253 | } |
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254 | |||
255 | -static struct ce_pd *crypto4xx_get_pdp(struct crypto4xx_device *dev, |
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256 | - dma_addr_t *pd_dma, u32 idx) |
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257 | -{ |
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258 | - *pd_dma = dev->pdr_pa + sizeof(struct ce_pd) * idx; |
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259 | - |
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260 | - return &dev->pdr[idx]; |
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261 | -} |
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262 | - |
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263 | /** |
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264 | * alloc memory for the gather ring |
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265 | * no need to alloc buf for the ring |
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266 | @@ -520,18 +514,16 @@ static void crypto4xx_copy_pkt_to_dst(st |
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267 | } |
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268 | } |
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269 | |||
270 | -static u32 crypto4xx_copy_digest_to_dst(struct pd_uinfo *pd_uinfo, |
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271 | +static void crypto4xx_copy_digest_to_dst(void *dst, |
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272 | + struct pd_uinfo *pd_uinfo, |
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273 | struct crypto4xx_ctx *ctx) |
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274 | { |
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275 | struct dynamic_sa_ctl *sa = (struct dynamic_sa_ctl *) ctx->sa_in; |
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276 | |||
277 | if (sa->sa_command_0.bf.hash_alg == SA_HASH_ALG_SHA1) { |
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278 | - memcpy((void *) pd_uinfo->dest_va, |
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279 | - pd_uinfo->sr_va->save_digest, |
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280 | + memcpy(dst, pd_uinfo->sr_va->save_digest, |
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281 | SA_HASH_ALG_SHA1_DIGEST_SIZE); |
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282 | } |
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283 | - |
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284 | - return 0; |
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285 | } |
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286 | |||
287 | static void crypto4xx_ret_sg_desc(struct crypto4xx_device *dev, |
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288 | @@ -591,7 +583,7 @@ static u32 crypto4xx_ahash_done(struct c |
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289 | ahash_req = ahash_request_cast(pd_uinfo->async_req); |
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290 | ctx = crypto_tfm_ctx(ahash_req->base.tfm); |
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291 | |||
292 | - crypto4xx_copy_digest_to_dst(pd_uinfo, |
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293 | + crypto4xx_copy_digest_to_dst(ahash_req->result, pd_uinfo, |
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294 | crypto_tfm_ctx(ahash_req->base.tfm)); |
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295 | crypto4xx_ret_sg_desc(dev, pd_uinfo); |
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296 | |||
297 | @@ -651,17 +643,17 @@ static u32 get_next_sd(u32 current) |
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298 | return 0; |
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299 | } |
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300 | |||
301 | -u32 crypto4xx_build_pd(struct crypto_async_request *req, |
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302 | +int crypto4xx_build_pd(struct crypto_async_request *req, |
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303 | struct crypto4xx_ctx *ctx, |
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304 | struct scatterlist *src, |
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305 | struct scatterlist *dst, |
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306 | - unsigned int datalen, |
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307 | - void *iv, u32 iv_len) |
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308 | + const unsigned int datalen, |
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309 | + const __le32 *iv, const u32 iv_len, |
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310 | + const struct dynamic_sa_ctl *req_sa, |
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311 | + const unsigned int sa_len) |
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312 | { |
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313 | struct crypto4xx_device *dev = ctx->dev; |
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314 | - dma_addr_t addr, pd_dma, sd_dma, gd_dma; |
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315 | struct dynamic_sa_ctl *sa; |
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316 | - struct scatterlist *sg; |
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317 | struct ce_gd *gd; |
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318 | struct ce_pd *pd; |
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319 | u32 num_gd, num_sd; |
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320 | @@ -669,8 +661,9 @@ u32 crypto4xx_build_pd(struct crypto_asy |
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321 | u32 fst_sd = 0xffffffff; |
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322 | u32 pd_entry; |
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323 | unsigned long flags; |
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324 | - struct pd_uinfo *pd_uinfo = NULL; |
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325 | - unsigned int nbytes = datalen, idx; |
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326 | + struct pd_uinfo *pd_uinfo; |
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327 | + unsigned int nbytes = datalen; |
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328 | + size_t offset_to_sr_ptr; |
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329 | u32 gd_idx = 0; |
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330 | bool is_busy; |
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331 | |||
332 | @@ -684,7 +677,7 @@ u32 crypto4xx_build_pd(struct crypto_asy |
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333 | num_gd = 0; |
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334 | |||
335 | /* figure how many sd is needed */ |
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336 | - if (sg_is_last(dst) || ctx->is_hash) { |
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337 | + if (sg_is_last(dst)) { |
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338 | num_sd = 0; |
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339 | } else { |
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340 | if (datalen > PPC4XX_SD_BUFFER_SIZE) { |
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341 | @@ -755,37 +748,27 @@ u32 crypto4xx_build_pd(struct crypto_asy |
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342 | } |
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343 | spin_unlock_irqrestore(&dev->core_dev->lock, flags); |
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344 | |||
345 | + pd = &dev->pdr[pd_entry]; |
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346 | + pd->sa_len = sa_len; |
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347 | + |
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348 | pd_uinfo = &dev->pdr_uinfo[pd_entry]; |
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349 | - pd = crypto4xx_get_pdp(dev, &pd_dma, pd_entry); |
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350 | pd_uinfo->async_req = req; |
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351 | pd_uinfo->num_gd = num_gd; |
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352 | pd_uinfo->num_sd = num_sd; |
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353 | |||
354 | - if (iv_len || ctx->is_hash) { |
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355 | - pd->sa = pd_uinfo->sa_pa; |
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356 | - sa = pd_uinfo->sa_va; |
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357 | - if (ctx->direction == DIR_INBOUND) |
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358 | - memcpy(sa, ctx->sa_in, ctx->sa_len * 4); |
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359 | - else |
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360 | - memcpy(sa, ctx->sa_out, ctx->sa_len * 4); |
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361 | + if (iv_len) |
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362 | + memcpy(pd_uinfo->sr_va->save_iv, iv, iv_len); |
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363 | |||
364 | - memcpy((void *) sa + ctx->offset_to_sr_ptr, |
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365 | - &pd_uinfo->sr_pa, 4); |
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366 | + sa = pd_uinfo->sa_va; |
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367 | + memcpy(sa, req_sa, sa_len * 4); |
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368 | + |
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369 | + offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(sa); |
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370 | + *(u32 *)((unsigned long)sa + offset_to_sr_ptr) = pd_uinfo->sr_pa; |
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371 | |||
372 | - if (iv_len) |
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373 | - crypto4xx_memcpy_to_le32(pd_uinfo->sr_va->save_iv, |
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374 | - iv, iv_len); |
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375 | - } else { |
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376 | - if (ctx->direction == DIR_INBOUND) { |
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377 | - pd->sa = ctx->sa_in_dma_addr; |
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378 | - sa = ctx->sa_in; |
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379 | - } else { |
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380 | - pd->sa = ctx->sa_out_dma_addr; |
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381 | - sa = ctx->sa_out; |
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382 | - } |
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383 | - } |
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384 | - pd->sa_len = ctx->sa_len; |
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385 | if (num_gd) { |
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386 | + dma_addr_t gd_dma; |
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387 | + struct scatterlist *sg; |
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388 | + |
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389 | /* get first gd we are going to use */ |
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390 | gd_idx = fst_gd; |
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391 | pd_uinfo->first_gd = fst_gd; |
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392 | @@ -794,27 +777,30 @@ u32 crypto4xx_build_pd(struct crypto_asy |
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393 | pd->src = gd_dma; |
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394 | /* enable gather */ |
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395 | sa->sa_command_0.bf.gather = 1; |
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396 | - idx = 0; |
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397 | - src = &src[0]; |
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398 | /* walk the sg, and setup gather array */ |
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399 | + |
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400 | + sg = src; |
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401 | while (nbytes) { |
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402 | - sg = &src[idx]; |
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403 | - addr = dma_map_page(dev->core_dev->device, sg_page(sg), |
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404 | - sg->offset, sg->length, DMA_TO_DEVICE); |
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405 | - gd->ptr = addr; |
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406 | - gd->ctl_len.len = sg->length; |
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407 | + size_t len; |
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408 | + |
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409 | + len = min(sg->length, nbytes); |
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410 | + gd->ptr = dma_map_page(dev->core_dev->device, |
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411 | + sg_page(sg), sg->offset, len, DMA_TO_DEVICE); |
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412 | + gd->ctl_len.len = len; |
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413 | gd->ctl_len.done = 0; |
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414 | gd->ctl_len.ready = 1; |
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415 | - if (sg->length >= nbytes) |
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416 | + if (len >= nbytes) |
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417 | break; |
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418 | + |
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419 | nbytes -= sg->length; |
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420 | gd_idx = get_next_gd(gd_idx); |
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421 | gd = crypto4xx_get_gdp(dev, &gd_dma, gd_idx); |
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422 | - idx++; |
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423 | + sg = sg_next(sg); |
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424 | } |
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425 | } else { |
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426 | pd->src = (u32)dma_map_page(dev->core_dev->device, sg_page(src), |
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427 | - src->offset, src->length, DMA_TO_DEVICE); |
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428 | + src->offset, min(nbytes, src->length), |
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429 | + DMA_TO_DEVICE); |
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430 | /* |
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431 | * Disable gather in sa command |
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432 | */ |
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433 | @@ -825,25 +811,24 @@ u32 crypto4xx_build_pd(struct crypto_asy |
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434 | pd_uinfo->first_gd = 0xffffffff; |
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435 | pd_uinfo->num_gd = 0; |
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436 | } |
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437 | - if (ctx->is_hash || sg_is_last(dst)) { |
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438 | + if (sg_is_last(dst)) { |
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439 | /* |
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440 | * we know application give us dst a whole piece of memory |
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441 | * no need to use scatter ring. |
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442 | - * In case of is_hash, the icv is always at end of src data. |
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443 | */ |
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444 | pd_uinfo->using_sd = 0; |
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445 | pd_uinfo->first_sd = 0xffffffff; |
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446 | pd_uinfo->num_sd = 0; |
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447 | pd_uinfo->dest_va = dst; |
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448 | sa->sa_command_0.bf.scatter = 0; |
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449 | - if (ctx->is_hash) |
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450 | - pd->dest = virt_to_phys((void *)dst); |
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451 | - else |
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452 | - pd->dest = (u32)dma_map_page(dev->core_dev->device, |
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453 | - sg_page(dst), dst->offset, |
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454 | - dst->length, DMA_TO_DEVICE); |
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455 | + pd->dest = (u32)dma_map_page(dev->core_dev->device, |
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456 | + sg_page(dst), dst->offset, |
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457 | + min(datalen, dst->length), |
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458 | + DMA_TO_DEVICE); |
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459 | } else { |
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460 | + dma_addr_t sd_dma; |
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461 | struct ce_sd *sd = NULL; |
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462 | + |
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463 | u32 sd_idx = fst_sd; |
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464 | nbytes = datalen; |
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465 | sa->sa_command_0.bf.scatter = 1; |
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466 | @@ -857,7 +842,6 @@ u32 crypto4xx_build_pd(struct crypto_asy |
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467 | sd->ctl.done = 0; |
||
468 | sd->ctl.rdy = 1; |
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469 | /* sd->ptr should be setup by sd_init routine*/ |
||
470 | - idx = 0; |
||
471 | if (nbytes >= PPC4XX_SD_BUFFER_SIZE) |
||
472 | nbytes -= PPC4XX_SD_BUFFER_SIZE; |
||
473 | else |
||
474 | @@ -868,19 +852,23 @@ u32 crypto4xx_build_pd(struct crypto_asy |
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475 | /* setup scatter descriptor */ |
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476 | sd->ctl.done = 0; |
||
477 | sd->ctl.rdy = 1; |
||
478 | - if (nbytes >= PPC4XX_SD_BUFFER_SIZE) |
||
479 | + if (nbytes >= PPC4XX_SD_BUFFER_SIZE) { |
||
480 | nbytes -= PPC4XX_SD_BUFFER_SIZE; |
||
481 | - else |
||
482 | + } else { |
||
483 | /* |
||
484 | * SD entry can hold PPC4XX_SD_BUFFER_SIZE, |
||
485 | * which is more than nbytes, so done. |
||
486 | */ |
||
487 | nbytes = 0; |
||
488 | + } |
||
489 | } |
||
490 | } |
||
491 | |||
492 | sa->sa_command_1.bf.hash_crypto_offset = 0; |
||
493 | - pd->pd_ctl.w = ctx->pd_ctl; |
||
494 | + pd->pd_ctl.w = 0; |
||
495 | + pd->pd_ctl.bf.hash_final = |
||
496 | + (crypto_tfm_alg_type(req->tfm) == CRYPTO_ALG_TYPE_AHASH); |
||
497 | + pd->pd_ctl.bf.host_ready = 1; |
||
498 | pd->pd_ctl_len.w = 0x00400000 | datalen; |
||
499 | pd_uinfo->state = PD_ENTRY_INUSE | (is_busy ? PD_ENTRY_BUSY : 0); |
||
500 | |||
501 | --- a/drivers/crypto/amcc/crypto4xx_core.h |
||
502 | +++ b/drivers/crypto/amcc/crypto4xx_core.h |
||
503 | @@ -71,7 +71,6 @@ struct pd_uinfo { |
||
504 | u32 num_sd; /* number of scatter discriptors |
||
505 | used by this packet */ |
||
506 | struct dynamic_sa_ctl *sa_va; /* shadow sa */ |
||
507 | - u32 sa_pa; |
||
508 | struct sa_state_record *sr_va; /* state record for shadow sa */ |
||
509 | u32 sr_pa; |
||
510 | struct scatterlist *dest_va; |
||
511 | @@ -129,11 +128,6 @@ struct crypto4xx_ctx { |
||
512 | struct sa_state_record *state_record; |
||
513 | dma_addr_t state_record_dma_addr; |
||
514 | u32 sa_len; |
||
515 | - u32 offset_to_sr_ptr; /* offset to state ptr, in dynamic sa */ |
||
516 | - u32 direction; |
||
517 | - u32 save_iv; |
||
518 | - u32 pd_ctl; |
||
519 | - u32 is_hash; |
||
520 | }; |
||
521 | |||
522 | struct crypto4xx_alg_common { |
||
523 | @@ -170,8 +164,10 @@ int crypto4xx_build_pd(struct crypto_asy |
||
524 | struct crypto4xx_ctx *ctx, |
||
525 | struct scatterlist *src, |
||
526 | struct scatterlist *dst, |
||
527 | - unsigned int datalen, |
||
528 | - void *iv, u32 iv_len); |
||
529 | + const unsigned int datalen, |
||
530 | + const __le32 *iv, const u32 iv_len, |
||
531 | + const struct dynamic_sa_ctl *sa, |
||
532 | + const unsigned int sa_len); |
||
533 | int crypto4xx_setkey_aes_cbc(struct crypto_ablkcipher *cipher, |
||
534 | const u8 *key, unsigned int keylen); |
||
535 | int crypto4xx_setkey_aes_cfb(struct crypto_ablkcipher *cipher, |