OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 17fa032671f7981628fe16b30399638842a4b1bb Mon Sep 17 00:00:00 2001 |
2 | From: Heiko Schocher <hs@denx.de> |
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3 | Date: Wed, 18 Jan 2017 08:05:49 +0100 |
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4 | Subject: [PATCH] serial, ns16550: bugfix: ns16550 fifo not enabled |
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5 | |||
6 | commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor" |
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7 | breaks u-boot commandline working with long commands |
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8 | sending to the board. |
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9 | |||
10 | Since the above patch, you have to setup the fcr register. |
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11 | |||
12 | For board/archs which enable OF_PLATDATA, the new field |
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13 | fcr in struct ns16550_platdata is not filled with a |
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14 | default value ... |
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15 | |||
16 | This leads in not setting up the uarts fifo, which ends |
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17 | in problems, when you send long commands to u-boots |
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18 | commandline. |
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19 | |||
20 | Detected this issue with automated tbot tests on am335x |
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21 | based shc board. |
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22 | |||
23 | The error does not popup, if you type commands. You need |
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24 | to copy&paste a long command to u-boots commandshell |
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25 | (or send a long command with tbot) |
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26 | |||
27 | Possible boards/plattforms with problems: |
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28 | ./arch/arm/cpu/arm926ejs/lpc32xx/devices.c |
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29 | ./arch/arm/mach-tegra/board.c |
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30 | ./board/overo/overo.c |
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31 | ./board/quipos/cairo/cairo.c |
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32 | ./board/logicpd/omap3som/omap3logic.c |
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33 | ./board/logicpd/zoom1/zoom1.c |
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34 | ./board/timll/devkit8000/devkit8000.c |
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35 | ./board/lg/sniper/sniper.c |
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36 | ./board/ti/beagle/beagle.c |
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37 | ./drivers/serial/serial_rockchip.c |
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38 | |||
39 | Signed-off-by: Heiko Schocher <hs@denx.de> |
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40 | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> |
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41 | Tested-by: Adam Ford <aford173@gmail.com> |
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42 | Reviewed-by: Tom Rini <trini@konsulko.com> |
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43 | --- |
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44 | arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 12 ++++++++---- |
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45 | arch/arm/mach-omap2/am33xx/board.c | 18 ++++++++++++------ |
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46 | arch/arm/mach-tegra/board.c | 1 + |
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47 | board/isee/igep00x0/igep00x0.c | 3 ++- |
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48 | board/lg/sniper/sniper.c | 3 ++- |
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49 | board/logicpd/omap3som/omap3logic.c | 3 ++- |
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50 | board/logicpd/zoom1/zoom1.c | 3 ++- |
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51 | board/overo/overo.c | 3 ++- |
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52 | board/quipos/cairo/cairo.c | 3 ++- |
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53 | board/ti/beagle/beagle.c | 3 ++- |
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54 | board/timll/devkit8000/devkit8000.c | 3 ++- |
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55 | drivers/serial/ns16550.c | 9 +++------ |
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56 | drivers/serial/serial_rockchip.c | 1 + |
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57 | include/ns16550.h | 5 +++++ |
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58 | 14 files changed, 46 insertions(+), 24 deletions(-) |
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59 | |||
60 | diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c |
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61 | index 399b07c5420a..f744398ca7ad 100644 |
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62 | --- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c |
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63 | +++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c |
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64 | @@ -45,10 +45,14 @@ void lpc32xx_uart_init(unsigned int uart_id) |
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65 | |||
66 | #if !CONFIG_IS_ENABLED(OF_CONTROL) |
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67 | static const struct ns16550_platdata lpc32xx_uart[] = { |
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68 | - { .base = UART3_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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69 | - { .base = UART4_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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70 | - { .base = UART5_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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71 | - { .base = UART6_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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72 | + { .base = UART3_BASE, .reg_shift = 2, |
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73 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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74 | + { .base = UART4_BASE, .reg_shift = 2, |
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75 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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76 | + { .base = UART5_BASE, .reg_shift = 2, |
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77 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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78 | + { .base = UART6_BASE, .reg_shift = 2, |
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79 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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80 | }; |
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81 | |||
82 | #if defined(CONFIG_LPC32XX_HSUART) |
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83 | diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c |
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84 | index 73824df18fa7..190310fd0079 100644 |
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85 | --- a/arch/arm/mach-omap2/am33xx/board.c |
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86 | +++ b/arch/arm/mach-omap2/am33xx/board.c |
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87 | @@ -40,14 +40,20 @@ DECLARE_GLOBAL_DATA_PTR; |
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88 | |||
89 | #if !CONFIG_IS_ENABLED(OF_CONTROL) |
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90 | static const struct ns16550_platdata am33xx_serial[] = { |
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91 | - { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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92 | + { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, |
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93 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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94 | # ifdef CONFIG_SYS_NS16550_COM2 |
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95 | - { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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96 | + { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, |
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97 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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98 | # ifdef CONFIG_SYS_NS16550_COM3 |
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99 | - { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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100 | - { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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101 | - { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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102 | - { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, |
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103 | + { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, |
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104 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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105 | + { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, |
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106 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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107 | + { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, |
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108 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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109 | + { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, |
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110 | + .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, |
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111 | # endif |
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112 | # endif |
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113 | }; |
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114 | diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c |
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115 | index 3d1d26d13d13..b3a041b539af 100644 |
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116 | --- a/arch/arm/mach-tegra/board.c |
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117 | +++ b/arch/arm/mach-tegra/board.c |
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118 | @@ -219,6 +219,7 @@ static struct ns16550_platdata ns16550_com1_pdata = { |
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119 | .base = CONFIG_SYS_NS16550_COM1, |
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120 | .reg_shift = 2, |
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121 | .clock = CONFIG_SYS_NS16550_CLK, |
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122 | + .fcr = UART_FCR_DEFVAL, |
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123 | }; |
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124 | |||
125 | U_BOOT_DEVICE(ns16550_com1) = { |
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126 | diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c |
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127 | index ae7959b1eb6e..5a3498f570a6 100644 |
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128 | --- a/board/isee/igep00x0/igep00x0.c |
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129 | +++ b/board/isee/igep00x0/igep00x0.c |
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130 | @@ -32,7 +32,8 @@ DECLARE_GLOBAL_DATA_PTR; |
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131 | static const struct ns16550_platdata igep_serial = { |
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132 | .base = OMAP34XX_UART3, |
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133 | .reg_shift = 2, |
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134 | - .clock = V_NS16550_CLK |
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135 | + .clock = V_NS16550_CLK, |
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136 | + .fcr = UART_FCR_DEFVAL, |
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137 | }; |
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138 | |||
139 | U_BOOT_DEVICE(igep_uart) = { |
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140 | diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c |
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141 | index 0662449c3875..b2b8f8861f11 100644 |
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142 | --- a/board/lg/sniper/sniper.c |
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143 | +++ b/board/lg/sniper/sniper.c |
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144 | @@ -31,7 +31,8 @@ const omap3_sysinfo sysinfo = { |
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145 | static const struct ns16550_platdata serial_omap_platdata = { |
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146 | .base = OMAP34XX_UART3, |
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147 | .reg_shift = 2, |
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148 | - .clock = V_NS16550_CLK |
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149 | + .clock = V_NS16550_CLK, |
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150 | + .fcr = UART_FCR_DEFVAL, |
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151 | }; |
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152 | |||
153 | U_BOOT_DEVICE(sniper_serial) = { |
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154 | diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c |
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155 | index 21b3fdcf49cf..b2fcc28f8b4b 100644 |
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156 | --- a/board/logicpd/omap3som/omap3logic.c |
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157 | +++ b/board/logicpd/omap3som/omap3logic.c |
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158 | @@ -49,7 +49,8 @@ DECLARE_GLOBAL_DATA_PTR; |
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159 | static const struct ns16550_platdata omap3logic_serial = { |
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160 | .base = OMAP34XX_UART1, |
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161 | .reg_shift = 2, |
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162 | - .clock = V_NS16550_CLK |
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163 | + .clock = V_NS16550_CLK, |
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164 | + .fcr = UART_FCR_DEFVAL, |
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165 | }; |
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166 | |||
167 | U_BOOT_DEVICE(omap3logic_uart) = { |
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168 | diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c |
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169 | index 2821ee22674f..0fad23af62f6 100644 |
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170 | --- a/board/logicpd/zoom1/zoom1.c |
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171 | +++ b/board/logicpd/zoom1/zoom1.c |
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172 | @@ -47,7 +47,8 @@ static const u32 gpmc_lab_enet[] = { |
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173 | static const struct ns16550_platdata zoom1_serial = { |
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174 | .base = OMAP34XX_UART3, |
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175 | .reg_shift = 2, |
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176 | - .clock = V_NS16550_CLK |
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177 | + .clock = V_NS16550_CLK, |
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178 | + .fcr = UART_FCR_DEFVAL, |
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179 | }; |
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180 | |||
181 | U_BOOT_DEVICE(zoom1_uart) = { |
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182 | diff --git a/board/overo/overo.c b/board/overo/overo.c |
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183 | index 40f13e5876cc..5e447262bcfd 100644 |
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184 | --- a/board/overo/overo.c |
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185 | +++ b/board/overo/overo.c |
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186 | @@ -70,7 +70,8 @@ static struct { |
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187 | static const struct ns16550_platdata overo_serial = { |
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188 | .base = OMAP34XX_UART3, |
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189 | .reg_shift = 2, |
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190 | - .clock = V_NS16550_CLK |
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191 | + .clock = V_NS16550_CLK, |
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192 | + .fcr = UART_FCR_DEFVAL, |
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193 | }; |
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194 | |||
195 | U_BOOT_DEVICE(overo_uart) = { |
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196 | diff --git a/board/quipos/cairo/cairo.c b/board/quipos/cairo/cairo.c |
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197 | index 77e4482906f0..793aa9023150 100644 |
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198 | --- a/board/quipos/cairo/cairo.c |
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199 | +++ b/board/quipos/cairo/cairo.c |
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200 | @@ -93,7 +93,8 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) |
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201 | static const struct ns16550_platdata cairo_serial = { |
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202 | .base = OMAP34XX_UART2, |
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203 | .reg_shift = 2, |
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204 | - .clock = V_NS16550_CLK |
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205 | + .clock = V_NS16550_CLK, |
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206 | + .fcr = UART_FCR_DEFVAL, |
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207 | }; |
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208 | |||
209 | U_BOOT_DEVICE(cairo_uart) = { |
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210 | diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c |
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211 | index cfdab3e34253..23c79333a223 100644 |
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212 | --- a/board/ti/beagle/beagle.c |
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213 | +++ b/board/ti/beagle/beagle.c |
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214 | @@ -75,7 +75,8 @@ static struct { |
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215 | static const struct ns16550_platdata beagle_serial = { |
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216 | .base = OMAP34XX_UART3, |
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217 | .reg_shift = 2, |
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218 | - .clock = V_NS16550_CLK |
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219 | + .clock = V_NS16550_CLK, |
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220 | + .fcr = UART_FCR_DEFVAL, |
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221 | }; |
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222 | |||
223 | U_BOOT_DEVICE(beagle_uart) = { |
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224 | diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c |
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225 | index f785dbe6d732..b2f060b2ddbf 100644 |
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226 | --- a/board/timll/devkit8000/devkit8000.c |
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227 | +++ b/board/timll/devkit8000/devkit8000.c |
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228 | @@ -48,7 +48,8 @@ static u32 gpmc_net_config[GPMC_MAX_REG] = { |
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229 | static const struct ns16550_platdata devkit8000_serial = { |
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230 | .base = OMAP34XX_UART3, |
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231 | .reg_shift = 2, |
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232 | - .clock = V_NS16550_CLK |
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233 | + .clock = V_NS16550_CLK, |
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234 | + .fcr = UART_FCR_DEFVAL, |
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235 | }; |
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236 | |||
237 | U_BOOT_DEVICE(devkit8000_uart) = { |
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238 | diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c |
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239 | index 9b423a591d8a..2df4a1f04fe5 100644 |
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240 | --- a/drivers/serial/ns16550.c |
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241 | +++ b/drivers/serial/ns16550.c |
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242 | @@ -20,9 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; |
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243 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
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244 | #define UART_MCRVAL (UART_MCR_DTR | \ |
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245 | UART_MCR_RTS) /* RTS/DTR */ |
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246 | -#define UART_FCRVAL (UART_FCR_FIFO_EN | \ |
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247 | - UART_FCR_RXSR | \ |
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248 | - UART_FCR_TXSR) /* Clear & enable FIFOs */ |
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249 | |||
250 | #ifndef CONFIG_DM_SERIAL |
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251 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
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252 | @@ -138,7 +135,7 @@ static u32 ns16550_getfcr(NS16550_t port) |
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253 | #else |
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254 | static u32 ns16550_getfcr(NS16550_t port) |
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255 | { |
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256 | - return UART_FCRVAL; |
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257 | + return UART_FCR_DEFVAL; |
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258 | } |
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259 | #endif |
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260 | |||
261 | @@ -275,7 +272,7 @@ static inline void _debug_uart_init(void) |
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262 | CONFIG_BAUDRATE); |
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263 | serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); |
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264 | serial_dout(&com_port->mcr, UART_MCRVAL); |
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265 | - serial_dout(&com_port->fcr, UART_FCRVAL); |
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266 | + serial_dout(&com_port->fcr, UART_FCR_DEFVAL); |
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267 | |||
268 | serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); |
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269 | serial_dout(&com_port->dll, baud_divisor & 0xff); |
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270 | @@ -440,7 +437,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) |
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271 | return -EINVAL; |
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272 | } |
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273 | |||
274 | - plat->fcr = UART_FCRVAL; |
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275 | + plat->fcr = UART_FCR_DEFVAL; |
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276 | if (port_type == PORT_JZ4780) |
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277 | plat->fcr |= UART_FCR_UME; |
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278 | |||
279 | diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c |
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280 | index 6bac95a414ce..c06afc58f7ea 100644 |
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281 | --- a/drivers/serial/serial_rockchip.c |
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282 | +++ b/drivers/serial/serial_rockchip.c |
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283 | @@ -27,6 +27,7 @@ static int rockchip_serial_probe(struct udevice *dev) |
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284 | plat->plat.base = plat->dtplat.reg[0]; |
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285 | plat->plat.reg_shift = plat->dtplat.reg_shift; |
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286 | plat->plat.clock = plat->dtplat.clock_frequency; |
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287 | + plat->plat.fcr = UART_FCR_DEFVAL; |
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288 | dev->platdata = &plat->plat; |
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289 | |||
290 | return ns16550_serial_probe(dev); |
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291 | diff --git a/include/ns16550.h b/include/ns16550.h |
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292 | index 7c9703683109..5fcbcd2e74e3 100644 |
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293 | --- a/include/ns16550.h |
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294 | +++ b/include/ns16550.h |
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295 | @@ -121,6 +121,11 @@ typedef struct NS16550 *NS16550_t; |
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296 | /* Ingenic JZ47xx specific UART-enable bit. */ |
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297 | #define UART_FCR_UME 0x10 |
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298 | |||
299 | +/* Clear & enable FIFOs */ |
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300 | +#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | \ |
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301 | + UART_FCR_RXSR | \ |
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302 | + UART_FCR_TXSR) |
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303 | + |
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304 | /* |
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305 | * These are the definitions for the Modem Control Register |
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306 | */ |
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307 | -- |
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308 | 2.17.0 |
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309 |