OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 54a31b334162e8dc2ea891057ddeab42978db8b3 Mon Sep 17 00:00:00 2001 |
2 | From: Luka Perkov <luka@openwrt.org> |
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3 | Date: Sat, 2 Mar 2013 23:34:00 +0100 |
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4 | Subject: MIPS: add board support for Arcadyan ARV7518 |
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5 | |||
6 | Signed-off-by: Luka Perkov <luka@openwrt.org> |
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7 | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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8 | |||
9 | --- /dev/null |
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10 | +++ b/board/arcadyan/arv7518pw/Makefile |
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11 | @@ -0,0 +1,27 @@ |
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12 | +# |
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13 | +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de |
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14 | +# |
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15 | +# SPDX-License-Identifier: GPL-2.0+ |
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16 | +# |
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17 | + |
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18 | +include $(TOPDIR)/config.mk |
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19 | + |
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20 | +LIB = $(obj)lib$(BOARD).o |
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21 | + |
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22 | +COBJS = $(BOARD).o |
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23 | + |
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24 | +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) |
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25 | +OBJS := $(addprefix $(obj),$(COBJS)) |
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26 | +SOBJS := $(addprefix $(obj),$(SOBJS)) |
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27 | + |
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28 | +$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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29 | + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) |
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30 | + |
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31 | +######################################################################### |
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32 | + |
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33 | +# defines $(obj).depend target |
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34 | +include $(SRCTREE)/rules.mk |
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35 | + |
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36 | +sinclude $(obj).depend |
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37 | + |
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38 | +######################################################################### |
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39 | --- /dev/null |
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40 | +++ b/board/arcadyan/arv7518pw/arv7518pw.c |
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41 | @@ -0,0 +1,51 @@ |
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42 | +/* |
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43 | + * Copyright (C) 2012 Luka Perkov <luka@openwrt.org> |
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44 | + * |
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45 | + * SPDX-License-Identifier: GPL-2.0+ |
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46 | + */ |
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47 | + |
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48 | +#include <common.h> |
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49 | +#include <switch.h> |
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50 | +#include <asm/gpio.h> |
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51 | +#include <asm/lantiq/eth.h> |
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52 | +#include <asm/lantiq/reset.h> |
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53 | +#include <asm/lantiq/chipid.h> |
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54 | + |
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55 | +int board_early_init_f(void) |
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56 | +{ |
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57 | + return 0; |
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58 | +} |
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59 | + |
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60 | +int checkboard(void) |
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61 | +{ |
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62 | + puts("Board: " CONFIG_BOARD_NAME "\n"); |
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63 | + ltq_chip_print_info(); |
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64 | + |
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65 | + return 0; |
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66 | +} |
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67 | + |
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68 | +static const struct ltq_eth_port_config eth_port_config[] = { |
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69 | + /* MAC0: Atheros ar8216 switch */ |
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70 | + { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_NONE }, |
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71 | +}; |
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72 | + |
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73 | +static const struct ltq_eth_board_config eth_board_config = { |
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74 | + .ports = eth_port_config, |
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75 | + .num_ports = ARRAY_SIZE(eth_port_config), |
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76 | +}; |
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77 | + |
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78 | +int board_eth_init(bd_t *bis) |
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79 | +{ |
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80 | + return ltq_eth_initialize(ð_board_config); |
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81 | +} |
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82 | + |
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83 | +static struct switch_device ar8216_dev = { |
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84 | + .name = "ar8216", |
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85 | + .cpu_port = 0, |
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86 | + .port_mask = 0xF, |
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87 | +}; |
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88 | + |
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89 | +int board_switch_init(void) |
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90 | +{ |
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91 | + return switch_device_register(&ar8216_dev); |
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92 | +} |
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93 | --- /dev/null |
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94 | +++ b/board/arcadyan/arv7518pw/config.mk |
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95 | @@ -0,0 +1,7 @@ |
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96 | +# |
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97 | +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com |
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98 | +# |
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99 | +# SPDX-License-Identifier: GPL-2.0+ |
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100 | +# |
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101 | + |
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102 | +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR) |
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103 | --- /dev/null |
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104 | +++ b/board/arcadyan/arv7518pw/ddr_settings.h |
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105 | @@ -0,0 +1,55 @@ |
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106 | +/* |
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107 | + * Copyright (C) 2012-2013 Luka Perkov <luka@openwrt.org> |
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108 | + * |
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109 | + * This file has been generated with lantiq_ram_extract_magic.awk script. |
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110 | + * |
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111 | + * SPDX-License-Identifier: GPL-2.0+ |
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112 | + */ |
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113 | + |
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114 | +#define MC_DC00_VALUE 0x1B1B |
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115 | +#define MC_DC01_VALUE 0x0 |
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116 | +#define MC_DC02_VALUE 0x0 |
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117 | +#define MC_DC03_VALUE 0x0 |
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118 | +#define MC_DC04_VALUE 0x0 |
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119 | +#define MC_DC05_VALUE 0x200 |
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120 | +#define MC_DC06_VALUE 0x605 |
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121 | +#define MC_DC07_VALUE 0x303 |
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122 | +#define MC_DC08_VALUE 0x102 |
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123 | +#define MC_DC09_VALUE 0x70A |
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124 | +#define MC_DC10_VALUE 0x203 |
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125 | +#define MC_DC11_VALUE 0xC02 |
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126 | +#define MC_DC12_VALUE 0x1C8 |
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127 | +#define MC_DC13_VALUE 0x1 |
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128 | +#define MC_DC14_VALUE 0x0 |
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129 | +#define MC_DC15_VALUE 0x134 |
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130 | +#define MC_DC16_VALUE 0xC800 |
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131 | +#define MC_DC17_VALUE 0xD |
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132 | +#define MC_DC18_VALUE 0x301 |
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133 | +#define MC_DC19_VALUE 0x200 |
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134 | +#define MC_DC20_VALUE 0xA03 |
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135 | +#define MC_DC21_VALUE 0x1400 |
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136 | +#define MC_DC22_VALUE 0x1414 |
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137 | +#define MC_DC23_VALUE 0x0 |
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138 | +#define MC_DC24_VALUE 0x5B |
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139 | +#define MC_DC25_VALUE 0x0 |
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140 | +#define MC_DC26_VALUE 0x0 |
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141 | +#define MC_DC27_VALUE 0x0 |
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142 | +#define MC_DC28_VALUE 0x510 |
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143 | +#define MC_DC29_VALUE 0x4E20 |
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144 | +#define MC_DC30_VALUE 0x8235 |
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145 | +#define MC_DC31_VALUE 0x0 |
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146 | +#define MC_DC32_VALUE 0x0 |
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147 | +#define MC_DC33_VALUE 0x0 |
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148 | +#define MC_DC34_VALUE 0x0 |
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149 | +#define MC_DC35_VALUE 0x0 |
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150 | +#define MC_DC36_VALUE 0x0 |
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151 | +#define MC_DC37_VALUE 0x0 |
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152 | +#define MC_DC38_VALUE 0x0 |
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153 | +#define MC_DC39_VALUE 0x0 |
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154 | +#define MC_DC40_VALUE 0x0 |
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155 | +#define MC_DC41_VALUE 0x0 |
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156 | +#define MC_DC42_VALUE 0x0 |
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157 | +#define MC_DC43_VALUE 0x0 |
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158 | +#define MC_DC44_VALUE 0x0 |
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159 | +#define MC_DC45_VALUE 0x500 |
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160 | +#define MC_DC46_VALUE 0x0 |
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161 | --- a/boards.cfg |
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162 | +++ b/boards.cfg |
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163 | @@ -505,6 +505,9 @@ Active mips mips32 au1x0 |
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164 | Active mips mips32 danube arcadyan arv4519pw arv4519pw_brn arv4519pw:SYS_BOOT_BRN Luka Perkov <luka@openwrt.org> |
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165 | Active mips mips32 danube arcadyan arv4519pw arv4519pw_nor arv4519pw:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org> |
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166 | Active mips mips32 danube arcadyan arv4519pw arv4519pw_ram arv4519pw:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org> |
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167 | +Active mips mips32 danube arcadyan arv7518pw arv7518pw_brn arv7518pw:SYS_BOOT_BRN Luka Perkov <luka@openwrt.org> |
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168 | +Active mips mips32 danube arcadyan arv7518pw arv7518pw_nor arv7518pw:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org> |
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169 | +Active mips mips32 danube arcadyan arv7518pw arv7518pw_ram arv7518pw:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org> |
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170 | Active mips mips32 danube lantiq easy50712 easy50712_nor easy50712:SYS_BOOT_NOR Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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171 | Active mips mips32 danube lantiq easy50712 easy50712_norspl easy50712:SYS_BOOT_NORSPL Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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172 | Active mips mips32 danube lantiq easy50712 easy50712_ram easy50712:SYS_BOOT_RAM Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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173 | --- /dev/null |
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174 | +++ b/include/configs/arv7518pw.h |
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175 | @@ -0,0 +1,69 @@ |
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176 | +/* |
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177 | + * Copyright (C) 2012-2013 Luka Perkov <luka@openwrt.org> |
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178 | + * |
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179 | + * SPDX-License-Identifier: GPL-2.0+ |
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180 | + */ |
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181 | + |
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182 | +#ifndef __CONFIG_H |
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183 | +#define __CONFIG_H |
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184 | + |
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185 | +#define CONFIG_MACH_TYPE "ARV7518PW" |
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186 | +#define CONFIG_IDENT_STRING " "CONFIG_MACH_TYPE |
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187 | +#define CONFIG_BOARD_NAME "Arcadyan ARV7518PW" |
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188 | + |
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189 | +/* Configure SoC */ |
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190 | +#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */ |
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191 | + |
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192 | +#define CONFIG_LTQ_SUPPORT_ETHERNET /* Enable ethernet */ |
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193 | + |
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194 | +#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */ |
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195 | + |
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196 | +#define CONFIG_SYS_BOOTM_LEN 0x1000000 /* 16 MB */ |
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197 | + |
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198 | +/* Switch devices */ |
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199 | +#define CONFIG_SWITCH_MULTI |
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200 | +#define CONFIG_SWITCH_AR8216 |
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201 | + |
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202 | +/* Environment */ |
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203 | +#if defined(CONFIG_SYS_BOOT_NOR) |
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204 | +#define CONFIG_ENV_IS_IN_FLASH |
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205 | +#define CONFIG_ENV_OVERWRITE |
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206 | +#define CONFIG_ENV_OFFSET (192 * 1024) |
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207 | +#define CONFIG_ENV_SECT_SIZE (64 * 1024) |
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208 | +#else |
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209 | +#define CONFIG_ENV_IS_NOWHERE |
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210 | +#endif |
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211 | + |
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212 | +#define CONFIG_ENV_SIZE (8 * 1024) |
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213 | +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR |
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214 | + |
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215 | +/* Brnboot loadable image */ |
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216 | +#if defined(CONFIG_SYS_BOOT_BRN) |
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217 | +#define CONFIG_SYS_TEXT_BASE 0x80002000 |
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218 | +#define CONFIG_SKIP_LOWLEVEL_INIT |
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219 | +#define CONFIG_SYS_DISABLE_CACHE |
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220 | +#define CONFIG_ENV_OVERWRITE 1 |
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221 | +#endif |
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222 | + |
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223 | +/* Console */ |
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224 | +#define CONFIG_LTQ_ADVANCED_CONSOLE |
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225 | +#define CONFIG_BAUDRATE 115200 |
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226 | +#define CONFIG_CONSOLE_ASC 1 |
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227 | +#define CONFIG_CONSOLE_DEV "ttyLTQ1" |
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228 | + |
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229 | +/* Pull in default board configs for Lantiq XWAY Danube */ |
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230 | +#include <asm/lantiq/config.h> |
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231 | +#include <asm/arch/config.h> |
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232 | + |
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233 | +/* Pull in default OpenWrt configs for Lantiq SoC */ |
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234 | +#include "openwrt-lantiq-common.h" |
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235 | + |
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236 | +#define CONFIG_ENV_UPDATE_UBOOT_NOR \ |
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237 | + "update-uboot-nor=run load-uboot-nor write-uboot-nor\0" |
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238 | + |
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239 | +#define CONFIG_EXTRA_ENV_SETTINGS \ |
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240 | + CONFIG_ENV_LANTIQ_DEFAULTS \ |
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241 | + CONFIG_ENV_UPDATE_UBOOT_NOR \ |
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242 | + "kernel_addr=0xB0040000\0" |
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243 | + |
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244 | +#endif /* __CONFIG_H */ |