OpenWrt – Blame information for rev 1
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1 | office | 1 | /* |
2 | * (C) Copyright 2010 |
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3 | * Michael Kurz <michi.kurz@googlemail.com>. |
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4 | * |
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5 | * See file CREDITS for list of people who contributed to this |
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6 | * project. |
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7 | * |
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8 | * This program is free software; you can redistribute it and/or |
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9 | * modify it under the terms of the GNU General Public License as |
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10 | * published by the Free Software Foundation; either version 2 of |
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11 | * the License, or (at your option) any later version. |
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12 | * |
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13 | * This program is distributed in the hope that it will be useful, |
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14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | * GNU General Public License for more details. |
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17 | * |
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18 | * You should have received a copy of the GNU General Public License |
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19 | * along with this program; if not, write to the Free Software |
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20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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21 | * MA 02111-1307 USA |
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22 | */ |
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23 | |||
24 | #ifndef _AR71XX_GPIO_H |
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25 | #define _AR71XX_GPIO_H |
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26 | |||
27 | #include <common.h> |
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28 | #include <asm/ar71xx.h> |
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29 | |||
30 | static inline void ar71xx_setpin(uint8_t pin, uint8_t state) |
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31 | { |
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32 | uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); |
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33 | |||
34 | if (state != 0) { |
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35 | reg |= (1 << pin); |
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36 | } else { |
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37 | reg &= ~(1 << pin); |
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38 | } |
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39 | |||
40 | writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); |
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41 | readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); |
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42 | } |
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43 | |||
44 | static inline uint32_t ar71xx_getpin(uint8_t pin) |
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45 | { |
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46 | uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_IN)); |
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47 | return (((reg & (1 << pin)) != 0) ? 1 : 0); |
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48 | } |
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49 | |||
50 | static inline void ar71xx_setpindir(uint8_t pin, uint8_t direction) |
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51 | { |
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52 | uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); |
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53 | |||
54 | if (direction != 0) { |
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55 | reg |= (1 << pin); |
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56 | } else { |
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57 | reg &= ~(1 << pin); |
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58 | } |
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59 | |||
60 | writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); |
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61 | readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); |
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62 | } |
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63 | |||
64 | |||
65 | #endif /* AR71XX_GPIO_H */ |