OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | From e8d66e7927b2a15310df0eb44a67d120ea147a59 Mon Sep 17 00:00:00 2001 |
2 | From: Gregory CLEMENT <gregory.clement@free-electrons.com> |
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3 | Date: Thu, 14 Dec 2017 16:00:06 +0100 |
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4 | Subject: arm64: dts: marvell: armada-37xx: add nodes allowing cpufreq |
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5 | support |
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6 | |||
7 | In order to be able to use cpu freq, we need to associate a clock to each |
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8 | CPU and to expose the power management registers. |
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9 | |||
10 | Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> |
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11 | --- |
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12 | arch/arm64/boot/dts/marvell/armada-372x.dtsi | 1 + |
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13 | arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 7 +++++++ |
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14 | 2 files changed, 8 insertions(+) |
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15 | |||
16 | --- a/arch/arm64/boot/dts/marvell/armada-372x.dtsi |
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17 | +++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi |
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18 | @@ -56,6 +56,7 @@ |
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19 | device_type = "cpu"; |
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20 | compatible = "arm,cortex-a53","arm,armv8"; |
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21 | reg = <0x1>; |
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22 | + clocks = <&nb_periph_clk 16>; |
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23 | enable-method = "psci"; |
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24 | }; |
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25 | }; |
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26 | --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi |
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27 | +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi |
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28 | @@ -64,6 +64,7 @@ |
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29 | device_type = "cpu"; |
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30 | compatible = "arm,cortex-a53", "arm,armv8"; |
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31 | reg = <0>; |
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32 | + clocks = <&nb_periph_clk 16>; |
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33 | enable-method = "psci"; |
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34 | }; |
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35 | }; |
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36 | @@ -219,6 +220,12 @@ |
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37 | }; |
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38 | }; |
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39 | |||
40 | + nb_pm: syscon@14000 { |
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41 | + compatible = "marvell,armada-3700-nb-pm", |
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42 | + "syscon"; |
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43 | + reg = <0x14000 0x60>; |
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44 | + }; |
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45 | + |
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46 | pinctrl_sb: pinctrl@18800 { |
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47 | compatible = "marvell,armada3710-sb-pinctrl", |
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48 | "syscon", "simple-mfd"; |