OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001 |
2 | From: Jonas Gorski <jogo@openwrt.org> |
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3 | Date: Mon, 1 Dec 2014 00:20:07 +0100 |
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4 | Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT |
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5 | |||
6 | Signed-off-by: Jonas Gorski <jogo@openwrt.org> |
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7 | --- |
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8 | arch/mips/bcm63xx/irq.c | 12 ++++++++++++ |
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9 | 1 file changed, 12 insertions(+) |
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10 | |||
11 | --- a/arch/mips/bcm63xx/irq.c |
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12 | +++ b/arch/mips/bcm63xx/irq.c |
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13 | @@ -14,6 +14,8 @@ |
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14 | #include <linux/irqchip.h> |
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15 | #include <linux/irqchip/irq-bcm6345-ext.h> |
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16 | #include <linux/irqchip/irq-bcm6345-periph.h> |
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17 | +#include <linux/of.h> |
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18 | +#include <linux/of_fdt.h> |
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19 | #include <asm/irq_cpu.h> |
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20 | #include <asm/mipsregs.h> |
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21 | #include <bcm63xx_cpu.h> |
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22 | @@ -21,6 +23,9 @@ |
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23 | #include <bcm63xx_io.h> |
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24 | #include <bcm63xx_irq.h> |
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25 | |||
26 | +IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller", |
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27 | + mips_cpu_irq_of_init); |
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28 | + |
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29 | void __init arch_init_irq(void) |
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30 | { |
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31 | void __iomem *periph_bases[2]; |
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32 | @@ -29,6 +34,13 @@ void __init arch_init_irq(void) |
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33 | int periph_irqs[2] = { 2, 3 }; |
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34 | int ext_irqs[6]; |
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35 | |||
36 | +#ifdef CONFIG_OF |
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37 | + if (initial_boot_params) { |
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38 | + irqchip_init(); |
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39 | + return; |
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40 | + } |
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41 | +#endif |
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42 | + |
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43 | periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); |
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44 | periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); |
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45 | ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); |