OpenWrt – Blame information for rev 4
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
4 | office | 1 | /* |
2 | * Abicom International Scorpion SC1750 support. |
||
3 | * |
||
4 | * Copyright (c) 2012 Qualcomm Atheros |
||
5 | * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org> |
||
6 | * Copyright (c) 2017 Conor O'Gorman <i@conorogorman.net> |
||
7 | * |
||
8 | * Permission to use, copy, modify, and/or distribute this software for any |
||
9 | * purpose with or without fee is hereby granted, provided that the above |
||
10 | * copyright notice and this permission notice appear in all copies. |
||
11 | * |
||
12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
||
13 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
||
14 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
||
15 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
||
16 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
||
17 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
||
18 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
||
19 | * |
||
20 | */ |
||
21 | |||
22 | #include <linux/platform_device.h> |
||
23 | #include <linux/platform_data/phy-at803x.h> |
||
24 | |||
25 | #include <asm/mach-ath79/ar71xx_regs.h> |
||
26 | |||
27 | #include "common.h" |
||
28 | #include "pci.h" |
||
29 | #include "dev-ap9x-pci.h" |
||
30 | #include "dev-gpio-buttons.h" |
||
31 | #include "dev-eth.h" |
||
32 | #include "dev-leds-gpio.h" |
||
33 | #include "dev-m25p80.h" |
||
34 | #include "dev-nfc.h" |
||
35 | #include "dev-usb.h" |
||
36 | #include "dev-wmac.h" |
||
37 | #include "machtypes.h" |
||
38 | |||
39 | #define SC1750_GPIO_LED_POWER 11 |
||
40 | #define SC1750_GPIO_LED_ERR1 12 |
||
41 | #define SC1750_GPIO_LED_WLAN 13 |
||
42 | #define SC1750_GPIO_LED_ERR2 14 |
||
43 | #define SC1750_GPIO_LED_OK3 15 |
||
44 | #define SC1750_GPIO_LED_ERR3 16 |
||
45 | #define SC1750_GPIO_BTN_RESET 4 |
||
46 | |||
47 | #define SC1750_KEYS_POLL_INTERVAL 20 /* msecs */ |
||
48 | #define SC1750_KEYS_DEBOUNCE_INTERVAL (3 * SC1750_KEYS_POLL_INTERVAL) |
||
49 | |||
50 | #define SC1750_MAC0_OFFSET 0 |
||
51 | #define SC1750_MAC1_OFFSET 6 |
||
52 | #define SC1750_WMAC_CALDATA_OFFSET 0x1000 |
||
53 | #define SC1750_PCIE_CALDATA_OFFSET 0x5000 |
||
54 | |||
55 | static struct gpio_led sc1750_leds_gpio[] __initdata = { |
||
56 | { |
||
57 | .name = "sc1750:green:power", |
||
58 | .gpio = SC1750_GPIO_LED_POWER, |
||
59 | .active_low = 1, |
||
60 | }, |
||
61 | { |
||
62 | .name = "sc1750:red:power", |
||
63 | .gpio = SC1750_GPIO_LED_ERR1, |
||
64 | .active_low = 1, |
||
65 | }, |
||
66 | { |
||
67 | .name = "sc1750:green:wlan", |
||
68 | .gpio = SC1750_GPIO_LED_WLAN, |
||
69 | .active_low = 1, |
||
70 | }, |
||
71 | { |
||
72 | .name = "sc1750:red:wlan", |
||
73 | .gpio = SC1750_GPIO_LED_ERR2, |
||
74 | .active_low = 1, |
||
75 | } |
||
76 | }; |
||
77 | |||
78 | static struct gpio_keys_button sc1750_gpio_keys[] __initdata = { |
||
79 | { |
||
80 | .desc = "reset", |
||
81 | .type = EV_KEY, |
||
82 | .code = KEY_RESTART, |
||
83 | .debounce_interval = SC1750_KEYS_DEBOUNCE_INTERVAL, |
||
84 | .gpio = SC1750_GPIO_BTN_RESET, |
||
85 | .active_low = 0, |
||
86 | } |
||
87 | }; |
||
88 | |||
89 | static struct at803x_platform_data at803x_data = { |
||
90 | .disable_smarteee = 1, |
||
91 | .enable_rgmii_rx_delay = 0, |
||
92 | .enable_rgmii_tx_delay = 0, |
||
93 | }; |
||
94 | |||
95 | static struct mdio_board_info sc1750_mdio0_info[] = { |
||
96 | { |
||
97 | .bus_id = "ag71xx-mdio.0", |
||
98 | .phy_addr = 1, |
||
99 | .platform_data = &at803x_data, |
||
100 | }, |
||
101 | }; |
||
102 | |||
103 | static void __init sc1750_setup(void) |
||
104 | { |
||
105 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
||
106 | |||
107 | ath79_register_m25p80(NULL); |
||
108 | |||
109 | ath79_register_leds_gpio(-1, ARRAY_SIZE(sc1750_leds_gpio), |
||
110 | sc1750_leds_gpio); |
||
111 | ath79_register_gpio_keys_polled(-1, SC1750_KEYS_POLL_INTERVAL, |
||
112 | ARRAY_SIZE(sc1750_gpio_keys), |
||
113 | sc1750_gpio_keys); |
||
114 | |||
115 | ath79_register_usb(); |
||
116 | ath79_register_nfc(); |
||
117 | |||
118 | ath79_register_wmac(art + SC1750_WMAC_CALDATA_OFFSET, NULL); |
||
119 | |||
120 | ath79_register_mdio(0, 0); |
||
121 | mdiobus_register_board_info(sc1750_mdio0_info, |
||
122 | ARRAY_SIZE(sc1750_mdio0_info)); |
||
123 | |||
124 | ath79_init_mac(ath79_eth0_data.mac_addr, art + SC1750_MAC0_OFFSET, 0); |
||
125 | |||
126 | ath79_eth0_pll_data.pll_1000 = 0xa6000101; |
||
127 | ath79_eth0_pll_data.pll_100 = 0xa4000101; |
||
128 | /* GMAC0 is connected to the RMGII interface */ |
||
129 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
||
130 | ath79_eth0_data.phy_mask = 0xF; |
||
131 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
||
132 | |||
133 | ath79_register_eth(0); |
||
134 | |||
135 | /* GMAC1 is connected to the SGMII interface */ |
||
136 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; |
||
137 | ath79_eth1_data.speed = SPEED_1000; |
||
138 | ath79_eth1_data.duplex = DUPLEX_FULL; |
||
139 | |||
140 | ath79_register_eth(1); |
||
141 | |||
142 | ath79_register_pci(); |
||
143 | } |
||
144 | |||
145 | MIPS_MACHINE(ATH79_MACH_SC1750, "SC1750", "Abicom SC1750", sc1750_setup); |