OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | / { |
2 | #address-cells = <1>; |
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3 | #size-cells = <1>; |
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4 | compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc"; |
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5 | |||
6 | cpus { |
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7 | cpu@0 { |
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8 | compatible = "mips,mips24KEc"; |
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9 | }; |
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10 | }; |
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11 | |||
12 | chosen { |
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13 | bootargs = "console=ttyS0,57600"; |
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14 | }; |
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15 | |||
16 | aliases { |
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17 | spi0 = &spi0; |
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18 | serial0 = &uartlite; |
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19 | }; |
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20 | |||
3 | office | 21 | cpuintc: cpuintc@0 { |
1 | office | 22 | #address-cells = <0>; |
23 | #interrupt-cells = <1>; |
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24 | interrupt-controller; |
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25 | compatible = "mti,cpu-interrupt-controller"; |
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26 | }; |
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27 | |||
28 | palmbus: palmbus@10000000 { |
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29 | compatible = "palmbus"; |
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30 | reg = <0x10000000 0x200000>; |
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31 | ranges = <0x0 0x10000000 0x1FFFFF>; |
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32 | |||
33 | #address-cells = <1>; |
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34 | #size-cells = <1>; |
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35 | |||
36 | sysc: sysc@0 { |
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37 | compatible = "ralink,rt3050-sysc", "syscon"; |
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38 | reg = <0x0 0x100>; |
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39 | }; |
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40 | |||
41 | timer: timer@100 { |
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42 | compatible = "ralink,rt3050-timer", "ralink,rt2880-timer"; |
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43 | reg = <0x100 0x20>; |
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44 | |||
45 | interrupt-parent = <&intc>; |
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46 | interrupts = <1>; |
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47 | }; |
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48 | |||
49 | watchdog: watchdog@120 { |
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50 | compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt"; |
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51 | reg = <0x120 0x10>; |
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52 | |||
53 | resets = <&rstctrl 8>; |
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54 | reset-names = "wdt"; |
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55 | |||
56 | interrupt-parent = <&intc>; |
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57 | interrupts = <1>; |
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58 | }; |
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59 | |||
60 | intc: intc@200 { |
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61 | compatible = "ralink,rt3050-intc", "ralink,rt2880-intc"; |
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62 | reg = <0x200 0x100>; |
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63 | |||
64 | resets = <&rstctrl 19>; |
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65 | reset-names = "intc"; |
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66 | |||
67 | interrupt-controller; |
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68 | #interrupt-cells = <1>; |
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69 | |||
70 | interrupt-parent = <&cpuintc>; |
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71 | interrupts = <2>; |
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72 | }; |
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73 | |||
74 | memc: memc@300 { |
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75 | compatible = "ralink,rt3050-memc"; |
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76 | reg = <0x300 0x100>; |
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77 | |||
78 | resets = <&rstctrl 20>; |
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79 | reset-names = "mc"; |
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80 | |||
81 | interrupt-parent = <&intc>; |
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82 | interrupts = <3>; |
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83 | }; |
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84 | |||
85 | uart: uart@500 { |
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86 | compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a"; |
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87 | reg = <0x500 0x100>; |
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88 | |||
89 | resets = <&rstctrl 12>; |
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90 | reset-names = "uart"; |
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91 | |||
92 | interrupt-parent = <&intc>; |
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93 | interrupts = <5>; |
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94 | |||
95 | reg-shift = <2>; |
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96 | |||
97 | status = "disabled"; |
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98 | }; |
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99 | |||
100 | gpio0: gpio@600 { |
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101 | compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio"; |
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102 | reg = <0x600 0x34>; |
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103 | |||
104 | gpio-controller; |
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105 | #gpio-cells = <2>; |
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106 | |||
107 | ralink,gpio-base = <0>; |
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3 | office | 108 | ralink,num-gpios = <24>; |
1 | office | 109 | ralink,register-map = [ 00 04 08 0c |
110 | 20 24 28 2c |
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111 | 30 34 ]; |
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112 | |||
113 | resets = <&rstctrl 13>; |
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114 | reset-names = "pio"; |
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115 | |||
116 | interrupt-parent = <&intc>; |
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117 | interrupts = <6>; |
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118 | }; |
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119 | |||
120 | gpio1: gpio@638 { |
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121 | compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio"; |
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122 | reg = <0x638 0x24>; |
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123 | |||
124 | gpio-controller; |
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125 | #gpio-cells = <2>; |
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126 | |||
127 | ralink,gpio-base = <24>; |
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3 | office | 128 | ralink,num-gpios = <16>; |
1 | office | 129 | ralink,register-map = [ 00 04 08 0c |
130 | 10 14 18 1c |
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131 | 20 24 ]; |
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132 | |||
133 | status = "disabled"; |
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134 | }; |
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135 | |||
136 | gpio2: gpio@660 { |
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137 | compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio"; |
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138 | reg = <0x660 0x24>; |
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139 | |||
140 | gpio-controller; |
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141 | #gpio-cells = <2>; |
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142 | |||
143 | ralink,gpio-base = <40>; |
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3 | office | 144 | ralink,num-gpios = <12>; |
1 | office | 145 | ralink,register-map = [ 00 04 08 0c |
146 | 10 14 18 1c |
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147 | 20 24 ]; |
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148 | |||
149 | status = "disabled"; |
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150 | }; |
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151 | |||
152 | gdma: gdma@700 { |
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153 | compatible = "ralink,rt305x-gdma"; |
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154 | reg = <0x700 0x100>; |
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155 | |||
156 | resets = <&rstctrl 14>; |
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157 | reset-names = "dma"; |
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158 | |||
159 | interrupt-parent = <&intc>; |
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160 | interrupts = <7>; |
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161 | |||
162 | #dma-cells = <1>; |
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163 | #dma-channels = <8>; |
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164 | #dma-requests = <8>; |
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165 | |||
166 | status = "disabled"; |
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167 | }; |
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168 | |||
169 | i2c@900 { |
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170 | compatible = "ralink,rt2880-i2c"; |
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171 | reg = <0x900 0x100>; |
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172 | |||
173 | resets = <&rstctrl 16>; |
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174 | reset-names = "i2c"; |
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175 | |||
176 | #address-cells = <1>; |
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177 | #size-cells = <0>; |
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178 | |||
179 | status = "disabled"; |
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180 | |||
181 | pinctrl-names = "default"; |
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182 | pinctrl-0 = <&i2c_pins>; |
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183 | }; |
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184 | |||
185 | i2s@a00 { |
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186 | compatible = "ralink,rt3050-i2s"; |
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187 | reg = <0xa00 0x100>; |
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188 | |||
189 | resets = <&rstctrl 17>; |
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190 | reset-names = "i2s"; |
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191 | |||
192 | interrupt-parent = <&intc>; |
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193 | interrupts = <10>; |
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194 | |||
195 | txdma-req = <2>; |
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196 | |||
197 | dmas = <&gdma 4>; |
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198 | dma-names = "tx"; |
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199 | |||
200 | status = "disabled"; |
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201 | }; |
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202 | |||
203 | spi0: spi@b00 { |
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204 | compatible = "ralink,rt3050-spi", "ralink,rt2880-spi"; |
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205 | reg = <0xb00 0x100>; |
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206 | |||
207 | resets = <&rstctrl 18>; |
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208 | reset-names = "spi"; |
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209 | |||
210 | #address-cells = <1>; |
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211 | #size-cells = <0>; |
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212 | |||
213 | pinctrl-names = "default"; |
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214 | pinctrl-0 = <&spi_pins>; |
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215 | |||
216 | status = "disabled"; |
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217 | }; |
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218 | |||
219 | uartlite: uartlite@c00 { |
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220 | compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a"; |
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221 | reg = <0xc00 0x100>; |
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222 | |||
223 | resets = <&rstctrl 19>; |
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224 | reset-names = "uartl"; |
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225 | |||
226 | interrupt-parent = <&intc>; |
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227 | interrupts = <12>; |
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228 | |||
229 | reg-shift = <2>; |
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230 | |||
231 | pinctrl-names = "default"; |
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232 | pinctrl-0 = <&uartlite_pins>; |
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233 | }; |
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234 | }; |
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235 | |||
236 | pinctrl: pinctrl { |
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237 | compatible = "ralink,rt2880-pinmux"; |
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238 | |||
239 | pinctrl-names = "default"; |
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240 | pinctrl-0 = <&state_default>; |
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241 | |||
242 | state_default: pinctrl0 { |
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243 | sdram { |
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244 | ralink,group = "sdram"; |
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245 | ralink,function = "sdram"; |
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246 | }; |
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247 | }; |
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248 | |||
3 | office | 249 | i2c_pins: i2c { |
250 | i2c { |
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1 | office | 251 | ralink,group = "i2c"; |
252 | ralink,function = "i2c"; |
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253 | }; |
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254 | }; |
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255 | |||
3 | office | 256 | spi_pins: spi { |
257 | spi { |
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1 | office | 258 | ralink,group = "spi"; |
259 | ralink,function = "spi"; |
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260 | }; |
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261 | }; |
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262 | |||
263 | rgmii_pins: rgmii { |
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264 | rgmii { |
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265 | ralink,group = "rgmii"; |
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266 | ralink,function = "rgmii"; |
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267 | }; |
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268 | }; |
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269 | |||
270 | uartlite_pins: uartlite { |
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271 | uart { |
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272 | ralink,group = "uartlite"; |
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273 | ralink,function = "uartlite"; |
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274 | }; |
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275 | }; |
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276 | }; |
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277 | |||
278 | rstctrl: rstctrl { |
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279 | compatible = "ralink,rt3050-reset", "ralink,rt2880-reset"; |
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280 | #reset-cells = <1>; |
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281 | }; |
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282 | |||
283 | clkctrl: clkctrl { |
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284 | compatible = "ralink,rt2880-clock"; |
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285 | #clock-cells = <1>; |
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286 | }; |
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287 | |||
288 | usbphy: usbphy { |
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289 | compatible = "ralink,rt3050-usbphy"; |
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290 | #phy-cells = <0>; |
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291 | |||
292 | ralink,sysctl = <&sysc>; |
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293 | resets = <&rstctrl 22>; |
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294 | reset-names = "host"; |
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295 | clocks = <&clkctrl 18>; |
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296 | clock-names = "host"; |
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297 | }; |
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298 | |||
299 | ethernet: ethernet@10100000 { |
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300 | compatible = "ralink,rt3050-eth"; |
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301 | reg = <0x10100000 0x10000>; |
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302 | |||
303 | resets = <&rstctrl 21>; |
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304 | reset-names = "fe"; |
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305 | |||
306 | interrupt-parent = <&cpuintc>; |
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307 | interrupts = <5>; |
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308 | |||
309 | mediatek,switch = <&esw>; |
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310 | }; |
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311 | |||
312 | esw: esw@10110000 { |
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313 | compatible = "ralink,rt3050-esw"; |
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314 | reg = <0x10110000 0x8000>; |
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315 | |||
316 | resets = <&rstctrl 23>; |
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317 | reset-names = "esw"; |
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318 | |||
319 | interrupt-parent = <&intc>; |
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320 | interrupts = <17>; |
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321 | }; |
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322 | |||
323 | wmac: wmac@10180000 { |
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324 | compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac"; |
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325 | reg = <0x10180000 0x40000>; |
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326 | |||
327 | interrupt-parent = <&cpuintc>; |
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328 | interrupts = <6>; |
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329 | |||
330 | ralink,eeprom = "soc_wmac.eeprom"; |
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331 | }; |
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332 | |||
333 | otg: otg@101c0000 { |
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334 | compatible = "ralink,rt3050-otg", "snps,dwc2"; |
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335 | reg = <0x101c0000 0x40000>; |
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336 | |||
337 | interrupt-parent = <&intc>; |
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338 | interrupts = <18>; |
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339 | |||
340 | resets = <&rstctrl 22>; |
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341 | reset-names = "otg"; |
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342 | |||
343 | status = "disabled"; |
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344 | }; |
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345 | }; |