OpenWrt – Blame information for rev 3

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Rev Author Line No. Line
1 office 1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt2880-soc";
5  
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11  
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15  
16 aliases {
17 serial0 = &uartlite;
18 };
19  
3 office 20 cpuintc: cpuintc@0 {
1 office 21 #address-cells = <0>;
22 #interrupt-cells = <1>;
23 interrupt-controller;
24 compatible = "mti,cpu-interrupt-controller";
25 };
26  
27 palmbus: palmbus@300000 {
28 compatible = "palmbus";
29 reg = <0x300000 0x200000>;
30 ranges = <0x0 0x300000 0x1FFFFF>;
31  
32 #address-cells = <1>;
33 #size-cells = <1>;
34  
35 sysc: sysc@0 {
36 compatible = "ralink,rt2880-sysc";
37 reg = <0x000 0x100>;
38 };
39  
40 timer: timer@100 {
41 compatible = "ralink,rt2880-timer";
42 reg = <0x100 0x20>;
43  
44 interrupt-parent = <&intc>;
45 interrupts = <1>;
46  
47 status = "disabled";
48 };
49  
50 watchdog: watchdog@120 {
51 compatible = "ralink,rt2880-wdt";
52 reg = <0x120 0x10>;
53 };
54  
55 intc: intc@200 {
56 compatible = "ralink,rt2880-intc";
57 reg = <0x200 0x100>;
58  
59 interrupt-controller;
60 #interrupt-cells = <1>;
61  
62 interrupt-parent = <&cpuintc>;
63 interrupts = <2>;
64 };
65  
66 memc: memc@300 {
67 compatible = "ralink,rt2880-memc";
68 reg = <0x300 0x100>;
69 };
70  
71 gpio0: gpio@600 {
72 compatible = "ralink,rt2880-gpio";
73 reg = <0x600 0x34>;
74  
75 gpio-controller;
76 #gpio-cells = <2>;
77  
78 ralink,gpio-base = <0>;
3 office 79 ralink,num-gpios = <24>;
1 office 80 ralink,register-map = [ 00 04 08 0c
81 20 24 28 2c
82 30 34 ];
83 };
84  
85 gpio1: gpio@638 {
86 compatible = "ralink,rt2880-gpio";
87 reg = <0x638 0x24>;
88  
89 gpio-controller;
90 #gpio-cells = <2>;
91  
92 ralink,gpio-base = <24>;
3 office 93 ralink,num-gpios = <16>;
1 office 94 ralink,register-map = [ 00 04 08 0c
95 10 14 18 1c
96 20 24 ];
97  
98 status = "disabled";
99 };
100  
101 gpio2: gpio@660 {
102 compatible = "ralink,rt2880-gpio";
103 reg = <0x660 0x24>;
104  
105 gpio-controller;
106 #gpio-cells = <2>;
107  
108 ralink,gpio-base = <40>;
3 office 109 ralink,num-gpios = <32>;
1 office 110 ralink,register-map = [ 00 04 08 0c
111 10 14 18 1c
112 20 24 ];
113  
114 status = "disabled";
115 };
116  
117 i2c: i2c@900 {
118 compatible = "ralink,rt2880-i2c";
119 reg = <0x900 0x100>;
120  
121 resets = <&rstctrl 9>;
122 reset-names = "i2c";
123  
124 #address-cells = <1>;
125 #size-cells = <0>;
126  
127 status = "disabled";
128  
129 pinctrl-names = "default";
130 pinctrl-0 = <&i2c_pins>;
131 };
132  
133 uartlite: uartlite@c00 {
134 compatible = "ralink,rt2880-uart", "ns16550a";
135 reg = <0xc00 0x100>;
136  
137 interrupt-parent = <&intc>;
138 interrupts = <8>;
139  
140 reg-shift = <2>;
141 };
142 };
143  
144 pinctrl: pinctrl {
145 compatible = "ralink,rt2880-pinmux";
146  
147 pinctrl-names = "default";
148 pinctrl-0 = <&state_default>;
149  
150 state_default: pinctrl0 {
151 sdram {
152 ralink,group = "sdram";
153 ralink,function = "sdram";
154 };
155 };
156  
3 office 157 i2c_pins: i2c {
158 i2c {
1 office 159 ralink,group = "i2c";
160 ralink,function = "i2c";
161 };
162 };
163  
3 office 164 spi_pins: spi {
165 spi {
1 office 166 ralink,group = "spi";
167 ralink,function = "spi";
168 };
169 };
170  
171 uartlite_pins: uartlite {
172 uart {
173 ralink,group = "uartlite";
174 ralink,function = "uartlite";
175 };
176 };
177 };
178  
179 rstctrl: rstctrl {
180 compatible = "ralink,rt2880-reset";
181 #reset-cells = <1>;
182 };
183  
184 clkctrl: clkctrl {
185 compatible = "ralink,rt2880-clock";
186 #clock-cells = <1>;
187 };
188  
189 pci: pci@440000 {
190 compatible = "ralink,rt288x-pci";
191 reg = <0x00440000 0x20000>;
3 office 192 #address-cells = <1>;
193 #size-cells = <1>;
1 office 194 status = "disabled";
195 };
196  
197 ethernet: ethernet@400000 {
198 compatible = "ralink,rt2880-eth";
199 reg = <0x00400000 0x10000>;
200  
201 #address-cells = <1>;
202 #size-cells = <0>;
203  
204 resets = <&rstctrl 18>;
205 reset-names = "fe";
206  
207 interrupt-parent = <&cpuintc>;
208 interrupts = <5>;
209  
210 status = "disabled";
211  
212 port@0 {
213 compatible = "ralink,rt2880-port", "mediatek,eth-port";
214 reg = <0>;
215 };
216  
217 mdio-bus {
218 #address-cells = <1>;
219 #size-cells = <0>;
220  
221 status = "disabled";
222 };
223 };
224  
225 wmac: wmac@480000 {
226 compatible = "ralink,rt2880-wmac";
227 reg = <0x480000 0x40000>;
228  
229 interrupt-parent = <&cpuintc>;
230 interrupts = <6>;
231  
232 ralink,eeprom = "soc_wmac.eeprom";
233 };
234 };