OpenWrt – Blame information for rev 3
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
1 | office | 1 | / { |
2 | #address-cells = <1>; |
||
3 | #size-cells = <1>; |
||
3 | office | 4 | compatible = "ralink,mtk7628an-soc"; |
1 | office | 5 | |
6 | cpus { |
||
7 | cpu@0 { |
||
8 | compatible = "mips,mips24KEc"; |
||
9 | }; |
||
10 | }; |
||
11 | |||
12 | chosen { |
||
13 | bootargs = "console=ttyS0,57600"; |
||
14 | }; |
||
15 | |||
16 | aliases { |
||
17 | serial0 = &uartlite; |
||
18 | }; |
||
19 | |||
3 | office | 20 | cpuintc: cpuintc@0 { |
1 | office | 21 | #address-cells = <0>; |
22 | #interrupt-cells = <1>; |
||
23 | interrupt-controller; |
||
24 | compatible = "mti,cpu-interrupt-controller"; |
||
25 | }; |
||
26 | |||
27 | palmbus: palmbus@10000000 { |
||
28 | compatible = "palmbus"; |
||
29 | reg = <0x10000000 0x200000>; |
||
30 | ranges = <0x0 0x10000000 0x1FFFFF>; |
||
31 | |||
32 | #address-cells = <1>; |
||
33 | #size-cells = <1>; |
||
34 | |||
35 | sysc: sysc@0 { |
||
36 | compatible = "ralink,mt7620a-sysc", "syscon"; |
||
37 | reg = <0x0 0x100>; |
||
38 | }; |
||
39 | |||
40 | watchdog: watchdog@100 { |
||
41 | compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt"; |
||
42 | reg = <0x100 0x30>; |
||
43 | |||
44 | resets = <&rstctrl 8>; |
||
45 | reset-names = "wdt"; |
||
46 | |||
47 | interrupt-parent = <&intc>; |
||
48 | interrupts = <24>; |
||
49 | }; |
||
50 | |||
51 | intc: intc@200 { |
||
52 | compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc"; |
||
53 | reg = <0x200 0x100>; |
||
54 | |||
55 | resets = <&rstctrl 9>; |
||
56 | reset-names = "intc"; |
||
57 | |||
58 | interrupt-controller; |
||
59 | #interrupt-cells = <1>; |
||
60 | |||
61 | interrupt-parent = <&cpuintc>; |
||
62 | interrupts = <2>; |
||
63 | |||
64 | ralink,intc-registers = <0x9c 0xa0 |
||
65 | 0x6c 0xa4 |
||
66 | 0x80 0x78>; |
||
67 | }; |
||
68 | |||
69 | memc: memc@300 { |
||
70 | compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; |
||
71 | reg = <0x300 0x100>; |
||
72 | |||
73 | resets = <&rstctrl 20>; |
||
74 | reset-names = "mc"; |
||
75 | |||
76 | interrupt-parent = <&intc>; |
||
77 | interrupts = <3>; |
||
78 | }; |
||
79 | |||
80 | gpio@600 { |
||
81 | #address-cells = <1>; |
||
82 | #size-cells = <0>; |
||
83 | |||
84 | compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio"; |
||
85 | reg = <0x600 0x100>; |
||
86 | |||
87 | interrupt-parent = <&intc>; |
||
88 | interrupts = <6>; |
||
89 | |||
90 | gpio0: bank@0 { |
||
91 | reg = <0>; |
||
92 | compatible = "mtk,mt7621-gpio-bank"; |
||
93 | gpio-controller; |
||
94 | #gpio-cells = <2>; |
||
95 | }; |
||
96 | |||
97 | gpio1: bank@1 { |
||
98 | reg = <1>; |
||
99 | compatible = "mtk,mt7621-gpio-bank"; |
||
100 | gpio-controller; |
||
101 | #gpio-cells = <2>; |
||
102 | }; |
||
103 | |||
104 | gpio2: bank@2 { |
||
105 | reg = <2>; |
||
106 | compatible = "mtk,mt7621-gpio-bank"; |
||
107 | gpio-controller; |
||
108 | #gpio-cells = <2>; |
||
109 | }; |
||
110 | }; |
||
111 | |||
112 | i2c: i2c@900 { |
||
113 | compatible = "mediatek,mt7621-i2c"; |
||
114 | reg = <0x900 0x100>; |
||
115 | |||
116 | resets = <&rstctrl 16>; |
||
117 | reset-names = "i2c"; |
||
118 | |||
119 | #address-cells = <1>; |
||
120 | #size-cells = <0>; |
||
121 | |||
122 | status = "disabled"; |
||
123 | |||
124 | pinctrl-names = "default"; |
||
125 | pinctrl-0 = <&i2c_pins>; |
||
126 | }; |
||
127 | |||
128 | i2s: i2s@a00 { |
||
129 | compatible = "mediatek,mt7628-i2s"; |
||
130 | reg = <0xa00 0x100>; |
||
131 | |||
132 | resets = <&rstctrl 17>; |
||
133 | reset-names = "i2s"; |
||
134 | |||
135 | interrupt-parent = <&intc>; |
||
136 | interrupts = <10>; |
||
137 | |||
138 | txdma-req = <2>; |
||
139 | rxdma-req = <3>; |
||
140 | |||
141 | dmas = <&gdma 4>, |
||
142 | <&gdma 6>; |
||
143 | dma-names = "tx", "rx"; |
||
144 | |||
145 | status = "disabled"; |
||
146 | }; |
||
147 | |||
148 | spi0: spi@b00 { |
||
149 | compatible = "ralink,mt7621-spi"; |
||
150 | reg = <0xb00 0x100>; |
||
151 | |||
152 | resets = <&rstctrl 18>; |
||
153 | reset-names = "spi"; |
||
154 | |||
155 | #address-cells = <1>; |
||
156 | #size-cells = <0>; |
||
157 | |||
158 | pinctrl-names = "default"; |
||
159 | pinctrl-0 = <&spi_pins>; |
||
160 | |||
161 | status = "disabled"; |
||
162 | }; |
||
163 | |||
164 | uartlite: uartlite@c00 { |
||
165 | compatible = "ns16550a"; |
||
166 | reg = <0xc00 0x100>; |
||
167 | |||
168 | reg-shift = <2>; |
||
169 | reg-io-width = <4>; |
||
170 | no-loopback-test; |
||
171 | |||
172 | clock-frequency = <40000000>; |
||
173 | |||
174 | resets = <&rstctrl 12>; |
||
175 | reset-names = "uartl"; |
||
176 | |||
177 | interrupt-parent = <&intc>; |
||
178 | interrupts = <20>; |
||
179 | |||
180 | pinctrl-names = "default"; |
||
181 | pinctrl-0 = <&uart0_pins>; |
||
182 | }; |
||
183 | |||
184 | uart1: uart1@d00 { |
||
185 | compatible = "ns16550a"; |
||
186 | reg = <0xd00 0x100>; |
||
187 | |||
188 | reg-shift = <2>; |
||
189 | reg-io-width = <4>; |
||
190 | no-loopback-test; |
||
191 | |||
192 | clock-frequency = <40000000>; |
||
193 | |||
194 | resets = <&rstctrl 19>; |
||
195 | reset-names = "uart1"; |
||
196 | |||
197 | interrupt-parent = <&intc>; |
||
198 | interrupts = <21>; |
||
199 | |||
200 | pinctrl-names = "default"; |
||
201 | pinctrl-0 = <&uart1_pins>; |
||
202 | |||
203 | status = "disabled"; |
||
204 | }; |
||
205 | |||
206 | uart2: uart2@e00 { |
||
207 | compatible = "ns16550a"; |
||
208 | reg = <0xe00 0x100>; |
||
209 | |||
210 | reg-shift = <2>; |
||
211 | reg-io-width = <4>; |
||
212 | no-loopback-test; |
||
213 | |||
214 | clock-frequency = <40000000>; |
||
215 | |||
216 | resets = <&rstctrl 20>; |
||
217 | reset-names = "uart2"; |
||
218 | |||
219 | interrupt-parent = <&intc>; |
||
220 | interrupts = <22>; |
||
221 | |||
222 | pinctrl-names = "default"; |
||
223 | pinctrl-0 = <&uart2_pins>; |
||
224 | |||
225 | status = "disabled"; |
||
226 | }; |
||
227 | |||
228 | pwm: pwm@5000 { |
||
229 | compatible = "mediatek,mt7628-pwm"; |
||
230 | reg = <0x5000 0x1000>; |
||
231 | |||
232 | resets = <&rstctrl 31>; |
||
233 | reset-names = "pwm"; |
||
234 | |||
235 | pinctrl-names = "default"; |
||
236 | pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>; |
||
237 | |||
238 | status = "disabled"; |
||
239 | }; |
||
240 | |||
241 | pcm: pcm@2000 { |
||
242 | compatible = "ralink,mt7620a-pcm"; |
||
243 | reg = <0x2000 0x800>; |
||
244 | |||
245 | resets = <&rstctrl 11>; |
||
246 | reset-names = "pcm"; |
||
247 | |||
248 | interrupt-parent = <&intc>; |
||
249 | interrupts = <4>; |
||
250 | |||
251 | status = "disabled"; |
||
252 | }; |
||
253 | |||
254 | gdma: gdma@2800 { |
||
255 | compatible = "ralink,rt3883-gdma"; |
||
256 | reg = <0x2800 0x800>; |
||
257 | |||
258 | resets = <&rstctrl 14>; |
||
259 | reset-names = "dma"; |
||
260 | |||
261 | interrupt-parent = <&intc>; |
||
262 | interrupts = <7>; |
||
263 | |||
264 | #dma-cells = <1>; |
||
265 | #dma-channels = <16>; |
||
266 | #dma-requests = <16>; |
||
267 | |||
268 | status = "disabled"; |
||
269 | }; |
||
270 | }; |
||
271 | |||
272 | pinctrl: pinctrl { |
||
273 | compatible = "ralink,rt2880-pinmux"; |
||
274 | pinctrl-names = "default"; |
||
275 | pinctrl-0 = <&state_default>; |
||
276 | |||
277 | state_default: pinctrl0 { |
||
278 | }; |
||
279 | |||
3 | office | 280 | spi_pins: spi { |
281 | spi { |
||
1 | office | 282 | ralink,group = "spi"; |
283 | ralink,function = "spi"; |
||
284 | }; |
||
285 | }; |
||
286 | |||
287 | spi_cs1_pins: spi_cs1 { |
||
288 | spi_cs1 { |
||
289 | ralink,group = "spi cs1"; |
||
290 | ralink,function = "spi cs1"; |
||
291 | }; |
||
292 | }; |
||
293 | |||
3 | office | 294 | i2c_pins: i2c { |
295 | i2c { |
||
1 | office | 296 | ralink,group = "i2c"; |
297 | ralink,function = "i2c"; |
||
298 | }; |
||
299 | }; |
||
300 | |||
301 | i2s_pins: i2s { |
||
302 | i2s { |
||
303 | ralink,group = "i2s"; |
||
304 | ralink,function = "i2s"; |
||
305 | }; |
||
306 | }; |
||
307 | |||
308 | uart0_pins: uartlite { |
||
309 | uartlite { |
||
310 | ralink,group = "uart0"; |
||
311 | ralink,function = "uart0"; |
||
312 | }; |
||
313 | }; |
||
314 | |||
315 | uart1_pins: uart1 { |
||
316 | uart1 { |
||
317 | ralink,group = "uart1"; |
||
318 | ralink,function = "uart1"; |
||
319 | }; |
||
320 | }; |
||
321 | |||
322 | uart2_pins: uart2 { |
||
323 | uart2 { |
||
324 | ralink,group = "uart2"; |
||
325 | ralink,function = "uart2"; |
||
326 | }; |
||
327 | }; |
||
328 | |||
329 | sdxc_pins: sdxc { |
||
330 | sdxc { |
||
331 | ralink,group = "sdmode"; |
||
332 | ralink,function = "sdxc"; |
||
333 | }; |
||
334 | }; |
||
335 | |||
336 | pwm0_pins: pwm0 { |
||
337 | pwm0 { |
||
338 | ralink,group = "pwm0"; |
||
339 | ralink,function = "pwm0"; |
||
340 | }; |
||
341 | }; |
||
342 | |||
343 | pwm1_pins: pwm1 { |
||
344 | pwm1 { |
||
345 | ralink,group = "pwm1"; |
||
346 | ralink,function = "pwm1"; |
||
347 | }; |
||
348 | }; |
||
349 | |||
350 | pcm_i2s_pins: pcm_i2s { |
||
351 | pcm_i2s { |
||
352 | ralink,group = "i2s"; |
||
353 | ralink,function = "pcm"; |
||
354 | }; |
||
355 | }; |
||
356 | |||
357 | refclk_pins: refclk { |
||
358 | refclk { |
||
359 | ralink,group = "refclk"; |
||
360 | ralink,function = "refclk"; |
||
361 | }; |
||
362 | }; |
||
363 | }; |
||
364 | |||
365 | rstctrl: rstctrl { |
||
366 | compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset"; |
||
367 | #reset-cells = <1>; |
||
368 | }; |
||
369 | |||
370 | clkctrl: clkctrl { |
||
371 | compatible = "ralink,rt2880-clock"; |
||
372 | #clock-cells = <1>; |
||
373 | }; |
||
374 | |||
375 | usbphy: usbphy@10120000 { |
||
376 | compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy"; |
||
377 | reg = <0x10120000 0x1000>; |
||
378 | #phy-cells = <0>; |
||
379 | |||
380 | ralink,sysctl = <&sysc>; |
||
381 | resets = <&rstctrl 22 &rstctrl 25>; |
||
382 | reset-names = "host", "device"; |
||
383 | clocks = <&clkctrl 22 &clkctrl 25>; |
||
384 | clock-names = "host", "device"; |
||
385 | }; |
||
386 | |||
387 | sdhci: sdhci@10130000 { |
||
388 | compatible = "ralink,mt7620-sdhci"; |
||
389 | reg = <0x10130000 0x4000>; |
||
390 | |||
391 | interrupt-parent = <&intc>; |
||
392 | interrupts = <14>; |
||
393 | |||
394 | pinctrl-names = "default"; |
||
395 | pinctrl-0 = <&sdxc_pins>; |
||
396 | |||
397 | status = "disabled"; |
||
398 | }; |
||
399 | |||
400 | ehci: ehci@101c0000 { |
||
401 | compatible = "generic-ehci"; |
||
402 | reg = <0x101c0000 0x1000>; |
||
403 | |||
404 | phys = <&usbphy>; |
||
405 | phy-names = "usb"; |
||
406 | |||
407 | interrupt-parent = <&intc>; |
||
408 | interrupts = <18>; |
||
409 | }; |
||
410 | |||
411 | ohci: ohci@101c1000 { |
||
412 | compatible = "generic-ohci"; |
||
413 | reg = <0x101c1000 0x1000>; |
||
414 | |||
415 | phys = <&usbphy>; |
||
416 | phy-names = "usb"; |
||
417 | |||
418 | interrupt-parent = <&intc>; |
||
419 | interrupts = <18>; |
||
420 | }; |
||
421 | |||
422 | ethernet: ethernet@10100000 { |
||
423 | compatible = "ralink,rt5350-eth"; |
||
424 | reg = <0x10100000 0x10000>; |
||
425 | |||
426 | interrupt-parent = <&cpuintc>; |
||
427 | interrupts = <5>; |
||
428 | |||
429 | resets = <&rstctrl 21 &rstctrl 23>; |
||
430 | reset-names = "fe", "esw"; |
||
431 | |||
432 | mediatek,switch = <&esw>; |
||
433 | }; |
||
434 | |||
435 | esw: esw@10110000 { |
||
436 | compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw"; |
||
437 | reg = <0x10110000 0x8000>; |
||
438 | |||
439 | resets = <&rstctrl 23>; |
||
440 | reset-names = "esw"; |
||
441 | |||
442 | interrupt-parent = <&intc>; |
||
443 | interrupts = <17>; |
||
444 | }; |
||
445 | |||
446 | pcie: pcie@10140000 { |
||
447 | compatible = "mediatek,mt7620-pci"; |
||
448 | reg = <0x10140000 0x100 |
||
449 | 0x10142000 0x100>; |
||
450 | |||
451 | #address-cells = <3>; |
||
452 | #size-cells = <2>; |
||
453 | |||
454 | interrupt-parent = <&cpuintc>; |
||
455 | interrupts = <4>; |
||
456 | |||
457 | resets = <&rstctrl 26 &rstctrl 27>; |
||
458 | reset-names = "pcie0", "pcie1"; |
||
459 | clocks = <&clkctrl 26 &clkctrl 27>; |
||
460 | clock-names = "pcie0", "pcie1"; |
||
461 | |||
462 | status = "disabled"; |
||
463 | |||
464 | device_type = "pci"; |
||
465 | |||
466 | bus-range = <0 255>; |
||
467 | ranges = < |
||
468 | 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */ |
||
469 | 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */ |
||
470 | >; |
||
471 | |||
3 | office | 472 | pcie-bridge { |
1 | office | 473 | reg = <0x0000 0 0 0 0>; |
474 | |||
475 | #address-cells = <3>; |
||
476 | #size-cells = <2>; |
||
477 | |||
478 | device_type = "pci"; |
||
479 | }; |
||
480 | }; |
||
481 | |||
482 | wmac: wmac@10300000 { |
||
483 | compatible = "mediatek,mt7628-wmac"; |
||
484 | reg = <0x10300000 0x100000>; |
||
485 | |||
486 | interrupt-parent = <&cpuintc>; |
||
487 | interrupts = <6>; |
||
488 | |||
489 | status = "disabled"; |
||
490 | |||
491 | mediatek,mtd-eeprom = <&factory 0x0000>; |
||
492 | }; |
||
493 | }; |