OpenWrt – Blame information for rev 3

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1 office 1 From 9d3b968d13ba1eecaf22d5824cf8fd270c061534 Mon Sep 17 00:00:00 2001
2 From: Linus Walleij <linus.walleij@linaro.org>
3 Date: Sat, 15 Jul 2017 21:02:06 +0200
4 Subject: [PATCH 16/31] ARM: dts: Add TVE/TVC and ILI9322 panel to DIR-685
5  
6 This adds the TVE200/TVC TV-encoder and the Ilitek ILI9322 panel
7 to the DIR-685 device tree.
8  
9 This brings graphics to this funky router and it is possible to
10 even run a console on its tiny screen.
11  
12 Incidentally this requires us to disable the access to the
13 parallel (NOR) flash, as the communication pins to the panel
14 are shared with the flash memory.
15  
16 To access the flash, a separate kernel with the panel disabled
17 and the flash enabled should be booted. The pin control selecting
18 whether to use the lines cannot be altered at runtime due to
19 hardware constraints.
20  
21 Cc: David Lechner <david@lechnology.com>
22 Cc: Stefano Babic <sbabic@denx.de>
23 Cc: Ben Dooks <ben.dooks@codethink.co.uk>
24 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
25 ---
26 arch/arm/boot/dts/gemini-dlink-dir-685.dts | 63 +++++++++++++++++++++++++++++-
27 1 file changed, 62 insertions(+), 1 deletion(-)
28  
29 --- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
30 +++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
31 @@ -45,6 +45,47 @@
32 };
33 };
34  
35 + vdisp: regulator {
36 + compatible = "regulator-fixed";
37 + regulator-name = "display-power";
38 + regulator-min-microvolt = <3600000>;
39 + regulator-max-microvolt = <3600000>;
40 + /* Collides with LCD E */
41 + gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
42 + enable-active-high;
43 + };
44 +
45 + spi {
46 + compatible = "spi-gpio";
47 + #address-cells = <1>;
48 + #size-cells = <0>;
49 +
50 + /* Collides with IDE pins, that's cool (we do not use them) */
51 + gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
52 + gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
53 + gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
54 + /* Collides with pflash CE1, not so cool */
55 + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
56 + num-chipselects = <1>;
57 +
58 + panel: display@0 {
59 + compatible = "dlink,dir-685-panel", "ilitek,ili9322";
60 + reg = <0>;
61 + /* 50 ns min period = 20 MHz */
62 + spi-max-frequency = <20000000>;
63 + spi-cpol; /* Clock active low */
64 + vcc-supply = <&vdisp>;
65 + iovcc-supply = <&vdisp>;
66 + vci-supply = <&vdisp>;
67 +
68 + port {
69 + panel_in: endpoint {
70 + remote-endpoint = <&display_out>;
71 + };
72 + };
73 + };
74 + };
75 +
76 leds {
77 compatible = "gpio-leds";
78 led-wps {
79 @@ -115,7 +156,16 @@
80  
81 soc {
82 flash@30000000 {
83 - status = "okay";
84 + /*
85 + * Flash access is by default disabled, because it
86 + * collides with the Chip Enable signal for the display
87 + * panel, that reuse the parallel flash Chip Select 1
88 + * (CS1). Enabling flash makes graphics stop working.
89 + *
90 + * We might be able to hack around this by letting
91 + * GPIO poke around in the flash controller registers.
92 + */
93 + /* status = "okay"; */
94 /* 32MB of flash */
95 reg = <0x30000000 0x02000000>;
96  
3 office 97 @@ -242,5 +292,16 @@
1 office 98 ata@63000000 {
99 status = "okay";
100 };
101 +
102 + display-controller@6a000000 {
103 + status = "okay";
104 +
105 + port@0 {
106 + reg = <0>;
107 + display_out: endpoint {
108 + remote-endpoint = <&panel_in>;
109 + };
110 + };
111 + };
112 };
113 };