OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * NAND flash driver for the MikroTik RouterBOARD 750 |
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3 | * |
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4 | * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License version 2 as published |
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8 | * by the Free Software Foundation. |
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9 | */ |
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10 | |||
11 | #include <linux/kernel.h> |
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12 | #include <linux/module.h> |
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13 | #include <linux/mtd/nand.h> |
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14 | #include <linux/mtd/mtd.h> |
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15 | #include <linux/mtd/partitions.h> |
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16 | #include <linux/platform_device.h> |
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17 | #include <linux/io.h> |
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18 | #include <linux/slab.h> |
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3 | office | 19 | #include <linux/version.h> |
1 | office | 20 | |
21 | #include <asm/mach-ath79/ar71xx_regs.h> |
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22 | #include <asm/mach-ath79/ath79.h> |
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23 | #include <asm/mach-ath79/mach-rb750.h> |
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24 | |||
25 | #define DRV_NAME "rb750-nand" |
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26 | #define DRV_VERSION "0.1.0" |
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27 | #define DRV_DESC "NAND flash driver for the RouterBOARD 750" |
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28 | |||
29 | #define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0) |
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30 | #define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE) |
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31 | #define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE) |
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32 | #define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE) |
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33 | #define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE) |
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34 | #define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY) |
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35 | |||
36 | #define RB750_NAND_DATA_SHIFT 1 |
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37 | #define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT) |
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38 | #define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY) |
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39 | #define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \ |
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40 | RB750_NAND_NRE | RB750_NAND_NWE) |
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41 | |||
42 | struct rb750_nand_info { |
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43 | struct nand_chip chip; |
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44 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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45 | struct mtd_info mtd; |
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46 | #endif |
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47 | struct rb7xx_nand_platform_data *pdata; |
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48 | }; |
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49 | |||
50 | static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) |
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51 | { |
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52 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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53 | return container_of(mtd, struct rb750_nand_info, mtd); |
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54 | #else |
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55 | struct nand_chip *chip = mtd_to_nand(mtd); |
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56 | |||
57 | return container_of(chip, struct rb750_nand_info, chip); |
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58 | #endif |
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59 | } |
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60 | |||
61 | static struct mtd_info *rbinfo_to_mtd(struct rb750_nand_info *nfc) |
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62 | { |
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63 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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64 | return &nfc->mtd; |
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65 | #else |
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66 | return nand_to_mtd(&nfc->chip); |
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67 | #endif |
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68 | } |
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69 | |||
70 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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71 | /* |
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72 | * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader |
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73 | * will not be able to find the kernel that we load. |
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74 | */ |
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75 | static struct nand_ecclayout rb750_nand_ecclayout = { |
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76 | .eccbytes = 6, |
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77 | .eccpos = { 8, 9, 10, 13, 14, 15 }, |
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78 | .oobavail = 9, |
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79 | .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } |
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80 | }; |
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81 | |||
82 | #else |
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83 | |||
84 | static int rb750_ooblayout_ecc(struct mtd_info *mtd, int section, |
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85 | struct mtd_oob_region *oobregion) |
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86 | { |
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87 | switch (section) { |
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88 | case 0: |
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89 | oobregion->offset = 8; |
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90 | oobregion->length = 3; |
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91 | return 0; |
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92 | case 1: |
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93 | oobregion->offset = 13; |
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94 | oobregion->length = 3; |
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95 | return 0; |
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96 | default: |
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97 | return -ERANGE; |
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98 | } |
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99 | } |
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100 | |||
101 | static int rb750_ooblayout_free(struct mtd_info *mtd, int section, |
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102 | struct mtd_oob_region *oobregion) |
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103 | { |
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104 | switch (section) { |
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105 | case 0: |
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106 | oobregion->offset = 0; |
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107 | oobregion->length = 4; |
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108 | return 0; |
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109 | case 1: |
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110 | oobregion->offset = 4; |
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111 | oobregion->length = 1; |
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112 | return 0; |
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113 | case 2: |
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114 | oobregion->offset = 6; |
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115 | oobregion->length = 2; |
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116 | return 0; |
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117 | case 3: |
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118 | oobregion->offset = 11; |
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119 | oobregion->length = 2; |
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120 | return 0; |
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121 | default: |
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122 | return -ERANGE; |
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123 | } |
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124 | } |
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125 | |||
126 | static const struct mtd_ooblayout_ops rb750_nand_ecclayout_ops = { |
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127 | .ecc = rb750_ooblayout_ecc, |
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128 | .free = rb750_ooblayout_free, |
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129 | }; |
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130 | #endif /* < 4.6 */ |
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131 | |||
132 | static struct mtd_partition rb750_nand_partitions[] = { |
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133 | { |
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134 | .name = "booter", |
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135 | .offset = 0, |
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136 | .size = (256 * 1024), |
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137 | .mask_flags = MTD_WRITEABLE, |
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138 | }, { |
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139 | .name = "kernel", |
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140 | .offset = (256 * 1024), |
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141 | .size = (4 * 1024 * 1024) - (256 * 1024), |
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142 | }, { |
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143 | .name = "ubi", |
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144 | .offset = MTDPART_OFS_NXTBLK, |
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145 | .size = MTDPART_SIZ_FULL, |
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146 | }, |
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147 | }; |
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148 | |||
149 | static void rb750_nand_write(const u8 *buf, unsigned len) |
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150 | { |
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151 | void __iomem *base = ath79_gpio_base; |
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152 | u32 out; |
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153 | u32 t; |
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154 | unsigned i; |
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155 | |||
156 | /* set data lines to output mode */ |
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157 | t = __raw_readl(base + AR71XX_GPIO_REG_OE); |
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158 | __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); |
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159 | |||
160 | out = __raw_readl(base + AR71XX_GPIO_REG_OUT); |
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161 | out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE); |
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162 | for (i = 0; i != len; i++) { |
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163 | u32 data; |
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164 | |||
165 | data = buf[i]; |
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166 | data <<= RB750_NAND_DATA_SHIFT; |
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167 | data |= out; |
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168 | __raw_writel(data, base + AR71XX_GPIO_REG_OUT); |
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169 | |||
170 | __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT); |
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171 | /* flush write */ |
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172 | __raw_readl(base + AR71XX_GPIO_REG_OUT); |
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173 | } |
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174 | |||
175 | /* set data lines to input mode */ |
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176 | t = __raw_readl(base + AR71XX_GPIO_REG_OE); |
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177 | __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); |
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178 | /* flush write */ |
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179 | __raw_readl(base + AR71XX_GPIO_REG_OE); |
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180 | } |
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181 | |||
182 | static void rb750_nand_read(u8 *read_buf, unsigned len) |
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183 | { |
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184 | void __iomem *base = ath79_gpio_base; |
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185 | unsigned i; |
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186 | |||
187 | for (i = 0; i < len; i++) { |
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188 | u8 data; |
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189 | |||
190 | /* activate RE line */ |
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191 | __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR); |
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192 | /* flush write */ |
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193 | __raw_readl(base + AR71XX_GPIO_REG_CLEAR); |
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194 | |||
195 | /* read input lines */ |
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196 | data = __raw_readl(base + AR71XX_GPIO_REG_IN) >> |
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197 | RB750_NAND_DATA_SHIFT; |
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198 | |||
199 | /* deactivate RE line */ |
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200 | __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET); |
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201 | |||
202 | read_buf[i] = data; |
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203 | } |
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204 | } |
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205 | |||
206 | static void rb750_nand_select_chip(struct mtd_info *mtd, int chip) |
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207 | { |
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208 | struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd); |
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209 | void __iomem *base = ath79_gpio_base; |
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210 | u32 t; |
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211 | |||
212 | if (chip >= 0) { |
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213 | rbinfo->pdata->enable_pins(); |
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214 | |||
215 | /* set input mode for data lines */ |
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216 | t = __raw_readl(base + AR71XX_GPIO_REG_OE); |
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217 | __raw_writel(t & ~RB750_NAND_INPUT_BITS, |
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218 | base + AR71XX_GPIO_REG_OE); |
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219 | |||
220 | /* deactivate RE and WE lines */ |
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221 | __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE, |
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222 | base + AR71XX_GPIO_REG_SET); |
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223 | /* flush write */ |
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224 | (void) __raw_readl(base + AR71XX_GPIO_REG_SET); |
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225 | |||
226 | /* activate CE line */ |
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227 | __raw_writel(rbinfo->pdata->nce_line, |
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228 | base + AR71XX_GPIO_REG_CLEAR); |
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229 | } else { |
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230 | /* deactivate CE line */ |
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231 | __raw_writel(rbinfo->pdata->nce_line, |
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232 | base + AR71XX_GPIO_REG_SET); |
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233 | /* flush write */ |
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234 | (void) __raw_readl(base + AR71XX_GPIO_REG_SET); |
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235 | |||
236 | t = __raw_readl(base + AR71XX_GPIO_REG_OE); |
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237 | __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY, |
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238 | base + AR71XX_GPIO_REG_OE); |
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239 | |||
240 | rbinfo->pdata->disable_pins(); |
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241 | } |
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242 | } |
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243 | |||
244 | static int rb750_nand_dev_ready(struct mtd_info *mtd) |
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245 | { |
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246 | void __iomem *base = ath79_gpio_base; |
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247 | |||
248 | return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY); |
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249 | } |
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250 | |||
251 | static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, |
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252 | unsigned int ctrl) |
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253 | { |
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254 | if (ctrl & NAND_CTRL_CHANGE) { |
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255 | void __iomem *base = ath79_gpio_base; |
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256 | u32 t; |
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257 | |||
258 | t = __raw_readl(base + AR71XX_GPIO_REG_OUT); |
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259 | |||
260 | t &= ~(RB750_NAND_CLE | RB750_NAND_ALE); |
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261 | t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0; |
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262 | t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0; |
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263 | |||
264 | __raw_writel(t, base + AR71XX_GPIO_REG_OUT); |
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265 | /* flush write */ |
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266 | __raw_readl(base + AR71XX_GPIO_REG_OUT); |
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267 | } |
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268 | |||
269 | if (cmd != NAND_CMD_NONE) { |
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270 | u8 t = cmd; |
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271 | rb750_nand_write(&t, 1); |
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272 | } |
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273 | } |
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274 | |||
275 | static u8 rb750_nand_read_byte(struct mtd_info *mtd) |
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276 | { |
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277 | u8 data = 0; |
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278 | rb750_nand_read(&data, 1); |
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279 | return data; |
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280 | } |
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281 | |||
282 | static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) |
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283 | { |
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284 | rb750_nand_read(buf, len); |
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285 | } |
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286 | |||
287 | static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) |
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288 | { |
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289 | rb750_nand_write(buf, len); |
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290 | } |
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291 | |||
292 | static void __init rb750_nand_gpio_init(struct rb750_nand_info *info) |
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293 | { |
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294 | void __iomem *base = ath79_gpio_base; |
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295 | u32 out; |
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296 | u32 t; |
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297 | |||
298 | out = __raw_readl(base + AR71XX_GPIO_REG_OUT); |
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299 | |||
300 | /* setup output levels */ |
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301 | __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE, |
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302 | base + AR71XX_GPIO_REG_SET); |
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303 | |||
304 | __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE, |
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305 | base + AR71XX_GPIO_REG_CLEAR); |
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306 | |||
307 | /* setup input lines */ |
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308 | t = __raw_readl(base + AR71XX_GPIO_REG_OE); |
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309 | __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE); |
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310 | |||
311 | /* setup output lines */ |
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312 | t = __raw_readl(base + AR71XX_GPIO_REG_OE); |
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313 | t |= RB750_NAND_OUTPUT_BITS; |
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314 | t |= info->pdata->nce_line; |
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315 | __raw_writel(t, base + AR71XX_GPIO_REG_OE); |
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316 | |||
317 | info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0); |
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318 | } |
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319 | |||
320 | static int rb750_nand_probe(struct platform_device *pdev) |
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321 | { |
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322 | struct rb750_nand_info *info; |
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323 | struct rb7xx_nand_platform_data *pdata; |
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324 | struct mtd_info *mtd; |
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325 | int ret; |
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326 | |||
327 | printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n"); |
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328 | |||
329 | pdata = pdev->dev.platform_data; |
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330 | if (!pdata) |
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331 | return -EINVAL; |
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332 | |||
333 | info = kzalloc(sizeof(*info), GFP_KERNEL); |
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334 | if (!info) |
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335 | return -ENOMEM; |
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336 | |||
337 | info->chip.priv = &info; |
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338 | |||
339 | mtd = rbinfo_to_mtd(info); |
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340 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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341 | mtd->priv = &info->chip; |
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342 | #endif |
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343 | mtd->owner = THIS_MODULE; |
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344 | |||
345 | info->chip.select_chip = rb750_nand_select_chip; |
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346 | info->chip.cmd_ctrl = rb750_nand_cmd_ctrl; |
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347 | info->chip.dev_ready = rb750_nand_dev_ready; |
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348 | info->chip.read_byte = rb750_nand_read_byte; |
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349 | info->chip.write_buf = rb750_nand_write_buf; |
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350 | info->chip.read_buf = rb750_nand_read_buf; |
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351 | |||
352 | info->chip.chip_delay = 25; |
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353 | info->chip.ecc.mode = NAND_ECC_SOFT; |
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354 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0) |
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355 | info->chip.ecc.algo = NAND_ECC_HAMMING; |
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356 | #endif |
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357 | info->chip.options = NAND_NO_SUBPAGE_WRITE; |
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358 | |||
359 | info->pdata = pdata; |
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360 | |||
361 | platform_set_drvdata(pdev, info); |
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362 | |||
363 | rb750_nand_gpio_init(info); |
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364 | |||
365 | ret = nand_scan_ident(mtd, 1, NULL); |
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366 | if (ret) { |
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367 | ret = -ENXIO; |
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368 | goto err_free_info; |
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369 | } |
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370 | |||
371 | if (mtd->writesize == 512) |
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372 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) |
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373 | info->chip.ecc.layout = &rb750_nand_ecclayout; |
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374 | #else |
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375 | mtd_set_ooblayout(mtd, &rb750_nand_ecclayout_ops); |
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376 | #endif |
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377 | |||
378 | ret = nand_scan_tail(mtd); |
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379 | if (ret) { |
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380 | return -ENXIO; |
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381 | goto err_set_drvdata; |
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382 | } |
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383 | |||
384 | ret = mtd_device_register(mtd, rb750_nand_partitions, |
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385 | ARRAY_SIZE(rb750_nand_partitions)); |
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386 | if (ret) |
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387 | goto err_release_nand; |
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388 | |||
389 | return 0; |
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390 | |||
391 | err_release_nand: |
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392 | nand_release(mtd); |
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393 | err_set_drvdata: |
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394 | platform_set_drvdata(pdev, NULL); |
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395 | err_free_info: |
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396 | kfree(info); |
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397 | return ret; |
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398 | } |
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399 | |||
400 | static int rb750_nand_remove(struct platform_device *pdev) |
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401 | { |
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402 | struct rb750_nand_info *info = platform_get_drvdata(pdev); |
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403 | |||
404 | nand_release(rbinfo_to_mtd(info)); |
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405 | platform_set_drvdata(pdev, NULL); |
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406 | kfree(info); |
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407 | |||
408 | return 0; |
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409 | } |
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410 | |||
411 | static struct platform_driver rb750_nand_driver = { |
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412 | .probe = rb750_nand_probe, |
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413 | .remove = rb750_nand_remove, |
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414 | .driver = { |
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415 | .name = DRV_NAME, |
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416 | .owner = THIS_MODULE, |
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417 | }, |
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418 | }; |
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419 | |||
420 | static int __init rb750_nand_init(void) |
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421 | { |
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422 | return platform_driver_register(&rb750_nand_driver); |
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423 | } |
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424 | |||
425 | static void __exit rb750_nand_exit(void) |
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426 | { |
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427 | platform_driver_unregister(&rb750_nand_driver); |
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428 | } |
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429 | |||
430 | module_init(rb750_nand_init); |
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431 | module_exit(rb750_nand_exit); |
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432 | |||
433 | MODULE_DESCRIPTION(DRV_DESC); |
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434 | MODULE_VERSION(DRV_VERSION); |
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435 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); |
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436 | MODULE_LICENSE("GPL v2"); |