OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Buffalo WZR-450HP2 board support |
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3 | * |
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4 | * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * Based on the Qualcomm Atheros AP135/AP136 reference board support code |
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7 | * Copyright (c) 2012 Qualcomm Atheros |
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8 | * |
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9 | * Permission to use, copy, modify, and/or distribute this software for any |
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10 | * purpose with or without fee is hereby granted, provided that the above |
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11 | * copyright notice and this permission notice appear in all copies. |
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12 | * |
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13 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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14 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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15 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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16 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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17 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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18 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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19 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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20 | * |
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21 | */ |
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22 | |||
23 | #include <linux/phy.h> |
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24 | #include <linux/gpio.h> |
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25 | #include <linux/mtd/mtd.h> |
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26 | #include <linux/mtd/partitions.h> |
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27 | #include <linux/platform_device.h> |
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28 | #include <linux/ar8216_platform.h> |
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29 | |||
30 | #include <asm/mach-ath79/ar71xx_regs.h> |
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31 | |||
32 | #include "common.h" |
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33 | #include "dev-eth.h" |
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34 | #include "dev-gpio-buttons.h" |
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35 | #include "dev-leds-gpio.h" |
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36 | #include "dev-m25p80.h" |
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37 | #include "dev-spi.h" |
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38 | #include "dev-usb.h" |
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39 | #include "dev-wmac.h" |
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40 | #include "machtypes.h" |
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41 | |||
42 | #define WZR_450HP2_KEYS_POLL_INTERVAL 20 /* msecs */ |
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43 | #define WZR_450HP2_KEYS_DEBOUNCE_INTERVAL (3 * WZR_450HP2_KEYS_POLL_INTERVAL) |
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44 | |||
45 | #define WZR_450HP2_WMAC_CALDATA_OFFSET 0x1000 |
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46 | |||
47 | static struct mtd_partition wzrhpg450h_partitions[] = { |
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48 | { |
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49 | .name = "u-boot", |
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50 | .offset = 0, |
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51 | .size = 0x0040000, |
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52 | .mask_flags = MTD_WRITEABLE, |
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53 | }, { |
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54 | .name = "u-boot-env", |
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55 | .offset = 0x0040000, |
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56 | .size = 0x0010000, |
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57 | }, { |
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58 | .name = "ART", |
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59 | .offset = 0x0ff0000, |
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60 | .size = 0x0010000, |
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61 | .mask_flags = MTD_WRITEABLE, |
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62 | }, { |
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63 | .name = "firmware", |
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64 | .offset = 0x0050000, |
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65 | .size = 0x0f90000, |
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66 | }, { |
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67 | .name = "user_property", |
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68 | .offset = 0x0fe0000, |
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69 | .size = 0x0010000, |
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70 | } |
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71 | }; |
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72 | |||
73 | static struct flash_platform_data wzr_450hp2_flash_data = { |
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74 | .parts = wzrhpg450h_partitions, |
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75 | .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), |
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76 | }; |
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77 | |||
78 | static struct gpio_led wzr_450hp2_leds_gpio[] __initdata = { |
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79 | { |
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80 | .name = "buffalo:green:wps", |
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81 | .gpio = 3, |
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82 | .active_low = 1, |
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83 | }, |
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84 | { |
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85 | .name = "buffalo:green:system", |
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86 | .gpio = 20, |
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87 | .active_low = 1, |
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88 | }, |
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89 | { |
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90 | .name = "buffalo:green:wlan", |
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91 | .gpio = 18, |
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92 | .active_low = 1, |
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93 | }, |
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94 | }; |
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95 | |||
96 | static struct gpio_keys_button wzr_450hp2_gpio_keys[] __initdata = { |
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97 | { |
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98 | .desc = "Reset button", |
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99 | .type = EV_KEY, |
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100 | .code = KEY_RESTART, |
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101 | .debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL, |
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102 | .gpio = 17, |
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103 | .active_low = 1, |
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104 | }, |
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105 | { |
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106 | .desc = "RFKILL button", |
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107 | .type = EV_KEY, |
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108 | .code = KEY_RFKILL, |
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109 | .debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL, |
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110 | .gpio = 21, |
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111 | .active_low = 1, |
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112 | }, |
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113 | }; |
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114 | |||
115 | static const struct ar8327_led_info wzr_450hp2_leds_ar8327[] = { |
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116 | AR8327_LED_INFO(PHY0_0, HW, "buffalo:green:lan1"), |
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117 | AR8327_LED_INFO(PHY1_0, HW, "buffalo:green:lan2"), |
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118 | AR8327_LED_INFO(PHY2_0, HW, "buffalo:green:lan3"), |
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119 | AR8327_LED_INFO(PHY3_0, HW, "buffalo:green:lan4"), |
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120 | AR8327_LED_INFO(PHY4_0, HW, "buffalo:green:wan"), |
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121 | }; |
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122 | |||
123 | /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ |
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124 | static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad0_cfg = { |
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125 | .mode = AR8327_PAD_MAC_SGMII, |
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126 | .sgmii_delay_en = true, |
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127 | }; |
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128 | |||
129 | /* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ |
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130 | static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad6_cfg = { |
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131 | .mode = AR8327_PAD_MAC_RGMII, |
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132 | .txclk_delay_en = true, |
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133 | .rxclk_delay_en = true, |
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134 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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135 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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136 | }; |
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137 | |||
138 | static struct ar8327_led_cfg wzr_450hp2_ar8327_led_cfg = { |
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139 | .led_ctrl0 = 0xcc35cc35, |
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140 | .led_ctrl1 = 0xca35ca35, |
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141 | .led_ctrl2 = 0xc935c935, |
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142 | .led_ctrl3 = 0x03ffff00, |
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143 | .open_drain = true, |
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144 | }; |
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145 | |||
146 | static struct ar8327_platform_data wzr_450hp2_ar8327_data = { |
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147 | .pad0_cfg = &wzr_450hp2_ar8327_pad0_cfg, |
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148 | .pad6_cfg = &wzr_450hp2_ar8327_pad6_cfg, |
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149 | .port0_cfg = { |
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150 | .force_link = 1, |
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151 | .speed = AR8327_PORT_SPEED_1000, |
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152 | .duplex = 1, |
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153 | .txpause = 1, |
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154 | .rxpause = 1, |
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155 | }, |
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156 | .port6_cfg = { |
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157 | .force_link = 1, |
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158 | .speed = AR8327_PORT_SPEED_1000, |
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159 | .duplex = 1, |
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160 | .txpause = 1, |
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161 | .rxpause = 1, |
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162 | }, |
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163 | .led_cfg = &wzr_450hp2_ar8327_led_cfg, |
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164 | .num_leds = ARRAY_SIZE(wzr_450hp2_leds_ar8327), |
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165 | .leds = wzr_450hp2_leds_ar8327, |
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166 | }; |
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167 | |||
168 | static struct mdio_board_info wzr_450hp2_mdio0_info[] = { |
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169 | { |
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170 | .bus_id = "ag71xx-mdio.0", |
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3 | office | 171 | .phy_addr = 0, |
1 | office | 172 | .platform_data = &wzr_450hp2_ar8327_data, |
173 | }, |
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174 | }; |
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175 | |||
176 | static void __init wzr_450hp2_setup(void) |
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177 | { |
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178 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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179 | u8 *mac_wan = art; |
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180 | u8 *mac_lan = mac_wan + ETH_ALEN; |
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181 | |||
182 | ath79_register_m25p80(&wzr_450hp2_flash_data); |
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183 | |||
184 | ath79_register_leds_gpio(-1, ARRAY_SIZE(wzr_450hp2_leds_gpio), |
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185 | wzr_450hp2_leds_gpio); |
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186 | ath79_register_gpio_keys_polled(-1, WZR_450HP2_KEYS_POLL_INTERVAL, |
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187 | ARRAY_SIZE(wzr_450hp2_gpio_keys), |
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188 | wzr_450hp2_gpio_keys); |
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189 | |||
190 | ath79_register_wmac(art + WZR_450HP2_WMAC_CALDATA_OFFSET, mac_lan); |
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191 | |||
192 | mdiobus_register_board_info(wzr_450hp2_mdio0_info, |
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193 | ARRAY_SIZE(wzr_450hp2_mdio0_info)); |
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194 | ath79_register_mdio(0, 0x0); |
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195 | |||
196 | ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); |
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197 | |||
198 | /* GMAC0 is connected to the RMGII interface */ |
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199 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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200 | ath79_eth0_data.phy_mask = BIT(0); |
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201 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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202 | ath79_eth0_pll_data.pll_1000 = 0x56000000; |
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203 | |||
204 | ath79_init_mac(ath79_eth0_data.mac_addr, mac_wan, 0); |
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205 | ath79_register_eth(0); |
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206 | |||
207 | /* GMAC1 is connected to the SGMII interface */ |
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208 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; |
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209 | ath79_eth1_data.speed = SPEED_1000; |
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210 | ath79_eth1_data.duplex = DUPLEX_FULL; |
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211 | ath79_eth1_pll_data.pll_1000 = 0x03000101; |
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212 | |||
213 | ath79_init_mac(ath79_eth1_data.mac_addr, mac_lan, 0); |
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214 | ath79_register_eth(1); |
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215 | |||
216 | ath79_register_usb(); |
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217 | } |
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218 | |||
219 | MIPS_MACHINE(ATH79_MACH_WZR_450HP2, "WZR-450HP2", |
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220 | "Buffalo WZR-450HP2", wzr_450hp2_setup); |
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221 |