OpenWrt – Blame information for rev 3
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Compex WPJ344 board support |
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3 | * |
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4 | * Copyright (c) 2011 Qualcomm Atheros |
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5 | * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org> |
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6 | * |
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7 | * Permission to use, copy, modify, and/or distribute this software for any |
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8 | * purpose with or without fee is hereby granted, provided that the above |
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9 | * copyright notice and this permission notice appear in all copies. |
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10 | * |
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11 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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12 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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13 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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14 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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15 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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16 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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17 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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18 | * |
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19 | */ |
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20 | |||
21 | #include <linux/phy.h> |
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22 | #include <linux/platform_device.h> |
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23 | #include <linux/ath9k_platform.h> |
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24 | #include <linux/ar8216_platform.h> |
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25 | |||
26 | #include <asm/mach-ath79/ar71xx_regs.h> |
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27 | |||
28 | #include "common.h" |
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29 | #include "pci.h" |
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30 | #include "dev-ap9x-pci.h" |
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31 | #include "dev-gpio-buttons.h" |
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32 | #include "dev-eth.h" |
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33 | #include "dev-usb.h" |
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34 | #include "dev-leds-gpio.h" |
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35 | #include "dev-m25p80.h" |
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36 | #include "dev-spi.h" |
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37 | #include "dev-wmac.h" |
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38 | #include "machtypes.h" |
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39 | |||
40 | #define WPJ344_GPIO_LED_SIG1 15 |
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41 | #define WPJ344_GPIO_LED_SIG2 20 |
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42 | #define WPJ344_GPIO_LED_SIG3 21 |
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43 | #define WPJ344_GPIO_LED_SIG4 22 |
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44 | #define WPJ344_GPIO_LED_STATUS 14 |
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45 | |||
46 | #define WPJ344_GPIO_BTN_RESET 12 |
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47 | |||
48 | #define WPJ344_KEYS_POLL_INTERVAL 20 /* msecs */ |
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49 | #define WPJ344_KEYS_DEBOUNCE_INTERVAL (3 * WPJ344_KEYS_POLL_INTERVAL) |
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50 | |||
51 | #define WPJ344_MAC0_OFFSET 0x10 |
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52 | #define WPJ344_MAC1_OFFSET 0x18 |
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53 | #define WPJ344_WMAC_CALDATA_OFFSET 0x1000 |
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54 | #define WPJ344_PCIE_CALDATA_OFFSET 0x5000 |
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55 | |||
56 | static struct gpio_led wpj344_leds_gpio[] __initdata = { |
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57 | { |
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58 | .name = "wpj344:green:status", |
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59 | .gpio = WPJ344_GPIO_LED_STATUS, |
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60 | .active_low = 1, |
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61 | }, |
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62 | { |
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63 | .name = "wpj344:red:sig1", |
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64 | .gpio = WPJ344_GPIO_LED_SIG1, |
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65 | .active_low = 1, |
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66 | }, |
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67 | { |
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68 | .name = "wpj344:yellow:sig2", |
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69 | .gpio = WPJ344_GPIO_LED_SIG2, |
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70 | .active_low = 1, |
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71 | }, |
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72 | { |
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73 | .name = "wpj344:green:sig3", |
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74 | .gpio = WPJ344_GPIO_LED_SIG3, |
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75 | .active_low = 1, |
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76 | }, |
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77 | { |
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78 | .name = "wpj344:green:sig4", |
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79 | .gpio = WPJ344_GPIO_LED_SIG4, |
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80 | .active_low = 1, |
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81 | } |
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82 | }; |
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83 | |||
84 | static struct gpio_keys_button wpj344_gpio_keys[] __initdata = { |
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85 | { |
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86 | .desc = "reset", |
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87 | .type = EV_KEY, |
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88 | .code = KEY_RESTART, |
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89 | .debounce_interval = WPJ344_KEYS_DEBOUNCE_INTERVAL, |
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90 | .gpio = WPJ344_GPIO_BTN_RESET, |
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91 | .active_low = 1, |
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92 | }, |
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93 | }; |
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94 | |||
95 | static struct ar8327_pad_cfg wpj344_ar8327_pad0_cfg = { |
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96 | .mode = AR8327_PAD_MAC_RGMII, |
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97 | .txclk_delay_en = true, |
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98 | .rxclk_delay_en = true, |
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99 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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100 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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101 | .mac06_exchange_dis = true, |
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102 | }; |
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103 | |||
104 | static struct ar8327_led_cfg wpj344_ar8327_led_cfg = { |
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105 | .led_ctrl0 = 0x00000000, |
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106 | .led_ctrl1 = 0xc737c737, |
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107 | .led_ctrl2 = 0x00000000, |
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108 | .led_ctrl3 = 0x00c30c00, |
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109 | .open_drain = true, |
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110 | }; |
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111 | |||
112 | static struct ar8327_platform_data wpj344_ar8327_data = { |
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113 | .pad0_cfg = &wpj344_ar8327_pad0_cfg, |
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114 | .port0_cfg = { |
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115 | .force_link = 1, |
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116 | .speed = AR8327_PORT_SPEED_1000, |
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117 | .duplex = 1, |
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118 | .txpause = 1, |
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119 | .rxpause = 1, |
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120 | }, |
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121 | .led_cfg = &wpj344_ar8327_led_cfg, |
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122 | }; |
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123 | |||
124 | static struct mdio_board_info wpj344_mdio0_info[] = { |
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125 | { |
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126 | .bus_id = "ag71xx-mdio.0", |
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3 | office | 127 | .phy_addr = 0, |
1 | office | 128 | .platform_data = &wpj344_ar8327_data, |
129 | }, |
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130 | }; |
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131 | |||
132 | static void __init wpj344_setup(void) |
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133 | { |
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134 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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135 | u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000); |
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136 | |||
137 | ath79_register_m25p80(NULL); |
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138 | ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj344_leds_gpio), |
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139 | wpj344_leds_gpio); |
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140 | ath79_register_gpio_keys_polled(-1, WPJ344_KEYS_POLL_INTERVAL, |
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141 | ARRAY_SIZE(wpj344_gpio_keys), |
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142 | wpj344_gpio_keys); |
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143 | |||
144 | ath79_register_usb(); |
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145 | |||
146 | ath79_register_wmac(art + WPJ344_WMAC_CALDATA_OFFSET, NULL); |
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147 | |||
148 | ath79_register_pci(); |
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149 | |||
150 | mdiobus_register_board_info(wpj344_mdio0_info, |
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151 | ARRAY_SIZE(wpj344_mdio0_info)); |
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152 | |||
153 | ath79_register_mdio(0, 0x0); |
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154 | |||
155 | ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ344_MAC0_OFFSET, 0); |
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156 | |||
157 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | |
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158 | AR934X_ETH_CFG_SW_ONLY_MODE); |
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159 | |||
160 | /* GMAC0 is connected to an AR8327 switch */ |
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161 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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162 | ath79_eth0_data.phy_mask = BIT(0); |
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163 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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164 | ath79_eth0_pll_data.pll_1000 = 0x06000000; |
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165 | |||
166 | ath79_register_eth(0); |
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167 | } |
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168 | |||
169 | MIPS_MACHINE(ATH79_MACH_WPJ344, "WPJ344", "Compex WPJ344", wpj344_setup); |