OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 0e2da1a792a21e3933e17727920ed3c35a3ba57a Mon Sep 17 00:00:00 2001 |
2 | From: Hauke Mehrtens <hauke@hauke-m.de> |
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3 | Date: Sun, 11 Mar 2018 15:13:30 +0100 |
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4 | Subject: [PATCH] arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus |
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5 | |||
6 | The Xunlong Orange Pi Zero Plus is single board computer. |
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7 | - H5 Quad-core 64-bit Cortex-A53 |
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8 | - 512MB DDR3 |
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9 | - microSD slot |
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10 | - Debug TTL UART |
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11 | - 1000M/100M/10M Ethernet RJ45 |
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12 | - Realtek RTL8189FTV |
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13 | - Spi flash (2MB) |
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14 | - One USB 2.0 HOST, One USB 2.0 OTG |
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15 | |||
16 | This is based on a patch from armbian: |
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17 | https://github.com/armbian/build/blob/master/patch/kernel/sunxi-next/sunxi-add-orangepi-zero-plus.patch |
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18 | |||
19 | Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> |
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20 | --- |
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21 | arch/arm64/boot/dts/allwinner/Makefile | 1 + |
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22 | .../dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 147 +++++++++++++++++++++ |
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23 | 2 files changed, 148 insertions(+) |
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24 | create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts |
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25 | |||
26 | --- a/arch/arm64/boot/dts/allwinner/Makefile |
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27 | +++ b/arch/arm64/boot/dts/allwinner/Makefile |
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28 | @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-p |
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29 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb |
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30 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb |
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31 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb |
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32 | +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb |
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33 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb |
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34 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb |
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35 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb |
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36 | --- /dev/null |
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37 | +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts |
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38 | @@ -0,0 +1,147 @@ |
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39 | +/* |
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40 | + * Copyright (C) 2016 ARM Ltd. |
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41 | + * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de> |
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42 | + * |
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43 | + * SPDX-License-Identifier: (GPL-2.0+ OR X11) |
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44 | + */ |
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45 | + |
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46 | +/dts-v1/; |
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47 | +#include "sun50i-h5.dtsi" |
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48 | + |
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49 | +#include <dt-bindings/gpio/gpio.h> |
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50 | +#include <dt-bindings/input/input.h> |
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51 | +#include <dt-bindings/pinctrl/sun4i-a10.h> |
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52 | + |
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53 | +/ { |
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54 | + model = "Xunlong Orange Pi Zero Plus"; |
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55 | + compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5"; |
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56 | + |
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57 | + reg_vcc3v3: vcc3v3 { |
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58 | + compatible = "regulator-fixed"; |
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59 | + regulator-name = "vcc3v3"; |
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60 | + regulator-min-microvolt = <3300000>; |
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61 | + regulator-max-microvolt = <3300000>; |
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62 | + }; |
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63 | + |
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64 | + aliases { |
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65 | + ethernet0 = &emac; |
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66 | + ethernet1 = &rtl8189ftv; |
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67 | + serial0 = &uart0; |
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68 | + }; |
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69 | + |
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70 | + chosen { |
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71 | + stdout-path = "serial0:115200n8"; |
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72 | + }; |
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73 | + |
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74 | + leds { |
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75 | + compatible = "gpio-leds"; |
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76 | + |
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77 | + pwr { |
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78 | + label = "orangepi:green:pwr"; |
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79 | + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ |
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80 | + default-state = "on"; |
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81 | + }; |
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82 | + |
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83 | + status { |
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84 | + label = "orangepi:red:status"; |
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85 | + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ |
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86 | + }; |
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87 | + }; |
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88 | + |
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89 | + reg_gmac_3v3: gmac-3v3 { |
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90 | + compatible = "regulator-fixed"; |
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91 | + regulator-name = "gmac-3v3"; |
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92 | + regulator-min-microvolt = <3300000>; |
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93 | + regulator-max-microvolt = <3300000>; |
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94 | + startup-delay-us = <100000>; |
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95 | + enable-active-high; |
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96 | + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ |
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97 | + }; |
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98 | +}; |
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99 | + |
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100 | +&ehci0 { |
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101 | + status = "okay"; |
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102 | +}; |
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103 | + |
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104 | +&ehci1 { |
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105 | + status = "okay"; |
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106 | +}; |
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107 | + |
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108 | +&emac { |
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109 | + pinctrl-names = "default"; |
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110 | + pinctrl-0 = <&emac_rgmii_pins>; |
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111 | + phy-supply = <®_gmac_3v3>; |
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112 | + phy-handle = <&ext_rgmii_phy>; |
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113 | + phy-mode = "rgmii"; |
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114 | + status = "okay"; |
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115 | +}; |
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116 | + |
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117 | +&external_mdio { |
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118 | + ext_rgmii_phy: ethernet-phy@1 { |
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119 | + compatible = "ethernet-phy-ieee802.3-c22"; |
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120 | + reg = <1>; |
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121 | + }; |
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122 | +}; |
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123 | + |
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124 | +&mmc0 { |
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125 | + pinctrl-names = "default"; |
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126 | + pinctrl-0 = <&mmc0_pins_a>; |
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127 | + vmmc-supply = <®_vcc3v3>; |
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128 | + bus-width = <4>; |
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129 | + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ |
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130 | + status = "okay"; |
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131 | +}; |
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132 | + |
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133 | +&mmc1 { |
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134 | + pinctrl-names = "default"; |
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135 | + pinctrl-0 = <&mmc1_pins_a>; |
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136 | + vmmc-supply = <®_vcc3v3>; |
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137 | + bus-width = <4>; |
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138 | + non-removable; |
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139 | + status = "okay"; |
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140 | + |
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141 | + /* |
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142 | + * Explicitly define the sdio device, so that we can add an ethernet |
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143 | + * alias for it (which e.g. makes u-boot set a mac-address). |
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144 | + */ |
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145 | + rtl8189ftv: sdio_wifi@1 { |
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146 | + reg = <1>; |
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147 | + }; |
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148 | +}; |
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149 | + |
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150 | +&spi0 { |
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151 | + status = "okay"; |
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152 | + |
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153 | + flash@0 { |
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154 | + #address-cells = <1>; |
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155 | + #size-cells = <1>; |
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156 | + compatible = "mxicy,mx25l1606e", "winbond,w25q128"; |
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157 | + reg = <0>; |
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158 | + spi-max-frequency = <40000000>; |
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159 | + }; |
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160 | +}; |
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161 | + |
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162 | +&ohci0 { |
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163 | + status = "okay"; |
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164 | +}; |
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165 | + |
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166 | +&ohci1 { |
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167 | + status = "okay"; |
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168 | +}; |
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169 | + |
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170 | +&uart0 { |
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171 | + pinctrl-names = "default"; |
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172 | + pinctrl-0 = <&uart0_pins_a>; |
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173 | + status = "okay"; |
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174 | +}; |
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175 | + |
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176 | +&usb_otg { |
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177 | + dr_mode = "peripheral"; |
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178 | + status = "okay"; |
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179 | +}; |
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180 | + |
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181 | +&usbphy { |
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182 | + /* USB Type-A ports' VBUS is always on */ |
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183 | + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ |
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184 | + status = "okay"; |
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185 | +}; |