OpenWrt – Blame information for rev 1
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1 | office | 1 | From 54cc3330c2334a0cea8cafc105a29c5d67f9fd32 Mon Sep 17 00:00:00 2001 |
2 | From: Antony Antony <antony@phenome.org> |
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3 | Date: Fri, 2 Mar 2018 10:50:48 +0100 |
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4 | Subject: [PATCH] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support |
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5 | |||
6 | Add initial DT for NanoPi NEO Plus2 by FriendlyARM |
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7 | - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU |
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8 | - 1 GB DDR3 RAM |
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9 | - 8GB eMMC flash (Samsung KLM8G1WEPD-B031) |
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10 | - micro SD card slot |
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11 | - Gigabit Ethernet (external RTL8211E-VB-CG chip) |
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12 | - 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module) |
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13 | - 2x USB 2.0 host ports & 2x USB via headers |
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14 | |||
15 | Kernel 4.15 commit d7341305863b |
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16 | Kernel 4.16 commit 27d7f9297027 |
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17 | |||
18 | Signed-off-by: Antony Antony <antony@phenome.org> |
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19 | |||
20 | --- a/arch/arm64/boot/dts/allwinner/Makefile |
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21 | +++ b/arch/arm64/boot/dts/allwinner/Makefile |
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22 | @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-or |
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23 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb |
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24 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb |
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25 | dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb |
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26 | +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb |
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27 | |||
28 | always := $(dtb-y) |
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29 | subdir-y := $(dts-dirs) |
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30 | --- /dev/null |
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31 | +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts |
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32 | @@ -0,0 +1,210 @@ |
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33 | +/* |
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34 | + * Copyright (C) 2017 Antony Antony <antony@phenome.org> |
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35 | + * Copyright (C) 2016 ARM Ltd. |
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36 | + * |
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37 | + * This file is dual-licensed: you can use it either under the terms |
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38 | + * of the GPL or the X11 license, at your option. Note that this dual |
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39 | + * licensing only applies to this file, and not this project as a |
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40 | + * whole. |
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41 | + * |
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42 | + * a) This file is free software; you can redistribute it and/or |
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43 | + * modify it under the terms of the GNU General Public License as |
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44 | + * published by the Free Software Foundation; either version 2 of the |
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45 | + * License, or (at your option) any later version. |
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46 | + * |
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47 | + * This file is distributed in the hope that it will be useful, |
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48 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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49 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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50 | + * GNU General Public License for more details. |
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51 | + * |
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52 | + * Or, alternatively, |
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53 | + * |
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54 | + * b) Permission is hereby granted, free of charge, to any person |
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55 | + * obtaining a copy of this software and associated documentation |
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56 | + * files (the "Software"), to deal in the Software without |
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57 | + * restriction, including without limitation the rights to use, |
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58 | + * copy, modify, merge, publish, distribute, sublicense, and/or |
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59 | + * sell copies of the Software, and to permit persons to whom the |
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60 | + * Software is furnished to do so, subject to the following |
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61 | + * conditions: |
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62 | + * |
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63 | + * The above copyright notice and this permission notice shall be |
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64 | + * included in all copies or substantial portions of the Software. |
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65 | + * |
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66 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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67 | + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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68 | + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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69 | + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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70 | + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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71 | + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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72 | + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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73 | + * OTHER DEALINGS IN THE SOFTWARE. |
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74 | + */ |
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75 | + |
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76 | +/dts-v1/; |
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77 | +#include "sun50i-h5.dtsi" |
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78 | + |
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79 | +#include <dt-bindings/gpio/gpio.h> |
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80 | +#include <dt-bindings/input/input.h> |
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81 | +#include <dt-bindings/pinctrl/sun4i-a10.h> |
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82 | + |
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83 | +/ { |
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84 | + model = "FriendlyARM NanoPi NEO Plus2"; |
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85 | + compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5"; |
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86 | + |
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87 | + aliases { |
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88 | + ethernet0 = &emac; |
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89 | + serial0 = &uart0; |
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90 | + }; |
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91 | + |
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92 | + chosen { |
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93 | + stdout-path = "serial0:115200n8"; |
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94 | + }; |
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95 | + |
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96 | + leds { |
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97 | + compatible = "gpio-leds"; |
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98 | + |
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99 | + pwr { |
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100 | + label = "nanopi:green:pwr"; |
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101 | + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; |
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102 | + default-state = "on"; |
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103 | + }; |
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104 | + |
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105 | + status { |
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106 | + label = "nanopi:red:status"; |
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107 | + gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>; |
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108 | + }; |
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109 | + }; |
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110 | + |
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111 | + reg_gmac_3v3: gmac-3v3 { |
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112 | + compatible = "regulator-fixed"; |
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113 | + pinctrl-names = "default"; |
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114 | + regulator-name = "gmac-3v3"; |
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115 | + regulator-min-microvolt = <3300000>; |
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116 | + regulator-max-microvolt = <3300000>; |
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117 | + startup-delay-us = <100000>; |
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118 | + enable-active-high; |
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119 | + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; |
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120 | + }; |
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121 | + |
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122 | + reg_vcc3v3: vcc3v3 { |
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123 | + compatible = "regulator-fixed"; |
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124 | + regulator-name = "vcc3v3"; |
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125 | + regulator-min-microvolt = <3300000>; |
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126 | + regulator-max-microvolt = <3300000>; |
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127 | + }; |
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128 | + |
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129 | + vdd_cpux: gpio-regulator { |
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130 | + compatible = "regulator-gpio"; |
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131 | + pinctrl-names = "default"; |
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132 | + regulator-name = "vdd-cpux"; |
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133 | + regulator-type = "voltage"; |
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134 | + regulator-boot-on; |
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135 | + regulator-always-on; |
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136 | + regulator-min-microvolt = <1100000>; |
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137 | + regulator-max-microvolt = <1300000>; |
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138 | + regulator-ramp-delay = <50>; /* 4ms */ |
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139 | + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; |
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140 | + gpios-states = <0x1>; |
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141 | + states = <1100000 0x0 |
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142 | + 1300000 0x1>; |
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143 | + }; |
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144 | + |
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145 | + wifi_pwrseq: wifi_pwrseq { |
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146 | + compatible = "mmc-pwrseq-simple"; |
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147 | + pinctrl-names = "default"; |
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148 | + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ |
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149 | + post-power-on-delay-ms = <200>; |
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150 | + }; |
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151 | +}; |
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152 | + |
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153 | +&codec { |
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154 | + allwinner,audio-routing = |
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155 | + "Line Out", "LINEOUT", |
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156 | + "MIC1", "Mic", |
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157 | + "Mic", "MBIAS"; |
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158 | + status = "okay"; |
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159 | +}; |
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160 | + |
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161 | +&ehci0 { |
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162 | + status = "okay"; |
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163 | +}; |
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164 | + |
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165 | +&ehci3 { |
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166 | + status = "okay"; |
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167 | +}; |
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168 | + |
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169 | +&emac { |
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170 | + pinctrl-names = "default"; |
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171 | + pinctrl-0 = <&emac_rgmii_pins>; |
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172 | + phy-supply = <®_gmac_3v3>; |
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173 | + phy-handle = <&ext_rgmii_phy>; |
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174 | + phy-mode = "rgmii"; |
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175 | + status = "okay"; |
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176 | +}; |
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177 | + |
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178 | +&external_mdio { |
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179 | + ext_rgmii_phy: ethernet-phy@7 { |
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180 | + compatible = "ethernet-phy-ieee802.3-c22"; |
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181 | + reg = <7>; |
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182 | + }; |
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183 | +}; |
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184 | + |
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185 | +&mmc0 { |
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186 | + pinctrl-names = "default"; |
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187 | + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; |
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188 | + vmmc-supply = <®_vcc3v3>; |
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189 | + bus-width = <4>; |
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190 | + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ |
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191 | + status = "okay"; |
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192 | +}; |
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193 | + |
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194 | +&mmc1 { |
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195 | + pinctrl-names = "default"; |
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196 | + pinctrl-0 = <&mmc1_pins_a>; |
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197 | + vmmc-supply = <®_vcc3v3>; |
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198 | + vqmmc-supply = <®_vcc3v3>; |
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199 | + mmc-pwrseq = <&wifi_pwrseq>; |
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200 | + bus-width = <4>; |
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201 | + non-removable; |
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202 | + status = "okay"; |
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203 | + |
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204 | + brcmf: wifi@1 { |
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205 | + reg = <1>; |
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206 | + compatible = "brcm,bcm4329-fmac"; |
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207 | + }; |
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208 | +}; |
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209 | + |
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210 | +&mmc2 { |
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211 | + pinctrl-names = "default"; |
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212 | + pinctrl-0 = <&mmc2_8bit_pins>; |
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213 | + vmmc-supply = <®_vcc3v3>; |
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214 | + bus-width = <8>; |
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215 | + non-removable; |
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216 | + cap-mmc-hw-reset; |
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217 | + status = "okay"; |
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218 | +}; |
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219 | + |
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220 | +&ohci0 { |
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221 | + status = "okay"; |
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222 | +}; |
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223 | + |
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224 | +&ohci3 { |
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225 | + status = "okay"; |
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226 | +}; |
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227 | + |
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228 | +&uart0 { |
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229 | + pinctrl-names = "default"; |
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230 | + pinctrl-0 = <&uart0_pins_a>; |
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231 | + status = "okay"; |
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232 | +}; |
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233 | + |
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234 | +&usb_otg { |
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235 | + dr_mode = "host"; |
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236 | + status = "okay"; |
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237 | +}; |
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238 | + |
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239 | +&usbphy { |
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240 | + /* USB Type-A ports' VBUS is always on */ |
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241 | + status = "okay"; |
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242 | +}; |