OpenWrt – Blame information for rev 1

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Rev Author Line No. Line
1 office 1 /dts-v1/;
2  
3 #include "mt7620a.dtsi"
4  
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7  
8 / {
9 compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
10 model = "Ralink MT7620A evaluation board";
11  
12 keys {
13 compatible = "gpio-keys";
14 poll-interval = <20>;
15  
16 wps {
17 label = "wps";
18 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
19 linux,code = <BTN_0>;
20 };
21  
22 reset {
23 label = "reset";
24 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
25 linux,code = <BTN_1>;
26 };
27 };
28 };
29  
30 &gpio0 {
31 status = "okay";
32 };
33  
34 &spi0 {
35 status = "okay";
36  
37 m25p80@0 {
38 compatible = "jedec,spi-nor";
39 reg = <0>;
40 spi-max-frequency = <1000000>;
41  
42 partitions {
43 compatible = "fixed-partitions";
44 #address-cells = <1>;
45 #size-cells = <1>;
46  
47 partition@0 {
48 label = "u-boot";
49 reg = <0x0 0x30000>;
50 read-only;
51 };
52  
53 partition@30000 {
54 label = "u-boot-env";
55 reg = <0x30000 0x10000>;
56 read-only;
57 };
58  
59 factory: partition@40000 {
60 label = "factory";
61 reg = <0x40000 0x10000>;
62 read-only;
63 };
64  
65 partition@50000 {
66 compatible = "denx,uimage";
67 label = "firmware";
68 reg = <0x50000 0x7b0000>;
69 };
70 };
71 };
72 };
73  
74 &ethernet {
75 status = "okay";
76 pinctrl-names = "default";
77 pinctrl-0 = <&ephy_pins>;
78 mediatek,portmap = "llllw";
79 };
80  
81 &gsw {
82 mediatek,port4 = "ephy";
83 };
84  
85 &sdhci {
86 status = "okay";
87 };
88  
89 &pcie {
90 status = "okay";
91 };
92  
93 &pcie0 {
94 wifi@0,0 {
95 reg = <0x0000 0 0 0 0>;
96 mediatek,mtd-eeprom = <&factory 0x8000>;
97 ieee80211-freq-limit = <5000000 6000000>;
98 };
99 };