OpenWrt – Blame information for rev 1

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1 office 1 /*
2 * Moschip MCS814x timer routines
3 *
4 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
5 *
6 * Licensed under GPLv2
7 */
8 #include <linux/kernel.h>
9 #include <linux/interrupt.h>
10 #include <linux/time.h>
11 #include <linux/timex.h>
12 #include <linux/irq.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
15 #include <linux/io.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_irq.h>
19  
20 #include <asm/mach/time.h>
21 #include <mach/mcs814x.h>
22  
23 /* Timer block registers */
24 #define TIMER_VAL 0x00
25 #define TIMER_CTL 0x04
26 #define TIMER_CTL_EN 0x01
27 #define TIMER_CTL_DBG 0x02
28  
29 static u32 last_reload;
30 static u32 timer_correct;
31 static u32 clock_rate;
32 static u32 timer_reload_value;
33 static void __iomem *mcs814x_timer_base;
34  
35 static inline u32 ticks2usecs(u32 x)
36 {
37 return x / (clock_rate / 1000000);
38 }
39  
40 /*
41 * Returns number of ms since last clock interrupt. Note that interrupts
42 * will have been disabled by do_gettimeoffset()
43 */
44 static u32 mcs814x_gettimeoffset(void)
45 {
46 u32 ticks = readl_relaxed(mcs814x_timer_base + TIMER_VAL);
47  
48 if (ticks < last_reload)
49 return ticks2usecs(ticks + (u32)(0xffffffff - last_reload));
50 else
51 return ticks2usecs(ticks - last_reload);
52 }
53  
54  
55 static irqreturn_t mcs814x_timer_interrupt(int irq, void *dev_id)
56 {
57 u32 count = readl_relaxed(mcs814x_timer_base + TIMER_VAL);
58  
59 /* take into account delay up to this moment */
60 last_reload = count + timer_correct + timer_reload_value;
61  
62 if (last_reload < timer_reload_value) {
63 last_reload = timer_reload_value;
64 } else {
65 if (timer_correct == 0)
66 timer_correct = readl_relaxed(mcs814x_timer_base + TIMER_VAL) - count;
67 }
68 writel_relaxed(last_reload, mcs814x_timer_base + TIMER_VAL);
69  
70 timer_tick();
71  
72 return IRQ_HANDLED;
73 }
74  
75 static struct of_device_id mcs814x_timer_ids[] = {
76 { .compatible = "moschip,mcs814x-timer" },
77 { /* sentinel */ },
78 };
79  
80 static int __init mcs814x_of_timer_init(void)
81 {
82 struct device_node *np;
83 int irq;
84  
85 np = of_find_matching_node(NULL, mcs814x_timer_ids);
86 if (!np)
87 panic("unable to find compatible timer node in dtb");
88  
89 mcs814x_timer_base = of_iomap(np, 0);
90 if (!mcs814x_timer_base)
91 panic("unable to remap timer cpu registers");
92  
93 irq = irq_of_parse_and_map(np, 0);
94 if (!irq)
95 panic("no interrupts property/mapping failed for timer");
96  
97 return irq;
98 }
99  
100 void __init mcs814x_timer_init(void)
101 {
102 struct clk *clk;
103 int irq;
104  
105 arch_gettimeoffset = mcs814x_gettimeoffset;
106  
107 clk = clk_get_sys("timer0", NULL);
108 if (IS_ERR_OR_NULL(clk))
109 panic("unable to get timer0 clock");
110  
111 clock_rate = clk_get_rate(clk);
112  
113 irq = mcs814x_of_timer_init();
114  
115 pr_info("Timer frequency: %d (kHz)\n", clock_rate / 1000);
116  
117 timer_reload_value = 0xffffffff - (clock_rate / HZ);
118  
119 /* disable timer */
120 writel_relaxed(~TIMER_CTL_EN, mcs814x_timer_base + TIMER_CTL);
121 writel_relaxed(timer_reload_value, mcs814x_timer_base + TIMER_VAL);
122 last_reload = timer_reload_value;
123  
124 if (request_irq(irq, mcs814x_timer_interrupt,
125 IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
126 "mcs814x-timer", NULL))
127 panic("unable to request timer0 irq %d", irq);
128  
129 /* enable timer, stop timer in debug mode */
130 writel_relaxed(TIMER_CTL_EN | TIMER_CTL_DBG,
131 mcs814x_timer_base + TIMER_CTL);
132 }