OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | --- a/arch/mips/Kconfig |
2 | +++ b/arch/mips/Kconfig |
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3 | @@ -2327,6 +2327,12 @@ config MIPS_VPE_LOADER |
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4 | Includes a loader for loading an elf relocatable object |
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5 | onto another VPE and running it. |
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6 | |||
7 | +config IFX_VPE_EXT |
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8 | + bool "IFX APRP Extensions" |
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9 | + depends on MIPS_VPE_LOADER |
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10 | + help |
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11 | + IFX included extensions in APRP |
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12 | + |
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13 | config MIPS_VPE_LOADER_CMP |
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14 | bool |
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15 | default "y" |
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16 | --- a/arch/mips/include/asm/vpe.h |
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17 | +++ b/arch/mips/include/asm/vpe.h |
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18 | @@ -127,4 +127,13 @@ void cleanup_tc(struct tc *tc); |
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19 | |||
20 | int __init vpe_module_init(void); |
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21 | void __exit vpe_module_exit(void); |
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22 | + |
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23 | +/* For the explanation of the APIs please refer the section "MT APRP Kernel |
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24 | + * Programming" in AR9 SW Architecture Specification |
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25 | + */ |
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26 | +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags); |
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27 | +int32_t vpe1_sw_stop(uint32_t flags); |
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28 | +uint32_t vpe1_get_load_addr(uint32_t flags); |
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29 | +uint32_t vpe1_get_max_mem(uint32_t flags); |
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30 | + |
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31 | #endif /* _ASM_VPE_H */ |
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32 | --- a/arch/mips/kernel/vpe-mt.c |
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33 | +++ b/arch/mips/kernel/vpe-mt.c |
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34 | @@ -29,6 +29,7 @@ int vpe_run(struct vpe *v) |
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35 | struct vpe_notifications *notifier; |
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36 | unsigned int vpeflags; |
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37 | struct tc *t; |
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38 | + unsigned long physical_memsize = 0L; |
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39 | |||
40 | /* check we are the Master VPE */ |
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41 | local_irq_save(flags); |
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42 | @@ -417,6 +418,8 @@ int __init vpe_module_init(void) |
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43 | } |
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44 | |||
45 | v->ntcs = hw_tcs - aprp_cpu_index(); |
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46 | + write_tc_c0_tcbind((read_tc_c0_tcbind() & |
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47 | + ~TCBIND_CURVPE) | 1); |
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48 | |||
49 | /* add the tc to the list of this vpe's tc's. */ |
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50 | list_add(&t->tc, &v->tc); |
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51 | @@ -519,3 +522,47 @@ void __exit vpe_module_exit(void) |
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52 | release_vpe(v); |
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53 | } |
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54 | } |
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55 | + |
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56 | +#ifdef CONFIG_IFX_VPE_EXT |
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57 | +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags) |
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58 | +{ |
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59 | + enum vpe_state state; |
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60 | + struct vpe *v = get_vpe(tclimit); |
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61 | + struct vpe_notifications *not; |
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62 | + |
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63 | + if (tcmask || flags) { |
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64 | + pr_warn("Currently tcmask and flags should be 0. Other values are not supported\n"); |
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65 | + return -1; |
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66 | + } |
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67 | + |
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68 | + state = xchg(&v->state, VPE_STATE_INUSE); |
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69 | + if (state != VPE_STATE_UNUSED) { |
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70 | + vpe_stop(v); |
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71 | + |
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72 | + list_for_each_entry(not, &v->notify, list) { |
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73 | + not->stop(tclimit); |
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74 | + } |
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75 | + } |
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76 | + |
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77 | + v->__start = (unsigned long)sw_start_addr; |
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78 | + |
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79 | + if (!vpe_run(v)) { |
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80 | + pr_debug("VPE loader: VPE1 running successfully\n"); |
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81 | + return 0; |
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82 | + } |
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83 | + return -1; |
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84 | +} |
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85 | +EXPORT_SYMBOL(vpe1_sw_start); |
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86 | + |
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87 | +int32_t vpe1_sw_stop(uint32_t flags) |
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88 | +{ |
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89 | + struct vpe *v = get_vpe(tclimit); |
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90 | + |
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91 | + if (!vpe_free(v)) { |
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92 | + pr_debug("RP Stopped\n"); |
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93 | + return 0; |
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94 | + } else |
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95 | + return -1; |
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96 | +} |
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97 | +EXPORT_SYMBOL(vpe1_sw_stop); |
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98 | +#endif |
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99 | --- a/arch/mips/kernel/vpe.c |
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100 | +++ b/arch/mips/kernel/vpe.c |
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101 | @@ -49,6 +49,41 @@ struct vpe_control vpecontrol = { |
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102 | .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list) |
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103 | }; |
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104 | |||
105 | +#ifdef CONFIG_IFX_VPE_EXT |
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106 | +unsigned int vpe1_load_addr; |
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107 | + |
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108 | +static int __init load_address(char *str) |
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109 | +{ |
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110 | + get_option(&str, &vpe1_load_addr); |
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111 | + return 1; |
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112 | +} |
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113 | +__setup("vpe1_load_addr=", load_address); |
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114 | + |
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115 | +static unsigned int vpe1_mem; |
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116 | +static int __init vpe1mem(char *str) |
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117 | +{ |
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118 | + vpe1_mem = memparse(str, &str); |
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119 | + return 1; |
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120 | +} |
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121 | +__setup("vpe1_mem=", vpe1mem); |
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122 | + |
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123 | +uint32_t vpe1_get_load_addr(uint32_t flags) |
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124 | +{ |
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125 | + return vpe1_load_addr; |
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126 | +} |
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127 | +EXPORT_SYMBOL(vpe1_get_load_addr); |
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128 | + |
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129 | +uint32_t vpe1_get_max_mem(uint32_t flags) |
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130 | +{ |
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131 | + if (!vpe1_mem) |
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132 | + return P_SIZE; |
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133 | + else |
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134 | + return vpe1_mem; |
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135 | +} |
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136 | +EXPORT_SYMBOL(vpe1_get_max_mem); |
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137 | + |
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138 | +#endif |
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139 | + |
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140 | /* get the vpe associated with this minor */ |
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141 | struct vpe *get_vpe(int minor) |
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142 | { |
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143 | --- a/arch/mips/lantiq/prom.c |
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144 | +++ b/arch/mips/lantiq/prom.c |
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145 | @@ -37,10 +37,14 @@ unsigned long physical_memsize = 0L; |
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146 | */ |
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147 | static struct ltq_soc_info soc_info; |
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148 | |||
149 | +/* for Multithreading (APRP), vpe.c will use it */ |
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150 | +unsigned long cp0_memsize; |
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151 | + |
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152 | const char *get_system_type(void) |
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153 | { |
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154 | return soc_info.sys_type; |
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155 | } |
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156 | +EXPORT_SYMBOL(ltq_soc_type); |
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157 | |||
158 | int ltq_soc_type(void) |
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159 | { |
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160 | --- a/arch/mips/include/asm/mipsmtregs.h |
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161 | +++ b/arch/mips/include/asm/mipsmtregs.h |
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162 | @@ -32,6 +32,9 @@ |
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163 | #define read_c0_vpeconf1() __read_32bit_c0_register($1, 3) |
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164 | #define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val) |
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165 | |||
166 | +#define read_c0_vpeopt() __read_32bit_c0_register($1, 7) |
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167 | +#define write_c0_vpeopt(val) __write_32bit_c0_register($1, 7, val) |
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168 | + |
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169 | #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) |
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170 | #define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val) |
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171 | |||
172 | @@ -377,6 +380,8 @@ do { \ |
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173 | #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) |
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174 | #define read_vpe_c0_vpeconf1() mftc0(1, 3) |
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175 | #define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val) |
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176 | +#define read_vpe_c0_vpeopt() mftc0(1, 7) |
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177 | +#define write_vpe_c0_vpeopt(val) mttc0(1, 7, val) |
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178 | #define read_vpe_c0_count() mftc0(9, 0) |
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179 | #define write_vpe_c0_count(val) mttc0(9, 0, val) |
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180 | #define read_vpe_c0_status() mftc0(12, 0) |