OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | /dts-v1/; |
2 | |||
3 | #include "vr9.dtsi" |
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4 | |||
5 | #include <dt-bindings/input/input.h> |
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6 | #include <dt-bindings/mips/lantiq_rcu_gphy.h> |
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7 | |||
8 | / { |
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9 | compatible = "avm,fritz7360sl", "lantiq,xway", "lantiq,vr9"; |
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10 | model = "AVM FRITZ!Box 7360 SL"; |
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11 | |||
12 | chosen { |
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13 | bootargs = "console=ttyLTQ0,115200"; |
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14 | }; |
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15 | |||
16 | aliases { |
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17 | led-boot = &power_green; |
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18 | led-failsafe = &power_red; |
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19 | led-running = &power_green; |
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20 | led-upgrade = &power_green; |
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21 | |||
22 | led-dsl = &info_green; |
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23 | led-wifi = &wifi; |
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24 | }; |
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25 | |||
26 | memory@0 { |
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27 | reg = <0x0 0x8000000>; |
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28 | }; |
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29 | |||
30 | gpio-keys-polled { |
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31 | compatible = "gpio-keys-polled"; |
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32 | #address-cells = <1>; |
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33 | #size-cells = <0>; |
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34 | poll-interval = <100>; |
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35 | dect { |
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36 | label = "dect"; |
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37 | gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; |
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38 | linux,code = <KEY_PHONE>; |
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39 | }; |
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40 | wifi { |
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41 | label = "wifi"; |
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42 | gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; |
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43 | linux,code = <KEY_WLAN>; |
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44 | }; |
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45 | }; |
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46 | |||
47 | gpio-leds { |
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48 | compatible = "gpio-leds"; |
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49 | |||
50 | power_green: power { |
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51 | label = "fritz7360sl:green:power"; |
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52 | gpios = <&gpio 32 GPIO_ACTIVE_LOW>; |
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53 | default-state = "keep"; |
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54 | }; |
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55 | power_red: power2 { |
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56 | label = "fritz7360sl:red:power"; |
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57 | gpios = <&gpio 33 GPIO_ACTIVE_LOW>; |
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58 | }; |
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59 | info_red { |
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60 | label = "fritz7360sl:red:info"; |
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61 | gpios = <&gpio 34 GPIO_ACTIVE_LOW>; |
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62 | }; |
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63 | info_green: info_green { |
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64 | label = "fritz7360sl:green:info"; |
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65 | gpios = <&gpio 47 GPIO_ACTIVE_LOW>; |
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66 | }; |
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67 | wifi: wifi { |
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68 | label = "fritz7360sl:green:wlan"; |
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69 | gpios = <&gpio 36 GPIO_ACTIVE_LOW>; |
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70 | }; |
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71 | dect { |
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72 | label = "fritz7360sl:green:dect"; |
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73 | gpios = <&gpio 35 GPIO_ACTIVE_LOW>; |
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74 | }; |
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75 | }; |
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76 | }; |
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77 | |||
78 | ð0 { |
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79 | lan: interface@0 { |
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80 | compatible = "lantiq,xrx200-pdi"; |
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81 | #address-cells = <1>; |
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82 | #size-cells = <0>; |
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83 | reg = <0>; |
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84 | mtd-mac-address = <&urlader 0xa91>; |
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85 | mtd-mac-address-increment = <(-2)>; |
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86 | lantiq,switch; |
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87 | |||
88 | ethernet@0 { |
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89 | compatible = "lantiq,xrx200-pdi-port"; |
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90 | reg = <0>; |
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91 | phy-mode = "rmii"; |
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92 | phy-handle = <&phy0>; |
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93 | }; |
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94 | ethernet@1 { |
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95 | compatible = "lantiq,xrx200-pdi-port"; |
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96 | reg = <1>; |
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97 | phy-mode = "rmii"; |
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98 | phy-handle = <&phy1>; |
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99 | }; |
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100 | ethernet@2 { |
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101 | compatible = "lantiq,xrx200-pdi-port"; |
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102 | reg = <2>; |
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103 | phy-mode = "gmii"; |
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104 | phy-handle = <&phy11>; |
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105 | }; |
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106 | ethernet@3 { |
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107 | compatible = "lantiq,xrx200-pdi-port"; |
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108 | reg = <4>; |
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109 | phy-mode = "gmii"; |
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110 | phy-handle = <&phy13>; |
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111 | }; |
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112 | }; |
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113 | |||
114 | mdio@0 { |
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115 | #address-cells = <1>; |
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116 | #size-cells = <0>; |
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117 | compatible = "lantiq,xrx200-mdio"; |
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118 | reg = <0>; |
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119 | |||
120 | phy0: ethernet-phy@0 { |
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121 | reg = <0x00>; |
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122 | compatible = "ethernet-phy-ieee802.3-c22"; |
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123 | reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>; |
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124 | }; |
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125 | phy1: ethernet-phy@1 { |
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126 | reg = <0x01>; |
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127 | compatible = "ethernet-phy-ieee802.3-c22"; |
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128 | reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; |
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129 | }; |
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130 | phy11: ethernet-phy@11 { |
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131 | reg = <0x11>; |
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132 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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133 | }; |
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134 | phy13: ethernet-phy@13 { |
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135 | reg = <0x13>; |
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136 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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137 | }; |
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138 | }; |
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139 | }; |
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140 | |||
141 | &gphy0 { |
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142 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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143 | }; |
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144 | |||
145 | &gphy1 { |
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146 | lantiq,gphy-mode = <GPHY_MODE_GE>; |
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147 | }; |
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148 | |||
149 | &gpio { |
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150 | pinctrl-names = "default"; |
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151 | pinctrl-0 = <&state_default>; |
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152 | |||
153 | state_default: pinmux { |
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154 | mdio { |
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155 | lantiq,groups = "mdio"; |
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156 | lantiq,function = "mdio"; |
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157 | }; |
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158 | phy-rst { |
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159 | lantiq,pins = "io37", "io44"; |
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160 | lantiq,pull = <0>; |
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161 | lantiq,open-drain; |
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162 | lantiq,output = <1>; |
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163 | }; |
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164 | pcie-rst { |
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165 | lantiq,pins = "io38"; |
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166 | lantiq,pull = <0>; |
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167 | lantiq,output = <1>; |
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168 | }; |
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169 | }; |
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170 | }; |
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171 | |||
172 | &localbus { |
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173 | nor@0 { |
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174 | compatible = "lantiq,nor"; |
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175 | bank-width = <2>; |
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176 | reg = <0 0x0 0x1000000>; |
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177 | #address-cells = <1>; |
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178 | #size-cells = <1>; |
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179 | |||
180 | partitions { |
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181 | compatible = "fixed-partitions"; |
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182 | #address-cells = <1>; |
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183 | #size-cells = <1>; |
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184 | urlader: partition@0 { |
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185 | label = "urlader"; |
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186 | reg = <0x00000 0x20000>; |
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187 | read-only; |
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188 | }; |
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189 | |||
190 | partition@20000 { |
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191 | label = "firmware"; |
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192 | reg = <0x20000 0xf60000>; |
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193 | }; |
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194 | |||
195 | partition@f80000 { |
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196 | label = "tffs (1)"; |
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197 | reg = <0xf80000 0x40000>; |
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198 | read-only; |
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199 | }; |
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200 | |||
201 | partition@fc0000 { |
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202 | label = "tffs (2)"; |
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203 | reg = <0xfc0000 0x40000>; |
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204 | read-only; |
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205 | }; |
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206 | }; |
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207 | }; |
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208 | }; |
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209 | |||
210 | &pcie0 { |
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211 | pcie@0 { |
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212 | reg = <0 0 0 0 0>; |
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213 | #interrupt-cells = <1>; |
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214 | #size-cells = <2>; |
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215 | #address-cells = <3>; |
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216 | device_type = "pci"; |
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217 | |||
218 | wifi@168c,002e { |
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219 | compatible = "pci168c,002e"; |
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220 | reg = <0 0 0 0 0>; |
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221 | qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */ |
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222 | }; |
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223 | }; |
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224 | }; |
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225 | |||
226 | &usb_phy0 { |
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227 | status = "okay"; |
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228 | }; |
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229 | |||
230 | &usb_phy1 { |
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231 | status = "okay"; |
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232 | }; |
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233 | |||
234 | &usb0 { |
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235 | status = "okay"; |
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236 | }; |
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237 | |||
238 | &usb1 { |
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239 | status = "okay"; |
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240 | }; |