OpenWrt – Blame information for rev 1
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
1 | office | 1 | From 28d0ed88f536dd639adf1b0c7c08e04be3c8f294 Mon Sep 17 00:00:00 2001 |
2 | From: Thomas Pedersen <twp@codeaurora.org> |
||
3 | Date: Mon, 16 May 2016 17:58:50 -0700 |
||
4 | Subject: [PATCH 01/69] dtbindings: qcom_adm: Fix channel specifiers |
||
5 | |||
6 | Original patch from Andy Gross. |
||
7 | |||
8 | This patch removes the crci information from the dma |
||
9 | channel property. At least one client device requires |
||
10 | using more than one CRCI value for a channel. This does |
||
11 | not match the current binding and the crci information |
||
12 | needs to be removed. |
||
13 | |||
14 | Instead, the client device will provide this information |
||
15 | via other means. |
||
16 | |||
17 | Signed-off-by: Andy Gross <agross@codeaurora.org> |
||
18 | Signed-off-by: Thomas Pedersen <twp@codeaurora.org> |
||
19 | --- |
||
20 | Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++---------- |
||
21 | 1 file changed, 6 insertions(+), 10 deletions(-) |
||
22 | |||
23 | --- a/Documentation/devicetree/bindings/dma/qcom_adm.txt |
||
24 | +++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt |
||
25 | @@ -4,8 +4,7 @@ Required properties: |
||
26 | - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 |
||
27 | - reg: Address range for DMA registers |
||
28 | - interrupts: Should contain one interrupt shared by all channels |
||
29 | -- #dma-cells: must be <2>. First cell denotes the channel number. Second cell |
||
30 | - denotes CRCI (client rate control interface) flow control assignment. |
||
31 | +- #dma-cells: must be <1>. First cell denotes the channel number. |
||
32 | - clocks: Should contain the core clock and interface clock. |
||
33 | - clock-names: Must contain "core" for the core clock and "iface" for the |
||
34 | interface clock. |
||
35 | @@ -22,7 +21,7 @@ Example: |
||
36 | compatible = "qcom,adm"; |
||
37 | reg = <0x18300000 0x100000>; |
||
38 | interrupts = <0 170 0>; |
||
39 | - #dma-cells = <2>; |
||
40 | + #dma-cells = <1>; |
||
41 | |||
42 | clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; |
||
43 | clock-names = "core", "iface"; |
||
44 | @@ -35,15 +34,12 @@ Example: |
||
45 | qcom,ee = <0>; |
||
46 | }; |
||
47 | |||
48 | -DMA clients must use the format descripted in the dma.txt file, using a three |
||
49 | +DMA clients must use the format descripted in the dma.txt file, using a two |
||
50 | cell specifier for each channel. |
||
51 | |||
52 | -Each dmas request consists of 3 cells: |
||
53 | +Each dmas request consists of two cells: |
||
54 | 1. phandle pointing to the DMA controller |
||
55 | 2. channel number |
||
56 | - 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0. |
||
57 | - The CRCI is used for flow control. It identifies the peripheral device that |
||
58 | - is the source/destination for the transferred data. |
||
59 | |||
60 | Example: |
||
61 | |||
62 | @@ -55,7 +51,7 @@ Example: |
||
63 | |||
64 | cs-gpios = <&qcom_pinmux 20 0>; |
||
65 | |||
66 | - dmas = <&adm_dma 6 9>, |
||
67 | - <&adm_dma 5 10>; |
||
68 | + dmas = <&adm_dma 6>, |
||
69 | + <&adm_dma 5>; |
||
70 | dma-names = "rx", "tx"; |
||
71 | }; |