OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
2 | |||
3 | #include "qcom-ipq4019.dtsi" |
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4 | #include <dt-bindings/gpio/gpio.h> |
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5 | #include <dt-bindings/input/input.h> |
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6 | #include <dt-bindings/soc/qcom,tcsr.h> |
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7 | |||
8 | / { |
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9 | model = "ALFA Network AP120C-AC"; |
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10 | compatible = "alfa-network,ap120c-ac"; |
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11 | |||
12 | aliases { |
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13 | led-boot = &status; |
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14 | led-failsafe = &status; |
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15 | led-running = &status; |
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16 | led-upgrade = &status; |
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17 | }; |
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18 | |||
19 | keys { |
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20 | compatible = "gpio-keys"; |
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21 | |||
22 | reset { |
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23 | label = "reset"; |
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24 | gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; |
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25 | linux,code = <KEY_RESTART>; |
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26 | }; |
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27 | }; |
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28 | |||
29 | leds { |
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30 | compatible = "gpio-leds"; |
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31 | |||
32 | status: status { |
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33 | label = "ap120c-ac:blue:status"; |
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34 | gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; |
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35 | default-state = "keep"; |
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36 | }; |
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37 | |||
38 | wan { |
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39 | label = "ap120c-ac:amber:wan"; |
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40 | gpios = <&qca8075 19 GPIO_ACTIVE_HIGH>; |
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41 | }; |
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42 | |||
43 | wlan2g { |
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44 | label = "ap120c-ac:green:wlan2g"; |
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45 | gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; |
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46 | linux,default-trigger = "phy0tpt"; |
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47 | }; |
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48 | |||
49 | wlan5g { |
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50 | label = "ap120c-ac:red:wlan5g"; |
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51 | gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; |
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52 | linux,default-trigger = "phy1tpt"; |
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53 | }; |
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54 | }; |
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55 | |||
56 | soc { |
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57 | rng@22000 { |
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58 | status = "okay"; |
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59 | }; |
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60 | |||
61 | mdio@90000 { |
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62 | status = "okay"; |
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63 | |||
64 | pinctrl-0 = <&mdio_pins>; |
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65 | pinctrl-names = "default"; |
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66 | }; |
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67 | |||
68 | ess-psgmii@98000 { |
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69 | status = "okay"; |
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70 | }; |
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71 | |||
72 | counter@4a1000 { |
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73 | compatible = "qcom,qca-gcnt"; |
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74 | reg = <0x4a1000 0x4>; |
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75 | }; |
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76 | |||
77 | tcsr@1949000 { |
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78 | compatible = "qcom,tcsr"; |
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79 | reg = <0x1949000 0x100>; |
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80 | qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>; |
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81 | }; |
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82 | |||
83 | tcsr@194b000 { |
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84 | compatible = "qcom,tcsr"; |
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85 | reg = <0x194b000 0x100>; |
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86 | qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>; |
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87 | }; |
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88 | |||
89 | ess_tcsr@1953000 { |
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90 | compatible = "qcom,tcsr"; |
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91 | reg = <0x1953000 0x1000>; |
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92 | qcom,ess-interface-select = <TCSR_ESS_PSGMII>; |
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93 | }; |
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94 | |||
95 | tcsr@1957000 { |
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96 | compatible = "qcom,tcsr"; |
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97 | reg = <0x1957000 0x100>; |
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98 | qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>; |
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99 | }; |
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100 | |||
101 | usb2@60f8800 { |
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102 | status = "okay"; |
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103 | }; |
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104 | |||
105 | usb3@8af8800 { |
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106 | status = "okay"; |
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107 | |||
108 | dwc3@8a00000 { |
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109 | phys = <&usb3_hs_phy>; |
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110 | phy-names = "usb2-phy"; |
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111 | }; |
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112 | }; |
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113 | |||
114 | crypto@8e3a000 { |
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115 | status = "okay"; |
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116 | }; |
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117 | |||
118 | watchdog@b017000 { |
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119 | status = "okay"; |
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120 | }; |
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121 | |||
122 | qca8075: ess-switch@c000000 { |
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123 | status = "okay"; |
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124 | |||
125 | switch_lan_bmp = <0x10>; |
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126 | switch_wan_bmp = <0x20>; |
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127 | |||
128 | #gpio-cells = <2>; |
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129 | gpio-controller; |
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130 | }; |
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131 | |||
132 | edma@c080000 { |
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133 | status = "okay"; |
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134 | }; |
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135 | }; |
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136 | }; |
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137 | |||
138 | &blsp_dma { |
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139 | status = "okay"; |
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140 | }; |
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141 | |||
142 | &blsp1_i2c3 { |
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143 | status = "okay"; |
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144 | |||
145 | pinctrl-0 = <&i2c0_pins>; |
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146 | pinctrl-names = "default"; |
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147 | |||
148 | tpm@29 { |
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149 | compatible = "atmel,at97sc3204t"; |
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150 | reg = <0x29>; |
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151 | }; |
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152 | }; |
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153 | |||
154 | &blsp1_spi1 { |
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155 | status = "okay"; |
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156 | |||
157 | pinctrl-0 = <&spi0_pins>; |
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158 | pinctrl-names = "default"; |
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159 | cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, |
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160 | <&tlmm 4 GPIO_ACTIVE_HIGH>; |
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161 | |||
162 | flash@0 { |
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163 | compatible = "jedec,spi-nor"; |
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164 | reg = <0>; |
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165 | spi-max-frequency = <24000000>; |
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166 | |||
167 | partitions { |
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168 | compatible = "fixed-partitions"; |
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169 | #address-cells = <1>; |
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170 | #size-cells = <1>; |
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171 | |||
172 | partition@0 { |
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173 | label = "SBL1"; |
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174 | reg = <0x00000000 0x00040000>; |
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175 | read-only; |
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176 | }; |
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177 | |||
178 | partition@40000 { |
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179 | label = "MIBIB"; |
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180 | reg = <0x00040000 0x00020000>; |
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181 | read-only; |
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182 | }; |
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183 | |||
184 | partition@60000 { |
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185 | label = "QSEE"; |
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186 | reg = <0x00060000 0x00060000>; |
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187 | read-only; |
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188 | }; |
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189 | |||
190 | partition@c0000 { |
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191 | label = "CDT"; |
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192 | reg = <0x000c0000 0x00010000>; |
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193 | read-only; |
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194 | }; |
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195 | |||
196 | partition@d0000 { |
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197 | label = "DDRPARAMS"; |
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198 | reg = <0x000d0000 0x00010000>; |
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199 | read-only; |
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200 | }; |
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201 | |||
202 | partition@e0000 { |
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203 | label = "APPSBLENV"; |
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204 | reg = <0x000e0000 0x00010000>; |
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205 | }; |
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206 | |||
207 | partition@f0000 { |
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208 | label = "APPSBL"; |
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209 | reg = <0x000f0000 0x00080000>; |
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210 | read-only; |
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211 | }; |
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212 | |||
213 | partition@170000 { |
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214 | label = "ART"; |
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215 | reg = <0x00170000 0x00010000>; |
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216 | read-only; |
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217 | }; |
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218 | |||
219 | partition@180000 { |
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220 | label = "priv_data1"; |
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221 | reg = <0x00180000 0x00010000>; |
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222 | read-only; |
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223 | }; |
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224 | |||
225 | partition@190000 { |
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226 | label = "priv_data2"; |
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227 | reg = <0x00190000 0x00010000>; |
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228 | read-only; |
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229 | }; |
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230 | }; |
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231 | }; |
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232 | |||
233 | nand@1 { |
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234 | compatible = "spi-nand"; |
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235 | reg = <1>; |
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236 | spi-max-frequency = <24000000>; |
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237 | |||
238 | partitions { |
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239 | compatible = "fixed-partitions"; |
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240 | #address-cells = <1>; |
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241 | #size-cells = <1>; |
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242 | |||
243 | partition@0 { |
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244 | label = "rootfs1"; |
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245 | reg = <0x00000000 0x04000000>; |
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246 | }; |
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247 | |||
248 | partition@4000000 { |
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249 | label = "rootfs2"; |
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250 | reg = <0x04000000 0x04000000>; |
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251 | }; |
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252 | }; |
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253 | }; |
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254 | }; |
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255 | |||
256 | &blsp1_uart1 { |
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257 | status = "okay"; |
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258 | |||
259 | pinctrl-0 = <&serial0_pins>; |
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260 | pinctrl-names = "default"; |
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261 | }; |
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262 | |||
263 | &cryptobam { |
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264 | status = "okay"; |
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265 | }; |
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266 | |||
267 | &gmac0 { |
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268 | qcom,forced_duplex = <1>; |
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269 | qcom,forced_speed = <1000>; |
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270 | qcom,phy_mdio_addr = <3>; |
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271 | qcom,poll_required = <1>; |
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272 | vlan_tag = <1 0x10>; |
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273 | }; |
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274 | |||
275 | &gmac1 { |
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276 | qcom,forced_duplex = <1>; |
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277 | qcom,forced_speed = <1000>; |
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278 | qcom,phy_mdio_addr = <4>; |
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279 | qcom,poll_required = <1>; |
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280 | vlan_tag = <2 0x20>; |
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281 | }; |
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282 | |||
283 | &tlmm { |
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284 | i2c0_pins: i2c0_pinmux { |
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285 | mux_i2c { |
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286 | function = "blsp_i2c0"; |
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287 | pins = "gpio58", "gpio59"; |
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288 | drive-strength = <16>; |
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289 | bias-disable; |
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290 | }; |
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291 | }; |
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292 | |||
293 | mdio_pins: mdio_pinmux { |
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294 | mux_mdio { |
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295 | pins = "gpio53"; |
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296 | function = "mdio"; |
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297 | bias-pull-up; |
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298 | }; |
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299 | |||
300 | mux_mdc { |
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301 | pins = "gpio52"; |
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302 | function = "mdc"; |
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303 | bias-pull-up; |
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304 | }; |
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305 | }; |
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306 | |||
307 | serial0_pins: serial0_pinmux { |
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308 | mux_uart { |
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309 | pins = "gpio60", "gpio61"; |
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310 | function = "blsp_uart0"; |
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311 | bias-disable; |
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312 | }; |
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313 | }; |
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314 | |||
315 | spi0_pins: spi0_pinmux { |
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316 | mux_spi { |
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317 | function = "blsp_spi0"; |
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318 | pins = "gpio55", "gpio56", "gpio57"; |
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319 | drive-strength = <12>; |
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320 | bias-disable; |
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321 | }; |
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322 | |||
323 | mux_cs { |
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324 | function = "gpio"; |
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325 | pins = "gpio54", "gpio4"; |
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326 | drive-strength = <2>; |
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327 | bias-disable; |
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328 | output-high; |
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329 | }; |
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330 | }; |
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331 | }; |
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332 | |||
333 | &usb2_hs_phy { |
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334 | status = "okay"; |
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335 | }; |
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336 | |||
337 | &usb3_hs_phy { |
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338 | status = "okay"; |
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339 | }; |
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340 | |||
341 | &wifi0 { |
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342 | status = "okay"; |
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343 | }; |
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344 | |||
345 | &wifi1 { |
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346 | status = "okay"; |
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347 | }; |