OpenWrt – Blame information for rev 1
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
1 | office | 1 | From 203f17906ff45705fbdaa0430dbbc71142c2640f Mon Sep 17 00:00:00 2001 |
2 | From: Hauke Mehrtens <hauke@hauke-m.de> |
||
3 | Date: Sat, 8 Dec 2018 21:45:53 +0100 |
||
4 | Subject: [PATCH 1/3] MIPS: Compile post DMA flush only when needed |
||
5 | |||
6 | dma_sync_phys() is only called for some CPUs when a mapping is removed. |
||
7 | Add ARCH_HAS_SYNC_DMA_FOR_CPU only for the CPUs listed in |
||
8 | cpu_needs_post_dma_flush() which need this extra call and do not compile |
||
9 | this code in for other CPUs. We need this for R10000, R12000, BMIPS5000 |
||
10 | CPUs and CPUs supporting MAAR which was introduced in MIPS32r5. |
||
11 | |||
12 | This will hopefully improve the performance of the not affected devices. |
||
13 | |||
14 | Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> |
||
15 | --- |
||
16 | arch/mips/Kconfig | 6 +++++- |
||
17 | arch/mips/mm/dma-noncoherent.c | 2 ++ |
||
18 | 2 files changed, 7 insertions(+), 1 deletion(-) |
||
19 | |||
20 | --- a/arch/mips/Kconfig |
||
21 | +++ b/arch/mips/Kconfig |
||
22 | @@ -1116,7 +1116,6 @@ config DMA_PERDEV_COHERENT |
||
23 | config DMA_NONCOHERENT |
||
24 | bool |
||
25 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
||
26 | - select ARCH_HAS_SYNC_DMA_FOR_CPU |
||
27 | select NEED_DMA_MAP_STATE |
||
28 | select DMA_NONCOHERENT_MMAP |
||
29 | select DMA_NONCOHERENT_CACHE_SYNC |
||
30 | @@ -1897,9 +1896,11 @@ config SYS_HAS_CPU_MIPS32_R3_5 |
||
31 | |||
32 | config SYS_HAS_CPU_MIPS32_R5 |
||
33 | bool |
||
34 | + select ARCH_HAS_SYNC_DMA_FOR_CPU |
||
35 | |||
36 | config SYS_HAS_CPU_MIPS32_R6 |
||
37 | bool |
||
38 | + select ARCH_HAS_SYNC_DMA_FOR_CPU |
||
39 | |||
40 | config SYS_HAS_CPU_MIPS64_R1 |
||
41 | bool |
||
42 | @@ -1909,6 +1910,7 @@ config SYS_HAS_CPU_MIPS64_R2 |
||
43 | |||
44 | config SYS_HAS_CPU_MIPS64_R6 |
||
45 | bool |
||
46 | + select ARCH_HAS_SYNC_DMA_FOR_CPU |
||
47 | |||
48 | config SYS_HAS_CPU_R3000 |
||
49 | bool |
||
50 | @@ -1945,6 +1947,7 @@ config SYS_HAS_CPU_R8000 |
||
51 | |||
52 | config SYS_HAS_CPU_R10000 |
||
53 | bool |
||
54 | + select ARCH_HAS_SYNC_DMA_FOR_CPU |
||
55 | |||
56 | config SYS_HAS_CPU_RM7000 |
||
57 | bool |
||
58 | @@ -1973,6 +1976,7 @@ config SYS_HAS_CPU_BMIPS4380 |
||
59 | config SYS_HAS_CPU_BMIPS5000 |
||
60 | bool |
||
61 | select SYS_HAS_CPU_BMIPS |
||
62 | + select ARCH_HAS_SYNC_DMA_FOR_CPU |
||
63 | |||
64 | config SYS_HAS_CPU_XLR |
||
65 | bool |
||
66 | --- a/arch/mips/mm/dma-noncoherent.c |
||
67 | +++ b/arch/mips/mm/dma-noncoherent.c |
||
68 | @@ -191,12 +191,14 @@ void arch_sync_dma_for_device(struct dev |
||
69 | dma_sync_phys(paddr, size, dir); |
||
70 | } |
||
71 | |||
72 | +#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU |
||
73 | void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, |
||
74 | size_t size, enum dma_data_direction dir) |
||
75 | { |
||
76 | if (cpu_needs_post_dma_flush(dev)) |
||
77 | dma_sync_phys(paddr, size, dir); |
||
78 | } |
||
79 | +#endif |
||
80 | |||
81 | void arch_dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
||
82 | enum dma_data_direction direction) |