OpenWrt – Blame information for rev 1

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1 office 1 From 456ed3c197e8aec439ebeca39060c204d2429896 Mon Sep 17 00:00:00 2001
2 From: popcornmix <popcornmix@gmail.com>
3 Date: Sun, 12 May 2013 12:24:19 +0100
4 Subject: [PATCH 036/454] Main bcm2708/bcm2709 linux port
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8  
9 Signed-off-by: popcornmix <popcornmix@gmail.com>
10 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
11  
12 bcm2709: Drop platform smp and timer init code
13  
14 irq-bcm2836 handles this through these functions:
15 bcm2835_init_local_timer_frequency()
16 bcm2836_arm_irqchip_smp_init()
17  
18 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
19  
20 bcm270x: Use watchdog for reboot/poweroff
21  
22 The watchdog driver already has support for reboot/poweroff.
23 Make use of this and remove the code from the platform files.
24  
25 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
26 ---
27 arch/arm/mach-bcm/Kconfig | 1 +
28 arch/arm/mach-bcm/board_bcm2835.c | 9 +++++++++
29 arch/arm/mm/proc-v6.S | 15 ++++++++++++---
30 drivers/irqchip/irq-bcm2835.c | 7 ++++++-
31 drivers/mailbox/bcm2835-mailbox.c | 18 ++++++++++++++++--
32 5 files changed, 44 insertions(+), 6 deletions(-)
33  
34 --- a/arch/arm/mach-bcm/Kconfig
35 +++ b/arch/arm/mach-bcm/Kconfig
36 @@ -158,6 +158,7 @@ config ARCH_BCM2835
37 select FIQ
38 select PINCTRL
39 select PINCTRL_BCM2835
40 + select MFD_SYSCON if ARCH_MULTI_V7
41 help
42 This enables support for the Broadcom BCM2835 and BCM2836 SoCs.
43 This SoC is used in the Raspberry Pi and Roku 2 devices.
44 --- a/arch/arm/mach-bcm/board_bcm2835.c
45 +++ b/arch/arm/mach-bcm/board_bcm2835.c
46 @@ -21,6 +21,8 @@
47 #include <asm/mach/arch.h>
48 #include <asm/mach/map.h>
49  
50 +#include <linux/dma-mapping.h>
51 +
52 static void __init bcm2835_init(void)
53 {
54 struct device_node *np = of_find_node_by_path("/system");
55 @@ -35,6 +37,12 @@ static void __init bcm2835_init(void)
56 system_serial_low = val64;
57 }
58  
59 +static void __init bcm2835_init_early(void)
60 +{
61 + /* dwc_otg needs this for bounce buffers on non-aligned transfers */
62 + init_dma_coherent_pool_size(SZ_1M);
63 +}
64 +
65 static const char * const bcm2835_compat[] = {
66 #ifdef CONFIG_ARCH_MULTI_V6
67 "brcm,bcm2835",
68 @@ -47,5 +55,6 @@ static const char * const bcm2835_compat
69  
70 DT_MACHINE_START(BCM2835, "BCM2835")
71 .init_machine = bcm2835_init,
72 + .init_early = bcm2835_init_early,
73 .dt_compat = bcm2835_compat
74 MACHINE_END
75 --- a/arch/arm/mm/proc-v6.S
76 +++ b/arch/arm/mm/proc-v6.S
77 @@ -73,10 +73,19 @@ ENDPROC(cpu_v6_reset)
78 *
79 * IRQs are already disabled.
80 */
81 +
82 +/* See jira SW-5991 for details of this workaround */
83 ENTRY(cpu_v6_do_idle)
84 - mov r1, #0
85 - mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
86 - mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt
87 + .align 5
88 + mov r1, #2
89 +1: subs r1, #1
90 + nop
91 + mcreq p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
92 + mcreq p15, 0, r1, c7, c0, 4 @ wait for interrupt
93 + nop
94 + nop
95 + nop
96 + bne 1b
97 ret lr
98  
99 ENTRY(cpu_v6_dcache_clean_area)
100 --- a/drivers/irqchip/irq-bcm2835.c
101 +++ b/drivers/irqchip/irq-bcm2835.c
102 @@ -54,7 +54,9 @@
103 #include <linux/regmap.h>
104  
105 #include <asm/exception.h>
106 +#ifndef CONFIG_ARM64
107 #include <asm/mach/irq.h>
108 +#endif
109  
110 /* Put the bank and irq (32 bits) into the hwirq */
111 #define MAKE_HWIRQ(b, n) (((b) << 5) | (n))
112 @@ -82,6 +84,7 @@
113 #define NR_BANKS 3
114 #define IRQS_PER_BANK 32
115 #define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0)
116 +#undef FIQ_START
117 #define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0))
118  
119 static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
120 @@ -255,10 +258,12 @@ static int __init armctrl_of_init(struct
121 MAKE_HWIRQ(b, i) + NUMBER_IRQS);
122 BUG_ON(irq <= 0);
123 irq_set_chip(irq, &armctrl_chip);
124 - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
125 + irq_set_probe(irq);
126 }
127 }
128 +#ifndef CONFIG_ARM64
129 init_FIQ(FIQ_START);
130 +#endif
131  
132 return 0;
133 }
134 --- a/drivers/mailbox/bcm2835-mailbox.c
135 +++ b/drivers/mailbox/bcm2835-mailbox.c
136 @@ -51,12 +51,15 @@
137 #define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
138 #define MAIL1_STA (ARM_0_MAIL1 + 0x18)
139  
140 +/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
141 +#ifndef ARM_MS_FULL
142 /* Status register: FIFO state. */
143 #define ARM_MS_FULL BIT(31)
144 #define ARM_MS_EMPTY BIT(30)
145  
146 /* Configuration register: Enable interrupts. */
147 #define ARM_MC_IHAVEDATAIRQEN BIT(0)
148 +#endif
149  
150 struct bcm2835_mbox {
151 void __iomem *regs;
152 @@ -151,7 +154,7 @@ static int bcm2835_mbox_probe(struct pla
153 return -ENOMEM;
154 spin_lock_init(&mbox->lock);
155  
156 - ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
157 + ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
158 bcm2835_mbox_irq, 0, dev_name(dev), mbox);
159 if (ret) {
160 dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
161 @@ -209,7 +212,18 @@ static struct platform_driver bcm2835_mb
162 .probe = bcm2835_mbox_probe,
163 .remove = bcm2835_mbox_remove,
164 };
165 -module_platform_driver(bcm2835_mbox_driver);
166 +
167 +static int __init bcm2835_mbox_init(void)
168 +{
169 + return platform_driver_register(&bcm2835_mbox_driver);
170 +}
171 +arch_initcall(bcm2835_mbox_init);
172 +
173 +static void __init bcm2835_mbox_exit(void)
174 +{
175 + platform_driver_unregister(&bcm2835_mbox_driver);
176 +}
177 +module_exit(bcm2835_mbox_exit);
178  
179 MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
180 MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");