OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | --- a/arch/mips/ath79/common.c |
2 | +++ b/arch/mips/ath79/common.c |
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3 | @@ -34,11 +34,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq); |
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4 | |||
5 | enum ath79_soc_type ath79_soc; |
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6 | unsigned int ath79_soc_rev; |
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7 | +EXPORT_SYMBOL_GPL(ath79_soc_rev); |
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8 | |||
9 | void __iomem *ath79_pll_base; |
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10 | void __iomem *ath79_reset_base; |
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11 | EXPORT_SYMBOL_GPL(ath79_reset_base); |
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12 | -static void __iomem *ath79_ddr_base; |
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13 | +void __iomem *ath79_ddr_base; |
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14 | +EXPORT_SYMBOL_GPL(ath79_ddr_base); |
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15 | static void __iomem *ath79_ddr_wb_flush_base; |
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16 | static void __iomem *ath79_ddr_pci_win_base; |
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17 | |||
18 | --- a/arch/mips/include/asm/mach-ath79/ath79.h |
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19 | +++ b/arch/mips/include/asm/mach-ath79/ath79.h |
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20 | @@ -152,6 +152,7 @@ void ath79_ddr_wb_flush(unsigned int reg |
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21 | void ath79_ddr_set_pci_windows(void); |
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22 | |||
23 | extern void __iomem *ath79_pll_base; |
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24 | +extern void __iomem *ath79_ddr_base; |
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25 | extern void __iomem *ath79_reset_base; |
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26 | |||
27 | static inline void ath79_pll_wr(unsigned reg, u32 val) |