OpenWrt – Blame information for rev 1

Subversion Repositories:
Rev:
Rev Author Line No. Line
1 office 1 /*
2 * NAND flash driver for the MikroTik RouterBOARD 750
3 *
4 * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10  
11 #include <linux/version.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
15 #include <linux/mtd/nand.h>
16 #else
17 #include <linux/mtd/rawnand.h>
18 #endif
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/slab.h>
24  
25 #include <asm/mach-ath79/ar71xx_regs.h>
26 #include <asm/mach-ath79/ath79.h>
27 #include <asm/mach-ath79/mach-rb750.h>
28  
29 #define DRV_NAME "rb750-nand"
30 #define DRV_VERSION "0.1.0"
31 #define DRV_DESC "NAND flash driver for the RouterBOARD 750"
32  
33 #define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
34 #define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
35 #define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
36 #define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
37 #define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
38 #define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
39  
40 #define RB750_NAND_DATA_SHIFT 1
41 #define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
42 #define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
43 #define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
44 RB750_NAND_NRE | RB750_NAND_NWE)
45  
46 struct rb750_nand_info {
47 struct nand_chip chip;
48 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
49 struct mtd_info mtd;
50 #endif
51 struct rb7xx_nand_platform_data *pdata;
52 };
53  
54 static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd)
55 {
56 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
57 return container_of(mtd, struct rb750_nand_info, mtd);
58 #else
59 struct nand_chip *chip = mtd_to_nand(mtd);
60  
61 return container_of(chip, struct rb750_nand_info, chip);
62 #endif
63 }
64  
65 static struct mtd_info *rbinfo_to_mtd(struct rb750_nand_info *nfc)
66 {
67 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
68 return &nfc->mtd;
69 #else
70 return nand_to_mtd(&nfc->chip);
71 #endif
72 }
73  
74 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
75 /*
76 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
77 * will not be able to find the kernel that we load.
78 */
79 static struct nand_ecclayout rb750_nand_ecclayout = {
80 .eccbytes = 6,
81 .eccpos = { 8, 9, 10, 13, 14, 15 },
82 .oobavail = 9,
83 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
84 };
85  
86 #else
87  
88 static int rb750_ooblayout_ecc(struct mtd_info *mtd, int section,
89 struct mtd_oob_region *oobregion)
90 {
91 switch (section) {
92 case 0:
93 oobregion->offset = 8;
94 oobregion->length = 3;
95 return 0;
96 case 1:
97 oobregion->offset = 13;
98 oobregion->length = 3;
99 return 0;
100 default:
101 return -ERANGE;
102 }
103 }
104  
105 static int rb750_ooblayout_free(struct mtd_info *mtd, int section,
106 struct mtd_oob_region *oobregion)
107 {
108 switch (section) {
109 case 0:
110 oobregion->offset = 0;
111 oobregion->length = 4;
112 return 0;
113 case 1:
114 oobregion->offset = 4;
115 oobregion->length = 1;
116 return 0;
117 case 2:
118 oobregion->offset = 6;
119 oobregion->length = 2;
120 return 0;
121 case 3:
122 oobregion->offset = 11;
123 oobregion->length = 2;
124 return 0;
125 default:
126 return -ERANGE;
127 }
128 }
129  
130 static const struct mtd_ooblayout_ops rb750_nand_ecclayout_ops = {
131 .ecc = rb750_ooblayout_ecc,
132 .free = rb750_ooblayout_free,
133 };
134 #endif /* < 4.6 */
135  
136 static struct mtd_partition rb750_nand_partitions[] = {
137 {
138 .name = "booter",
139 .offset = 0,
140 .size = (256 * 1024),
141 .mask_flags = MTD_WRITEABLE,
142 }, {
143 .name = "kernel",
144 .offset = (256 * 1024),
145 .size = (4 * 1024 * 1024) - (256 * 1024),
146 }, {
147 .name = "ubi",
148 .offset = MTDPART_OFS_NXTBLK,
149 .size = MTDPART_SIZ_FULL,
150 },
151 };
152  
153 static void rb750_nand_write(const u8 *buf, unsigned len)
154 {
155 void __iomem *base = ath79_gpio_base;
156 u32 out;
157 u32 t;
158 unsigned i;
159  
160 /* set data lines to output mode */
161 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
162 __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
163  
164 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
165 out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE);
166 for (i = 0; i != len; i++) {
167 u32 data;
168  
169 data = buf[i];
170 data <<= RB750_NAND_DATA_SHIFT;
171 data |= out;
172 __raw_writel(data, base + AR71XX_GPIO_REG_OUT);
173  
174 __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT);
175 /* flush write */
176 __raw_readl(base + AR71XX_GPIO_REG_OUT);
177 }
178  
179 /* set data lines to input mode */
180 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
181 __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
182 /* flush write */
183 __raw_readl(base + AR71XX_GPIO_REG_OE);
184 }
185  
186 static void rb750_nand_read(u8 *read_buf, unsigned len)
187 {
188 void __iomem *base = ath79_gpio_base;
189 unsigned i;
190  
191 for (i = 0; i < len; i++) {
192 u8 data;
193  
194 /* activate RE line */
195 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR);
196 /* flush write */
197 __raw_readl(base + AR71XX_GPIO_REG_CLEAR);
198  
199 /* read input lines */
200 data = __raw_readl(base + AR71XX_GPIO_REG_IN) >>
201 RB750_NAND_DATA_SHIFT;
202  
203 /* deactivate RE line */
204 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET);
205  
206 read_buf[i] = data;
207 }
208 }
209  
210 static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
211 {
212 struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd);
213 void __iomem *base = ath79_gpio_base;
214 u32 t;
215  
216 if (chip >= 0) {
217 rbinfo->pdata->enable_pins();
218  
219 /* set input mode for data lines */
220 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
221 __raw_writel(t & ~RB750_NAND_INPUT_BITS,
222 base + AR71XX_GPIO_REG_OE);
223  
224 /* deactivate RE and WE lines */
225 __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE,
226 base + AR71XX_GPIO_REG_SET);
227 /* flush write */
228 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
229  
230 /* activate CE line */
231 __raw_writel(rbinfo->pdata->nce_line,
232 base + AR71XX_GPIO_REG_CLEAR);
233 } else {
234 /* deactivate CE line */
235 __raw_writel(rbinfo->pdata->nce_line,
236 base + AR71XX_GPIO_REG_SET);
237 /* flush write */
238 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
239  
240 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
241 __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
242 base + AR71XX_GPIO_REG_OE);
243  
244 rbinfo->pdata->disable_pins();
245 }
246 }
247  
248 static int rb750_nand_dev_ready(struct mtd_info *mtd)
249 {
250 void __iomem *base = ath79_gpio_base;
251  
252 return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
253 }
254  
255 static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
256 unsigned int ctrl)
257 {
258 if (ctrl & NAND_CTRL_CHANGE) {
259 void __iomem *base = ath79_gpio_base;
260 u32 t;
261  
262 t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
263  
264 t &= ~(RB750_NAND_CLE | RB750_NAND_ALE);
265 t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0;
266 t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0;
267  
268 __raw_writel(t, base + AR71XX_GPIO_REG_OUT);
269 /* flush write */
270 __raw_readl(base + AR71XX_GPIO_REG_OUT);
271 }
272  
273 if (cmd != NAND_CMD_NONE) {
274 u8 t = cmd;
275 rb750_nand_write(&t, 1);
276 }
277 }
278  
279 static u8 rb750_nand_read_byte(struct mtd_info *mtd)
280 {
281 u8 data = 0;
282 rb750_nand_read(&data, 1);
283 return data;
284 }
285  
286 static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
287 {
288 rb750_nand_read(buf, len);
289 }
290  
291 static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
292 {
293 rb750_nand_write(buf, len);
294 }
295  
296 static void __init rb750_nand_gpio_init(struct rb750_nand_info *info)
297 {
298 void __iomem *base = ath79_gpio_base;
299 u32 out;
300 u32 t;
301  
302 out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
303  
304 /* setup output levels */
305 __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE,
306 base + AR71XX_GPIO_REG_SET);
307  
308 __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE,
309 base + AR71XX_GPIO_REG_CLEAR);
310  
311 /* setup input lines */
312 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
313 __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE);
314  
315 /* setup output lines */
316 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
317 t |= RB750_NAND_OUTPUT_BITS;
318 t |= info->pdata->nce_line;
319 __raw_writel(t, base + AR71XX_GPIO_REG_OE);
320  
321 info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
322 }
323  
324 static int rb750_nand_probe(struct platform_device *pdev)
325 {
326 struct rb750_nand_info *info;
327 struct rb7xx_nand_platform_data *pdata;
328 struct mtd_info *mtd;
329 int ret;
330  
331 printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
332  
333 pdata = pdev->dev.platform_data;
334 if (!pdata)
335 return -EINVAL;
336  
337 info = kzalloc(sizeof(*info), GFP_KERNEL);
338 if (!info)
339 return -ENOMEM;
340  
341 info->chip.priv = &info;
342  
343 mtd = rbinfo_to_mtd(info);
344 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
345 mtd->priv = &info->chip;
346 #endif
347 mtd->owner = THIS_MODULE;
348  
349 info->chip.select_chip = rb750_nand_select_chip;
350 info->chip.cmd_ctrl = rb750_nand_cmd_ctrl;
351 info->chip.dev_ready = rb750_nand_dev_ready;
352 info->chip.read_byte = rb750_nand_read_byte;
353 info->chip.write_buf = rb750_nand_write_buf;
354 info->chip.read_buf = rb750_nand_read_buf;
355  
356 info->chip.chip_delay = 25;
357 info->chip.ecc.mode = NAND_ECC_SOFT;
358 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
359 info->chip.ecc.algo = NAND_ECC_HAMMING;
360 #endif
361 info->chip.options = NAND_NO_SUBPAGE_WRITE;
362  
363 info->pdata = pdata;
364  
365 platform_set_drvdata(pdev, info);
366  
367 rb750_nand_gpio_init(info);
368  
369 ret = nand_scan_ident(mtd, 1, NULL);
370 if (ret) {
371 ret = -ENXIO;
372 goto err_free_info;
373 }
374  
375 if (mtd->writesize == 512)
376 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
377 info->chip.ecc.layout = &rb750_nand_ecclayout;
378 #else
379 mtd_set_ooblayout(mtd, &rb750_nand_ecclayout_ops);
380 #endif
381  
382 ret = nand_scan_tail(mtd);
383 if (ret) {
384 return -ENXIO;
385 goto err_set_drvdata;
386 }
387  
388 ret = mtd_device_register(mtd, rb750_nand_partitions,
389 ARRAY_SIZE(rb750_nand_partitions));
390 if (ret)
391 goto err_release_nand;
392  
393 return 0;
394  
395 err_release_nand:
396 nand_release(mtd);
397 err_set_drvdata:
398 platform_set_drvdata(pdev, NULL);
399 err_free_info:
400 kfree(info);
401 return ret;
402 }
403  
404 static int rb750_nand_remove(struct platform_device *pdev)
405 {
406 struct rb750_nand_info *info = platform_get_drvdata(pdev);
407  
408 nand_release(rbinfo_to_mtd(info));
409 platform_set_drvdata(pdev, NULL);
410 kfree(info);
411  
412 return 0;
413 }
414  
415 static struct platform_driver rb750_nand_driver = {
416 .probe = rb750_nand_probe,
417 .remove = rb750_nand_remove,
418 .driver = {
419 .name = DRV_NAME,
420 .owner = THIS_MODULE,
421 },
422 };
423  
424 static int __init rb750_nand_init(void)
425 {
426 return platform_driver_register(&rb750_nand_driver);
427 }
428  
429 static void __exit rb750_nand_exit(void)
430 {
431 platform_driver_unregister(&rb750_nand_driver);
432 }
433  
434 module_init(rb750_nand_init);
435 module_exit(rb750_nand_exit);
436  
437 MODULE_DESCRIPTION(DRV_DESC);
438 MODULE_VERSION(DRV_VERSION);
439 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
440 MODULE_LICENSE("GPL v2");