OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Linksys WRT160NL board support |
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3 | * |
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4 | * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License version 2 as published |
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8 | * by the Free Software Foundation. |
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9 | */ |
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10 | |||
11 | #include <asm/mach-ath79/ath79.h> |
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12 | |||
13 | #include "dev-eth.h" |
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14 | #include "dev-gpio-buttons.h" |
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15 | #include "dev-leds-gpio.h" |
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16 | #include "dev-m25p80.h" |
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17 | #include "dev-usb.h" |
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18 | #include "dev-wmac.h" |
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19 | #include "nvram.h" |
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20 | #include "machtypes.h" |
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21 | |||
22 | #define WRT160NL_GPIO_LED_POWER 14 |
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23 | #define WRT160NL_GPIO_LED_WPS_AMBER 9 |
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24 | #define WRT160NL_GPIO_LED_WPS_BLUE 8 |
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25 | #define WRT160NL_GPIO_LED_WLAN 6 |
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26 | |||
27 | #define WRT160NL_GPIO_BTN_WPS 7 |
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28 | #define WRT160NL_GPIO_BTN_RESET 21 |
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29 | |||
30 | #define WRT160NL_KEYS_POLL_INTERVAL 20 /* msecs */ |
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31 | #define WRT160NL_KEYS_DEBOUNCE_INTERVAL (3 * WRT160NL_KEYS_POLL_INTERVAL) |
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32 | |||
33 | #define WRT160NL_NVRAM_ADDR 0x1f7e0000 |
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34 | #define WRT160NL_NVRAM_SIZE 0x10000 |
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35 | |||
36 | static const char *wrt160nl_part_probes[] = { |
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37 | "cybertan", |
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38 | NULL, |
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39 | }; |
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40 | |||
41 | static struct flash_platform_data wrt160nl_flash_data = { |
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42 | .part_probes = wrt160nl_part_probes, |
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43 | }; |
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44 | |||
45 | static struct gpio_led wrt160nl_leds_gpio[] __initdata = { |
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46 | { |
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47 | .name = "wrt160nl:blue:power", |
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48 | .gpio = WRT160NL_GPIO_LED_POWER, |
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49 | .active_low = 1, |
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50 | .default_trigger = "default-on", |
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51 | }, { |
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52 | .name = "wrt160nl:amber:wps", |
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53 | .gpio = WRT160NL_GPIO_LED_WPS_AMBER, |
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54 | .active_low = 1, |
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55 | }, { |
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56 | .name = "wrt160nl:blue:wps", |
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57 | .gpio = WRT160NL_GPIO_LED_WPS_BLUE, |
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58 | .active_low = 1, |
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59 | }, { |
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60 | .name = "wrt160nl:blue:wlan", |
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61 | .gpio = WRT160NL_GPIO_LED_WLAN, |
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62 | .active_low = 1, |
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63 | } |
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64 | }; |
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65 | |||
66 | static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = { |
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67 | { |
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68 | .desc = "reset", |
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69 | .type = EV_KEY, |
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70 | .code = KEY_RESTART, |
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71 | .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, |
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72 | .gpio = WRT160NL_GPIO_BTN_RESET, |
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73 | .active_low = 1, |
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74 | }, { |
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75 | .desc = "wps", |
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76 | .type = EV_KEY, |
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77 | .code = KEY_WPS_BUTTON, |
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78 | .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, |
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79 | .gpio = WRT160NL_GPIO_BTN_WPS, |
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80 | .active_low = 1, |
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81 | } |
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82 | }; |
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83 | |||
84 | static void __init wrt160nl_setup(void) |
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85 | { |
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86 | const char *nvram = (char *) KSEG1ADDR(WRT160NL_NVRAM_ADDR); |
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87 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
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88 | u8 mac[6]; |
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89 | |||
90 | if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, |
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91 | "lan_hwaddr=", mac) == 0) { |
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92 | ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); |
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93 | ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); |
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94 | } |
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95 | |||
96 | ath79_register_mdio(0, 0x0); |
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97 | |||
98 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
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99 | ath79_eth0_data.phy_mask = 0x01; |
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100 | |||
101 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
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102 | ath79_eth1_data.phy_mask = 0x10; |
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103 | |||
104 | ath79_register_eth(0); |
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105 | ath79_register_eth(1); |
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106 | |||
107 | ath79_register_m25p80(&wrt160nl_flash_data); |
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108 | |||
109 | ath79_register_usb(); |
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110 | |||
111 | if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, |
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112 | "wl0_hwaddr=", mac) == 0) |
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113 | ath79_register_wmac(eeprom, mac); |
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114 | else |
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115 | ath79_register_wmac(eeprom, NULL); |
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116 | |||
117 | ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio), |
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118 | wrt160nl_leds_gpio); |
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119 | |||
120 | ath79_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL, |
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121 | ARRAY_SIZE(wrt160nl_gpio_keys), |
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122 | wrt160nl_gpio_keys); |
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123 | } |
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124 | |||
125 | MIPS_MACHINE(ATH79_MACH_WRT160NL, "WRT160NL", "Linksys WRT160NL", |
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126 | wrt160nl_setup); |