OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * TP-LINK TL-WDR4300 board support |
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3 | * |
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4 | * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * This program is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU General Public License version 2 as published |
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8 | * by the Free Software Foundation. |
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9 | */ |
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10 | |||
11 | #include <linux/pci.h> |
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12 | #include <linux/phy.h> |
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13 | #include <linux/gpio.h> |
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14 | #include <linux/platform_device.h> |
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15 | #include <linux/ath9k_platform.h> |
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16 | #include <linux/ar8216_platform.h> |
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17 | |||
18 | #include <asm/mach-ath79/ar71xx_regs.h> |
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19 | |||
20 | #include "common.h" |
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21 | #include "dev-ap9x-pci.h" |
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22 | #include "dev-eth.h" |
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23 | #include "dev-gpio-buttons.h" |
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24 | #include "dev-leds-gpio.h" |
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25 | #include "dev-m25p80.h" |
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26 | #include "dev-spi.h" |
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27 | #include "dev-usb.h" |
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28 | #include "dev-wmac.h" |
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29 | #include "machtypes.h" |
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30 | |||
31 | #define WDR4300_GPIO_LED_USB1 11 |
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32 | #define WDR4300_GPIO_LED_USB2 12 |
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33 | #define WDR4300_GPIO_LED_WLAN2G 13 |
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34 | #define WDR4300_GPIO_LED_SYSTEM 14 |
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35 | #define WDR4300_GPIO_LED_QSS 15 |
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36 | |||
37 | #define WDR4300_GPIO_BTN_WPS 16 |
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38 | #define WDR4300_GPIO_BTN_RFKILL 17 |
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39 | |||
40 | #define WDR4300_GPIO_EXTERNAL_LNA0 18 |
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41 | #define WDR4300_GPIO_EXTERNAL_LNA1 19 |
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42 | |||
43 | #define WDR4300_GPIO_USB1_POWER 22 |
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44 | #define WDR4300_GPIO_USB2_POWER 21 |
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45 | |||
46 | #define WDR4300_KEYS_POLL_INTERVAL 20 /* msecs */ |
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47 | #define WDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WDR4300_KEYS_POLL_INTERVAL) |
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48 | |||
49 | #define WDR4300_MAC0_OFFSET 0 |
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50 | #define WDR4300_MAC1_OFFSET 6 |
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51 | #define WDR4300_WMAC_CALDATA_OFFSET 0x1000 |
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52 | #define WDR4300_PCIE_CALDATA_OFFSET 0x5000 |
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53 | |||
54 | static const char *wdr4300_part_probes[] = { |
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55 | "tp-link", |
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56 | NULL, |
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57 | }; |
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58 | |||
59 | static struct flash_platform_data wdr4300_flash_data = { |
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60 | .part_probes = wdr4300_part_probes, |
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61 | }; |
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62 | |||
63 | static struct gpio_led wdr4300_leds_gpio[] __initdata = { |
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64 | { |
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65 | .name = "tp-link:blue:qss", |
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66 | .gpio = WDR4300_GPIO_LED_QSS, |
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67 | .active_low = 1, |
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68 | }, |
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69 | { |
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70 | .name = "tp-link:blue:system", |
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71 | .gpio = WDR4300_GPIO_LED_SYSTEM, |
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72 | .active_low = 1, |
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73 | }, |
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74 | { |
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75 | .name = "tp-link:green:usb1", |
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76 | .gpio = WDR4300_GPIO_LED_USB1, |
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77 | .active_low = 1, |
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78 | }, |
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79 | { |
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80 | .name = "tp-link:green:usb2", |
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81 | .gpio = WDR4300_GPIO_LED_USB2, |
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82 | .active_low = 1, |
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83 | }, |
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84 | { |
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85 | .name = "tp-link:blue:wlan2g", |
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86 | .gpio = WDR4300_GPIO_LED_WLAN2G, |
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87 | .active_low = 1, |
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88 | }, |
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89 | }; |
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90 | |||
91 | static struct gpio_keys_button wdr4300_gpio_keys[] __initdata = { |
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92 | { |
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93 | .desc = "QSS button", |
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94 | .type = EV_KEY, |
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95 | .code = KEY_WPS_BUTTON, |
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96 | .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, |
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97 | .gpio = WDR4300_GPIO_BTN_WPS, |
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98 | .active_low = 1, |
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99 | }, |
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100 | { |
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101 | .desc = "RFKILL switch", |
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102 | .type = EV_SW, |
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103 | .code = KEY_RFKILL, |
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104 | .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, |
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105 | .gpio = WDR4300_GPIO_BTN_RFKILL, |
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106 | .active_low = 1, |
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107 | }, |
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108 | }; |
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109 | |||
110 | static const struct ar8327_led_info wdr4300_leds_ar8327[] = { |
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111 | AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), |
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112 | AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), |
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113 | AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), |
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114 | AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"), |
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115 | AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"), |
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116 | }; |
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117 | |||
118 | static struct ar8327_pad_cfg wdr4300_ar8327_pad0_cfg = { |
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119 | .mode = AR8327_PAD_MAC_RGMII, |
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120 | .txclk_delay_en = true, |
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121 | .rxclk_delay_en = true, |
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122 | .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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123 | .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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124 | }; |
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125 | |||
126 | static struct ar8327_led_cfg wdr4300_ar8327_led_cfg = { |
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127 | .led_ctrl0 = 0xc737c737, |
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128 | .led_ctrl1 = 0x00000000, |
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129 | .led_ctrl2 = 0x00000000, |
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130 | .led_ctrl3 = 0x0030c300, |
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131 | .open_drain = false, |
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132 | }; |
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133 | |||
134 | static struct ar8327_platform_data wdr4300_ar8327_data = { |
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135 | .pad0_cfg = &wdr4300_ar8327_pad0_cfg, |
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136 | .port0_cfg = { |
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137 | .force_link = 1, |
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138 | .speed = AR8327_PORT_SPEED_1000, |
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139 | .duplex = 1, |
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140 | .txpause = 1, |
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141 | .rxpause = 1, |
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142 | }, |
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143 | .led_cfg = &wdr4300_ar8327_led_cfg, |
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144 | .num_leds = ARRAY_SIZE(wdr4300_leds_ar8327), |
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145 | .leds = wdr4300_leds_ar8327, |
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146 | }; |
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147 | |||
148 | static struct mdio_board_info wdr4300_mdio0_info[] = { |
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149 | { |
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150 | .bus_id = "ag71xx-mdio.0", |
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151 | .mdio_addr = 0, |
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152 | .platform_data = &wdr4300_ar8327_data, |
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153 | }, |
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154 | }; |
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155 | |||
156 | static void __init wdr4300_setup(void) |
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157 | { |
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158 | u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); |
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159 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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160 | u8 tmpmac[ETH_ALEN]; |
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161 | |||
162 | ath79_register_m25p80(&wdr4300_flash_data); |
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163 | ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio), |
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164 | wdr4300_leds_gpio); |
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165 | ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL, |
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166 | ARRAY_SIZE(wdr4300_gpio_keys), |
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167 | wdr4300_gpio_keys); |
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168 | |||
169 | ath79_wmac_set_ext_lna_gpio(0, WDR4300_GPIO_EXTERNAL_LNA0); |
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170 | ath79_wmac_set_ext_lna_gpio(1, WDR4300_GPIO_EXTERNAL_LNA1); |
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171 | |||
172 | ath79_init_mac(tmpmac, mac, -1); |
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173 | ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac); |
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174 | |||
175 | ath79_init_mac(tmpmac, mac, 0); |
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176 | ap9x_pci_setup_wmac_led_pin(0, 0); |
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177 | ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac); |
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178 | |||
179 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); |
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180 | |||
181 | mdiobus_register_board_info(wdr4300_mdio0_info, |
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182 | ARRAY_SIZE(wdr4300_mdio0_info)); |
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183 | |||
184 | ath79_register_mdio(0, 0x0); |
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185 | |||
186 | ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2); |
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187 | |||
188 | /* GMAC0 is connected to an AR8327N switch */ |
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189 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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190 | ath79_eth0_data.phy_mask = BIT(0); |
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191 | ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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192 | ath79_eth0_pll_data.pll_1000 = 0x06000000; |
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193 | ath79_register_eth(0); |
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194 | |||
195 | gpio_request_one(WDR4300_GPIO_USB1_POWER, |
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196 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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197 | "USB1 power"); |
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198 | gpio_request_one(WDR4300_GPIO_USB2_POWER, |
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199 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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200 | "USB2 power"); |
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201 | ath79_register_usb(); |
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202 | } |
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203 | |||
204 | MIPS_MACHINE(ATH79_MACH_TL_WDR4300, "TL-WDR4300", |
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205 | "TP-LINK TL-WDR3600/4300/4310", |
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206 | wdr4300_setup); |