OpenWrt – Blame information for rev 1

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1 office 1 /*
2 * MikroTik RouterBOARD 95X support
3 *
4 * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
5 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2013 Kamil Trzcinski <ayufan@ayufan.eu>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12  
13 #define pr_fmt(fmt) "rb95x: " fmt
14  
15 #include <linux/version.h>
16 #include <linux/phy.h>
17 #include <linux/delay.h>
18 #include <linux/platform_device.h>
19 #include <linux/ath9k_platform.h>
20 #include <linux/ar8216_platform.h>
21 #include <linux/mtd/mtd.h>
22 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
23 #include <linux/mtd/nand.h>
24 #else
25 #include <linux/mtd/rawnand.h>
26 #endif
27 #include <linux/mtd/partitions.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/flash.h>
30 #include <linux/routerboot.h>
31 #include <linux/gpio.h>
32 #include <linux/version.h>
33  
34 #include <asm/mach-ath79/ath79.h>
35 #include <asm/mach-ath79/ar71xx_regs.h>
36  
37 #include "common.h"
38 #include "dev-eth.h"
39 #include "dev-m25p80.h"
40 #include "dev-nfc.h"
41 #include "dev-usb.h"
42 #include "dev-wmac.h"
43 #include "machtypes.h"
44 #include "routerboot.h"
45 #include "dev-leds-gpio.h"
46  
47 #define RB95X_GPIO_NAND_NCE 14
48  
49 static struct mtd_partition rb95x_nand_partitions[] = {
50 {
51 .name = "booter",
52 .offset = 0,
53 .size = (256 * 1024),
54 .mask_flags = MTD_WRITEABLE,
55 },
56 {
57 .name = "kernel",
58 .offset = (256 * 1024),
59 .size = (4 * 1024 * 1024) - (256 * 1024),
60 },
61 {
62 .name = "ubi",
63 .offset = MTDPART_OFS_NXTBLK,
64 .size = MTDPART_SIZ_FULL,
65 },
66 };
67  
68 static struct gpio_led rb951ui_leds_gpio[] __initdata = {
69 {
70 .name = "rb:green:wlan",
71 .gpio = 11,
72 .active_low = 1,
73 }, {
74 .name = "rb:green:act",
75 .gpio = 3,
76 .active_low = 1,
77 }, {
78 .name = "rb:green:port1",
79 .gpio = 13,
80 .active_low = 1,
81 }, {
82 .name = "rb:green:port2",
83 .gpio = 12,
84 .active_low = 1,
85 }, {
86 .name = "rb:green:port3",
87 .gpio = 4,
88 .active_low = 1,
89 }, {
90 .name = "rb:green:port4",
91 .gpio = 21,
92 .active_low = 1,
93 }, {
94 .name = "rb:green:port5",
95 .gpio = 16,
96 .active_low = 1,
97 }
98 };
99  
100 static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = {
101 .mode = AR8327_PAD_MAC_RGMII,
102 .txclk_delay_en = true,
103 .rxclk_delay_en = true,
104 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
105 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
106 };
107  
108 static struct ar8327_platform_data rb95x_ar8327_data = {
109 .pad0_cfg = &rb95x_ar8327_pad0_cfg,
110 .port0_cfg = {
111 .force_link = 1,
112 .speed = AR8327_PORT_SPEED_1000,
113 .duplex = 1,
114 .txpause = 1,
115 .rxpause = 1,
116 }
117 };
118  
119 static struct mdio_board_info rb95x_mdio0_info[] = {
120 {
121 .bus_id = "ag71xx-mdio.0",
122 .mdio_addr = 0,
123 .platform_data = &rb95x_ar8327_data,
124 },
125 };
126  
127 void __init rb95x_wlan_init(void)
128 {
129 char *art_buf;
130 u8 wlan_mac[ETH_ALEN];
131  
132 art_buf = rb_get_wlan_data();
133 if (art_buf == NULL)
134 return;
135  
136 ath79_init_mac(wlan_mac, ath79_mac_base, 11);
137 ath79_register_wmac(art_buf + 0x1000, wlan_mac);
138  
139 kfree(art_buf);
140 }
141  
142 static void rb95x_nand_select_chip(int chip_no)
143 {
144 switch (chip_no) {
145 case 0:
146 gpio_set_value(RB95X_GPIO_NAND_NCE, 0);
147 break;
148 default:
149 gpio_set_value(RB95X_GPIO_NAND_NCE, 1);
150 break;
151 }
152 ndelay(500);
153 }
154  
155 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
156 static struct nand_ecclayout rb95x_nand_ecclayout = {
157 .eccbytes = 6,
158 .eccpos = { 8, 9, 10, 13, 14, 15 },
159 .oobavail = 9,
160 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
161 };
162  
163 #else
164  
165 static int rb95x_ooblayout_ecc(struct mtd_info *mtd, int section,
166 struct mtd_oob_region *oobregion)
167 {
168 switch (section) {
169 case 0:
170 oobregion->offset = 8;
171 oobregion->length = 3;
172 return 0;
173 case 1:
174 oobregion->offset = 13;
175 oobregion->length = 3;
176 return 0;
177 default:
178 return -ERANGE;
179 }
180 }
181  
182 static int rb95x_ooblayout_free(struct mtd_info *mtd, int section,
183 struct mtd_oob_region *oobregion)
184 {
185 switch (section) {
186 case 0:
187 oobregion->offset = 0;
188 oobregion->length = 4;
189 return 0;
190 case 1:
191 oobregion->offset = 4;
192 oobregion->length = 1;
193 return 0;
194 case 2:
195 oobregion->offset = 6;
196 oobregion->length = 2;
197 return 0;
198 case 3:
199 oobregion->offset = 11;
200 oobregion->length = 2;
201 return 0;
202 default:
203 return -ERANGE;
204 }
205 }
206  
207 static const struct mtd_ooblayout_ops rb95x_nand_ecclayout_ops = {
208 .ecc = rb95x_ooblayout_ecc,
209 .free = rb95x_ooblayout_free,
210 };
211 #endif /* < 4.6 */
212  
213 static int rb95x_nand_scan_fixup(struct mtd_info *mtd)
214 {
215 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
216 struct nand_chip *chip = mtd->priv;
217 #else
218 struct nand_chip *chip = mtd_to_nand(mtd);
219 #endif /* < 4.6.0 */
220  
221 if (mtd->writesize == 512) {
222 /*
223 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
224 * will not be able to find the kernel that we load.
225 */
226 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
227 chip->ecc.layout = &rb95x_nand_ecclayout;
228 #else
229 mtd_set_ooblayout(mtd, &rb95x_nand_ecclayout_ops);
230 #endif
231 }
232  
233 chip->options = NAND_NO_SUBPAGE_WRITE;
234  
235 return 0;
236 }
237  
238 void __init rb95x_nand_init(void)
239 {
240 gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
241  
242 ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup);
243 ath79_nfc_set_parts(rb95x_nand_partitions,
244 ARRAY_SIZE(rb95x_nand_partitions));
245 ath79_nfc_set_select_chip(rb95x_nand_select_chip);
246 ath79_nfc_set_swap_dma(true);
247 ath79_register_nfc();
248 }
249  
250 static int __init rb95x_setup(void)
251 {
252 const struct rb_info *info;
253  
254 info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000);
255 if (!info)
256 return -EINVAL;
257  
258 rb95x_nand_init();
259  
260 return 0;
261 }
262  
263 static void __init rb951g_setup(void)
264 {
265 if (rb95x_setup())
266 return;
267  
268 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
269 AR934X_ETH_CFG_SW_ONLY_MODE);
270  
271 ath79_register_mdio(0, 0x0);
272  
273 mdiobus_register_board_info(rb95x_mdio0_info,
274 ARRAY_SIZE(rb95x_mdio0_info));
275  
276 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
277 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
278 ath79_eth0_data.phy_mask = BIT(0);
279  
280 ath79_register_eth(0);
281  
282 rb95x_wlan_init();
283 ath79_register_usb();
284 }
285  
286 MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD",
287 rb951g_setup);
288  
289 static void __init rb951ui_setup(void)
290 {
291 if (rb95x_setup())
292 return;
293  
294 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
295  
296 ath79_register_mdio(1, 0x0);
297  
298 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
299 ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
300  
301 ath79_switch_data.phy4_mii_en = 1;
302 ath79_switch_data.phy_poll_mask = BIT(4);
303 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
304 ath79_eth0_data.phy_mask = BIT(4);
305 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
306 ath79_register_eth(0);
307  
308 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
309 ath79_register_eth(1);
310  
311 gpio_request_one(20, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
312 "USB power");
313  
314 gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
315 "POE power");
316  
317 rb95x_wlan_init();
318 ath79_register_usb();
319  
320 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb951ui_leds_gpio),
321 rb951ui_leds_gpio);
322 }
323  
324 MIPS_MACHINE(ATH79_MACH_RB_951U, "951HnD", "MikroTik RouterBOARD 951Ui-2HnD",
325 rb951ui_setup);