OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * ADM8668 minimal clock support |
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3 | * |
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4 | * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org> |
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5 | * |
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6 | * Licensed under the terms of the GPLv2 |
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7 | */ |
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8 | |||
9 | #include <linux/kernel.h> |
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10 | #include <linux/module.h> |
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11 | #include <linux/device.h> |
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12 | #include <linux/err.h> |
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13 | #include <linux/clk.h> |
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14 | |||
15 | #include <adm8668.h> |
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16 | |||
17 | struct clk { |
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18 | unsigned long rate; |
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19 | }; |
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20 | |||
21 | static struct clk uart_clk = { |
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22 | .rate = 62500000, |
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23 | }; |
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24 | |||
25 | static struct clk sys_clk; |
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26 | |||
27 | struct clk *clk_get(struct device *dev, const char *id) |
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28 | { |
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29 | const char *lookup = id; |
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30 | |||
31 | if (dev) |
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32 | lookup = dev_name(dev); |
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33 | |||
34 | if (!strcmp(lookup, "apb:uart0")) |
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35 | return &uart_clk; |
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36 | if (!strcmp(lookup, "sys")) |
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37 | return &sys_clk; |
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38 | |||
39 | return ERR_PTR(-ENOENT); |
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40 | } |
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41 | EXPORT_SYMBOL(clk_get); |
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42 | |||
43 | int clk_enable(struct clk *clk) |
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44 | { |
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45 | return 0; |
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46 | } |
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47 | EXPORT_SYMBOL(clk_enable); |
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48 | |||
49 | void clk_disable(struct clk *clk) |
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50 | { |
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51 | } |
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52 | EXPORT_SYMBOL(clk_disable); |
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53 | |||
54 | unsigned long clk_get_rate(struct clk *clk) |
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55 | { |
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56 | return clk->rate; |
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57 | } |
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58 | EXPORT_SYMBOL(clk_get_rate); |
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59 | |||
60 | void clk_put(struct clk *clk) |
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61 | { |
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62 | } |
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63 | EXPORT_SYMBOL(clk_put); |
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64 | |||
65 | void __init adm8668_init_clocks(void) |
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66 | { |
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67 | u32 adj; |
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68 | |||
69 | /* adjustable clock selection |
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70 | * CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc... |
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71 | */ |
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72 | adj = (ADM8668_CONFIG_REG(ADM8668_CR3) >> 11) & 0xf; |
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73 | sys_clk.rate = 175000000 + (adj * 5000000); |
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74 | |||
75 | pr_info("ADM8668 CPU clock: %lu MHz\n", sys_clk.rate / 1000000); |
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76 | } |