OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | /* |
2 | * Mikrotik RouterBOARD 1xx series support |
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3 | * |
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4 | * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org> |
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5 | * |
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6 | * NAND initialization code was based on a driver for Linux 2.6.19+ which |
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7 | * was derived from the driver for Linux 2.4.xx published by Mikrotik for |
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8 | * their RouterBoard 1xx and 5xx series boards. |
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9 | * Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk> |
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10 | * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org> |
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11 | * |
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12 | * This program is free software; you can redistribute it and/or modify it |
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13 | * under the terms of the GNU General Public License version 2 as published |
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14 | * by the Free Software Foundation. |
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15 | * |
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16 | */ |
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17 | |||
18 | #include "rb-1xx.h" |
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19 | |||
20 | #define RB1XX_NAND_CHIP_DELAY 25 |
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21 | |||
22 | #define RB1XX_KEYS_POLL_INTERVAL 20 |
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23 | #define RB1XX_KEYS_DEBOUNCE_INTERVAL (3 * RB1XX_KEYS_POLL_INTERVAL) |
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24 | |||
25 | static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = { |
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26 | PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0), |
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27 | PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1), |
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28 | PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2) |
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29 | }; |
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30 | |||
31 | static struct mtd_partition rb1xx_nor_parts[] = { |
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32 | { |
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33 | .name = "booter", |
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34 | .offset = 0, |
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35 | .size = 64*1024, |
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36 | .mask_flags = MTD_WRITEABLE, |
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37 | } , { |
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38 | .name = "firmware", |
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39 | .offset = MTDPART_OFS_APPEND, |
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40 | .size = MTDPART_SIZ_FULL, |
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41 | } |
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42 | }; |
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43 | |||
44 | static struct mtd_partition rb1xx_nand_parts[] = { |
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45 | { |
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46 | .name = "kernel", |
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47 | .offset = 0, |
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48 | .size = 4 * 1024 * 1024, |
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49 | } , { |
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50 | .name = "rootfs", |
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51 | .offset = MTDPART_OFS_NXTBLK, |
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52 | .size = MTDPART_SIZ_FULL |
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53 | } |
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54 | }; |
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55 | |||
56 | /* |
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57 | * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader |
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58 | * will not be able to find the kernel that we load. So set the oobinfo |
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59 | * when creating the partitions |
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60 | */ |
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61 | static struct nand_ecclayout rb1xx_nand_ecclayout = { |
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62 | .eccbytes = 6, |
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63 | .eccpos = { 8, 9, 10, 13, 14, 15 }, |
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64 | .oobavail = 9, |
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65 | .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } |
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66 | }; |
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67 | |||
68 | /*--------------------------------------------------------------------------*/ |
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69 | |||
70 | static int rb1xx_nand_fixup(struct mtd_info *mtd) |
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71 | { |
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72 | struct nand_chip *chip = mtd->priv; |
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73 | |||
74 | if (mtd->writesize == 512) |
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75 | chip->ecc.layout = &rb1xx_nand_ecclayout; |
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76 | |||
77 | return 0; |
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78 | } |
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79 | |||
80 | struct platform_nand_data rb1xx_nand_data __initdata = { |
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81 | .chip = { |
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82 | .nr_chips = 1, |
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83 | .nr_partitions = ARRAY_SIZE(rb1xx_nand_parts), |
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84 | .partitions = rb1xx_nand_parts, |
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85 | .chip_delay = RB1XX_NAND_CHIP_DELAY, |
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86 | .chip_fixup = rb1xx_nand_fixup, |
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87 | }, |
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88 | }; |
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89 | |||
90 | struct gpio_keys_button rb1xx_gpio_buttons[] __initdata = { |
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91 | { |
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92 | .desc = "reset_button", |
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93 | .type = EV_KEY, |
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94 | .code = KEY_RESTART, |
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95 | .debounce_interval = RB1XX_KEYS_DEBOUNCE_INTERVAL, |
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96 | .gpio = ADM5120_GPIO_PIN7, |
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97 | } |
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98 | }; |
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99 | |||
100 | static void __init rb1xx_mac_setup(void) |
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101 | { |
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102 | if (rb_hs.mac_base != NULL && is_valid_ether_addr(rb_hs.mac_base)) { |
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103 | adm5120_setup_eth_macs(rb_hs.mac_base); |
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104 | } else { |
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105 | u8 mac[ETH_ALEN]; |
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106 | |||
107 | random_ether_addr(mac); |
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108 | adm5120_setup_eth_macs(mac); |
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109 | } |
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110 | } |
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111 | |||
112 | void __init rb1xx_add_device_flash(void) |
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113 | { |
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114 | /* setup data for flash0 device */ |
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115 | adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts); |
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116 | adm5120_flash0_data.parts = rb1xx_nor_parts; |
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117 | adm5120_flash0_data.window_size = 128*1024; |
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118 | |||
119 | adm5120_add_device_flash(0); |
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120 | } |
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121 | |||
122 | void __init rb1xx_add_device_nand(void) |
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123 | { |
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124 | /* enable NAND flash interface */ |
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125 | adm5120_nand_enable(); |
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126 | |||
127 | /* initialize NAND chip */ |
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128 | adm5120_nand_set_spn(1); |
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129 | adm5120_nand_set_wpn(0); |
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130 | |||
131 | adm5120_add_device_nand(&rb1xx_nand_data); |
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132 | } |
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133 | |||
134 | void __init rb1xx_generic_setup(void) |
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135 | { |
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136 | if (adm5120_package_bga()) |
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137 | adm5120_pci_set_irq_map(ARRAY_SIZE(rb1xx_pci_irqs), |
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138 | rb1xx_pci_irqs); |
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139 | |||
140 | adm5120_add_device_uart(0); |
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141 | adm5120_add_device_uart(1); |
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142 | |||
143 | adm5120_register_gpio_buttons(-1, RB1XX_KEYS_POLL_INTERVAL, |
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144 | ARRAY_SIZE(rb1xx_gpio_buttons), |
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145 | rb1xx_gpio_buttons); |
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146 | |||
147 | rb1xx_add_device_flash(); |
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148 | rb1xx_mac_setup(); |
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149 | } |