OpenWrt – Blame information for rev 1

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Rev Author Line No. Line
1 office 1 --- a/drivers/net/wireless/ath/ath9k/hw.h
2 +++ b/drivers/net/wireless/ath/ath9k/hw.h
3 @@ -721,6 +721,7 @@ struct ath_spec_scan {
4 * @config_pci_powersave:
5 * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
6 *
7 + * @get_adc_entropy: get entropy from the raw ADC I/Q output
8 * @spectral_scan_config: set parameters for spectral scan and enable/disable it
9 * @spectral_scan_trigger: trigger a spectral scan run
10 * @spectral_scan_wait: wait for a spectral scan run to finish
11 @@ -743,6 +744,7 @@ struct ath_hw_ops {
12 struct ath_hw_antcomb_conf *antconf);
13 void (*antdiv_comb_conf_set)(struct ath_hw *ah,
14 struct ath_hw_antcomb_conf *antconf);
15 + void (*get_adc_entropy)(struct ath_hw *ah, u8 *buf, size_t len);
16 void (*spectral_scan_config)(struct ath_hw *ah,
17 struct ath_spec_scan *param);
18 void (*spectral_scan_trigger)(struct ath_hw *ah);
19 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
20 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
21 @@ -1945,6 +1945,26 @@ void ar9003_hw_init_rate_txpower(struct
22 }
23 }
24  
25 +static void ar9003_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
26 +{
27 + int i, j;
28 +
29 + REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
30 + REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
31 + REG_RMW_FIELD(ah, AR_PHY_TEST_CTL_STATUS, AR_PHY_TEST_CTL_RX_OBS_SEL, 0);
32 +
33 + memset(buf, 0, len);
34 + for (i = 0; i < len; i++) {
35 + for (j = 0; j < 4; j++) {
36 + u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
37 +
38 + buf[i] <<= 2;
39 + buf[i] |= (regval & 1) | ((regval & BIT(10)) >> 9);
40 + udelay(1);
41 + }
42 + }
43 +}
44 +
45 void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
46 {
47 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
48 @@ -1981,6 +2001,7 @@ void ar9003_hw_attach_phy_ops(struct ath
49 priv_ops->set_radar_params = ar9003_hw_set_radar_params;
50 priv_ops->fast_chan_change = ar9003_hw_fast_chan_change;
51  
52 + ops->get_adc_entropy = ar9003_hw_get_adc_entropy;
53 ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
54 ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
55 ops->spectral_scan_config = ar9003_hw_spectral_scan_config;
56 --- a/drivers/net/wireless/ath/ath9k/init.c
57 +++ b/drivers/net/wireless/ath/ath9k/init.c
58 @@ -821,7 +821,8 @@ static void ath9k_init_txpower_limits(st
59 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
60 ath9k_init_band_txpower(sc, NL80211_BAND_5GHZ);
61  
62 - ah->curchan = curchan;
63 + if (curchan)
64 + ah->curchan = curchan;
65 }
66  
67 static const struct ieee80211_iface_limit if_limits[] = {
68 @@ -1016,6 +1017,18 @@ static void ath9k_set_hw_capab(struct at
69 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
70 }
71  
72 +static void ath_get_initial_entropy(struct ath_softc *sc)
73 +{
74 + struct ath_hw *ah = sc->sc_ah;
75 + char buf[256];
76 +
77 + /* reuse last channel initialized by the tx power test */
78 + ath9k_hw_reset(ah, ah->curchan, NULL, false);
79 +
80 + ath9k_hw_get_adc_entropy(ah, buf, sizeof(buf));
81 + add_device_randomness(buf, sizeof(buf));
82 +}
83 +
84 int ath9k_init_device(u16 devid, struct ath_softc *sc,
85 const struct ath_bus_ops *bus_ops)
86 {
87 @@ -1061,6 +1074,8 @@ int ath9k_init_device(u16 devid, struct
88 ARRAY_SIZE(ath9k_tpt_blink));
89 #endif
90  
91 + ath_get_initial_entropy(sc);
92 +
93 /* Register with mac80211 */
94 error = ieee80211_register_hw(hw);
95 if (error)
96 --- a/drivers/net/wireless/ath/ath9k/hw-ops.h
97 +++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
98 @@ -100,6 +100,12 @@ static inline void ath9k_hw_tx99_set_txp
99 ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
100 }
101  
102 +static inline void ath9k_hw_get_adc_entropy(struct ath_hw *ah,
103 + u8 *buf, size_t len)
104 +{
105 + ath9k_hw_ops(ah)->get_adc_entropy(ah, buf, len);
106 +}
107 +
108 #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
109  
110 static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
111 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
112 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
113 @@ -1324,9 +1324,30 @@ void ar5008_hw_init_rate_txpower(struct
114 }
115 }
116  
117 +static void ar5008_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
118 +{
119 + int i, j;
120 +
121 + REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
122 + REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
123 + REG_RMW_FIELD(ah, AR_PHY_TEST2, AR_PHY_TEST2_RX_OBS_SEL, 0);
124 +
125 + memset(buf, 0, len);
126 + for (i = 0; i < len; i++) {
127 + for (j = 0; j < 4; j++) {
128 + u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
129 +
130 + buf[i] <<= 2;
131 + buf[i] |= (regval & 1) | ((regval & BIT(9)) >> 8);
132 + udelay(1);
133 + }
134 + }
135 +}
136 +
137 int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
138 {
139 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
140 + struct ath_hw_ops *ops = ath9k_hw_ops(ah);
141 static const u32 ar5416_cca_regs[6] = {
142 AR_PHY_CCA,
143 AR_PHY_CH1_CCA,
144 @@ -1341,6 +1362,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
145 if (ret)
146 return ret;
147  
148 + ops->get_adc_entropy = ar5008_hw_get_adc_entropy;
149 +
150 priv_ops->rf_set_freq = ar5008_hw_set_channel;
151 priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
152  
153 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.h
154 +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.h
155 @@ -20,6 +20,12 @@
156 #define PHY_AGC_CLR 0x10000000
157 #define RFSILENT_BB 0x00002000
158  
159 +#define AR_PHY_TEST_BBB_OBS_SEL 0x780000
160 +#define AR_PHY_TEST_BBB_OBS_SEL_S 19
161 +
162 +#define AR_PHY_TEST_RX_OBS_SEL_BIT5_S 23
163 +#define AR_PHY_TEST_RX_OBS_SEL_BIT5 (1 << AR_PHY_TEST_RX_OBS_SEL_BIT5_S)
164 +
165 #define AR_PHY_TURBO 0x9804
166 #define AR_PHY_FC_TURBO_MODE 0x00000001
167 #define AR_PHY_FC_TURBO_SHORT 0x00000002
168 @@ -36,6 +42,9 @@
169  
170 #define AR_PHY_TEST2 0x9808
171  
172 +#define AR_PHY_TEST2_RX_OBS_SEL 0x3C00
173 +#define AR_PHY_TEST2_RX_OBS_SEL_S 10
174 +
175 #define AR_PHY_TIMING2 0x9810
176 #define AR_PHY_TIMING3 0x9814
177 #define AR_PHY_TIMING3_DSC_MAN 0xFFFE0000
178 @@ -393,6 +402,8 @@
179 #define AR_PHY_RFBUS_GRANT 0x9C20
180 #define AR_PHY_RFBUS_GRANT_EN 0x00000001
181  
182 +#define AR_PHY_TST_ADC 0x9C24
183 +
184 #define AR_PHY_CHAN_INFO_GAIN_DIFF 0x9CF4
185 #define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320
186