OpenWrt – Blame information for rev 1
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1 | office | 1 | /****************************************************************************** |
2 | ** |
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3 | ** FILE NAME : ifxmips_arc4.c |
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4 | ** PROJECT : IFX UEIP |
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5 | ** MODULES : DEU Module |
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6 | ** |
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7 | ** DATE : September 8, 2009 |
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8 | ** AUTHOR : Mohammad Firdaus |
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9 | ** DESCRIPTION : Data Encryption Unit Driver for ARC4 Algorithm |
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10 | ** COPYRIGHT : Copyright (c) 2009 |
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11 | ** Infineon Technologies AG |
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12 | ** Am Campeon 1-12, 85579 Neubiberg, Germany |
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13 | ** |
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14 | ** This program is free software; you can redistribute it and/or modify |
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15 | ** it under the terms of the GNU General Public License as published by |
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16 | ** the Free Software Foundation; either version 2 of the License, or |
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17 | ** (at your option) any later version. |
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18 | ** |
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19 | ** HISTORY |
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20 | ** $Date $Author $Comment |
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21 | ** 08 Sept 2009 Mohammad Firdaus Initial UEIP release |
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22 | *******************************************************************************/ |
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23 | |||
24 | /*! |
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25 | \defgroup IFX_DEU IFX_DEU_DRIVERS |
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26 | \ingroup API |
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27 | \brief ifx deu driver module |
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28 | */ |
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29 | |||
30 | /*! |
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31 | \file ifxmips_arc4.c |
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32 | \ingroup IFX_DEU |
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33 | \brief ARC4 encryption DEU driver file |
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34 | */ |
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35 | |||
36 | /*! |
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37 | \defgroup IFX_ARC4_FUNCTIONS IFX_ARC4_FUNCTIONS |
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38 | \ingroup IFX_DEU |
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39 | \brief IFX deu driver functions |
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40 | */ |
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41 | |||
42 | /* Project header */ |
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43 | #include <linux/version.h> |
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44 | #include <linux/module.h> |
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45 | #include <linux/init.h> |
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46 | #include <linux/types.h> |
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47 | #include <linux/errno.h> |
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48 | #include <linux/crypto.h> |
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49 | #include <crypto/algapi.h> |
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50 | #include <linux/interrupt.h> |
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51 | #include <asm/byteorder.h> |
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52 | #include <linux/delay.h> |
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53 | |||
54 | /* Board specific header files */ |
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55 | #ifdef CONFIG_AR9 |
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56 | #include "ifxmips_deu_ar9.h" |
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57 | #endif |
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58 | #ifdef CONFIG_VR9 |
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59 | #include "ifxmips_deu_vr9.h" |
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60 | #endif |
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61 | |||
62 | static spinlock_t lock; |
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63 | #define CRTCL_SECT_INIT spin_lock_init(&lock) |
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64 | #define CRTCL_SECT_START spin_lock_irqsave(&lock, flag) |
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65 | #define CRTCL_SECT_END spin_unlock_irqrestore(&lock, flag) |
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66 | |||
67 | /* Preprocessor declerations */ |
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68 | #define ARC4_MIN_KEY_SIZE 1 |
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69 | //#define ARC4_MAX_KEY_SIZE 256 |
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70 | #define ARC4_MAX_KEY_SIZE 16 |
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71 | #define ARC4_BLOCK_SIZE 1 |
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72 | #define ARC4_START IFX_ARC4_CON |
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73 | #ifdef CRYPTO_DEBUG |
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74 | extern char debug_level; |
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75 | #define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args); |
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76 | #else |
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77 | #define DPRINTF(level, format, args...) |
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78 | #endif |
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79 | |||
80 | /* |
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81 | * \brief arc4 private structure |
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82 | */ |
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83 | struct arc4_ctx { |
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84 | int key_length; |
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85 | u8 buf[120]; |
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86 | }; |
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87 | |||
88 | extern int disable_deudma; |
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89 | extern int disable_multiblock; |
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90 | |||
91 | |||
92 | /*! \fn static void _deu_arc4 (void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg, u32 nbytes, int encdec, int mode) |
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93 | \ingroup IFX_ARC4_FUNCTIONS |
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94 | \brief main interface to ARC4 hardware |
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95 | \param ctx_arg crypto algo context |
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96 | \param out_arg output bytestream |
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97 | \param in_arg input bytestream |
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98 | \param iv_arg initialization vector |
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99 | \param nbytes length of bytestream |
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100 | \param encdec 1 for encrypt; 0 for decrypt |
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101 | \param mode operation mode such as ebc, cbc, ctr |
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102 | */ |
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103 | static void _deu_arc4 (void *ctx_arg, u8 *out_arg, const u8 *in_arg, |
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104 | u8 *iv_arg, u32 nbytes, int encdec, int mode) |
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105 | { |
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106 | volatile struct arc4_t *arc4 = (struct arc4_t *) ARC4_START; |
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107 | |||
108 | int i = 0; |
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109 | unsigned long flag; |
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110 | |||
111 | #if 1 // need to handle nbytes not multiple of 16 |
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112 | volatile u32 tmp_array32[4]; |
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113 | volatile u8 *tmp_ptr8; |
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114 | int remaining_bytes, j; |
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115 | #endif |
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116 | |||
117 | CRTCL_SECT_START; |
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118 | |||
119 | arc4->IDLEN = nbytes; |
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120 | |||
121 | #if 1 |
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122 | while (i < nbytes) { |
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123 | arc4->ID3R = *((u32 *) in_arg + (i>>2) + 0); |
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124 | arc4->ID2R = *((u32 *) in_arg + (i>>2) + 1); |
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125 | arc4->ID1R = *((u32 *) in_arg + (i>>2) + 2); |
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126 | arc4->ID0R = *((u32 *) in_arg + (i>>2) + 3); |
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127 | |||
128 | arc4->controlr.GO = 1; |
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129 | |||
130 | while (arc4->controlr.BUS) { |
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131 | // this will not take long |
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132 | } |
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133 | |||
134 | #if 1 |
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135 | // need to handle nbytes not multiple of 16 |
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136 | tmp_array32[0] = arc4->OD3R; |
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137 | tmp_array32[1] = arc4->OD2R; |
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138 | tmp_array32[2] = arc4->OD1R; |
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139 | tmp_array32[3] = arc4->OD0R; |
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140 | |||
141 | remaining_bytes = nbytes - i; |
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142 | if (remaining_bytes > 16) |
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143 | remaining_bytes = 16; |
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144 | |||
145 | tmp_ptr8 = (u8 *)&tmp_array32[0]; |
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146 | for (j = 0; j < remaining_bytes; j++) |
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147 | *out_arg++ = *tmp_ptr8++; |
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148 | #else |
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149 | *((u32 *) out_arg + (i>>2) + 0) = arc4->OD3R; |
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150 | *((u32 *) out_arg + (i>>2) + 1) = arc4->OD2R; |
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151 | *((u32 *) out_arg + (i>>2) + 2) = arc4->OD1R; |
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152 | *((u32 *) out_arg + (i>>2) + 3) = arc4->OD0R; |
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153 | #endif |
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154 | |||
155 | i += 16; |
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156 | } |
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157 | #else // dma |
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158 | |||
159 | #endif // dma |
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160 | |||
161 | CRTCL_SECT_END; |
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162 | } |
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163 | |||
164 | /*! \fn arc4_chip_init (void) |
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165 | \ingroup IFX_ARC4_FUNCTIONS |
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166 | \brief initialize arc4 hardware |
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167 | */ |
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168 | static void arc4_chip_init (void) |
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169 | { |
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170 | //do nothing |
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171 | } |
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172 | |||
173 | /*! \fn static int arc4_set_key(struct crypto_tfm *tfm, const u8 *in_key, unsigned int key_len) |
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174 | \ingroup IFX_ARC4_FUNCTIONS |
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175 | \brief sets ARC4 key |
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176 | \param tfm linux crypto algo transform |
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177 | \param in_key input key |
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178 | \param key_len key lengths less than or equal to 16 bytes supported |
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179 | */ |
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180 | static int arc4_set_key(struct crypto_tfm *tfm, const u8 *inkey, |
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181 | unsigned int key_len) |
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182 | { |
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183 | //struct arc4_ctx *ctx = crypto_tfm_ctx(tfm); |
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184 | volatile struct arc4_t *arc4 = (struct arc4_t *) ARC4_START; |
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185 | u32 *in_key = (u32 *)inkey; |
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186 | |||
187 | // must program all bits at one go?!!! |
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188 | //#if 1 |
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189 | *IFX_ARC4_CON = ( (1<<31) | ((key_len - 1)<<27) | (1<<26) | (3<<16) ); |
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190 | //NDC=1,ENDI=1,GO=0,KSAE=1,SM=0 |
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191 | |||
192 | arc4->K3R = *((u32 *) in_key + 0); |
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193 | arc4->K2R = *((u32 *) in_key + 1); |
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194 | arc4->K1R = *((u32 *) in_key + 2); |
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195 | arc4->K0R = *((u32 *) in_key + 3); |
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196 | |||
197 | #if 0 // arc4 is a ugly state machine, KSAE can only be set once per session |
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198 | ctx->key_length = key_len; |
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199 | |||
200 | memcpy ((u8 *) (ctx->buf), in_key, key_len); |
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201 | #endif |
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202 | |||
203 | return 0; |
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204 | } |
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205 | |||
206 | /*! \fn static void _deu_arc4_ecb(void *ctx, uint8_t *dst, const uint8_t *src, uint8_t *iv, size_t nbytes, int encdec, int inplace) |
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207 | \ingroup IFX_ARC4_FUNCTIONS |
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208 | \brief sets ARC4 hardware to ECB mode |
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209 | \param ctx crypto algo context |
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210 | \param dst output bytestream |
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211 | \param src input bytestream |
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212 | \param iv initialization vector |
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213 | \param nbytes length of bytestream |
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214 | \param encdec 1 for encrypt; 0 for decrypt |
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215 | \param inplace not used |
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216 | */ |
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217 | static void _deu_arc4_ecb(void *ctx, uint8_t *dst, const uint8_t *src, |
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218 | uint8_t *iv, size_t nbytes, int encdec, int inplace) |
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219 | { |
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220 | _deu_arc4 (ctx, dst, src, NULL, nbytes, encdec, 0); |
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221 | } |
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222 | |||
223 | /*! \fn static void arc4_crypt(struct crypto_tfm *tfm, u8 *out, const u8 *in) |
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224 | \ingroup IFX_ARC4_FUNCTIONS |
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225 | \brief encrypt/decrypt ARC4_BLOCK_SIZE of data |
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226 | \param tfm linux crypto algo transform |
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227 | \param out output bytestream |
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228 | \param in input bytestream |
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229 | */ |
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230 | static void arc4_crypt(struct crypto_tfm *tfm, u8 *out, const u8 *in) |
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231 | { |
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232 | struct arc4_ctx *ctx = crypto_tfm_ctx(tfm); |
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233 | |||
234 | _deu_arc4 (ctx, out, in, NULL, ARC4_BLOCK_SIZE, |
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235 | CRYPTO_DIR_DECRYPT, 0); |
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236 | |||
237 | } |
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238 | |||
239 | /* |
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240 | * \brief ARC4 function mappings |
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241 | */ |
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242 | static struct crypto_alg ifxdeu_arc4_alg = { |
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243 | .cra_name = "arc4", |
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244 | .cra_driver_name = "ifxdeu-arc4", |
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245 | .cra_priority = 300, |
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246 | .cra_flags = CRYPTO_ALG_TYPE_CIPHER, |
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247 | .cra_blocksize = ARC4_BLOCK_SIZE, |
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248 | .cra_ctxsize = sizeof(struct arc4_ctx), |
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249 | .cra_module = THIS_MODULE, |
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250 | .cra_list = LIST_HEAD_INIT(ifxdeu_arc4_alg.cra_list), |
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251 | .cra_u = { |
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252 | .cipher = { |
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253 | .cia_min_keysize = ARC4_MIN_KEY_SIZE, |
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254 | .cia_max_keysize = ARC4_MAX_KEY_SIZE, |
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255 | .cia_setkey = arc4_set_key, |
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256 | .cia_encrypt = arc4_crypt, |
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257 | .cia_decrypt = arc4_crypt, |
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258 | } |
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259 | } |
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260 | }; |
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261 | |||
262 | /*! \fn static int ecb_arc4_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes) |
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263 | \ingroup IFX_ARC4_FUNCTIONS |
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264 | \brief ECB ARC4 encrypt using linux crypto blkcipher |
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265 | \param desc blkcipher descriptor |
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266 | \param dst output scatterlist |
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267 | \param src input scatterlist |
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268 | \param nbytes data size in bytes |
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269 | */ |
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270 | static int ecb_arc4_encrypt(struct blkcipher_desc *desc, |
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271 | struct scatterlist *dst, struct scatterlist *src, |
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272 | unsigned int nbytes) |
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273 | { |
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274 | struct arc4_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); |
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275 | struct blkcipher_walk walk; |
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276 | int err; |
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277 | |||
278 | DPRINTF(1, "\n"); |
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279 | blkcipher_walk_init(&walk, dst, src, nbytes); |
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280 | err = blkcipher_walk_virt(desc, &walk); |
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281 | |||
282 | while ((nbytes = walk.nbytes)) { |
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283 | _deu_arc4_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr, |
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284 | NULL, nbytes, CRYPTO_DIR_ENCRYPT, 0); |
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285 | nbytes &= ARC4_BLOCK_SIZE - 1; |
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286 | err = blkcipher_walk_done(desc, &walk, nbytes); |
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287 | } |
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288 | |||
289 | return err; |
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290 | } |
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291 | |||
292 | /*! \fn static int ecb_arc4_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes) |
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293 | \ingroup IFX_ARC4_FUNCTIONS |
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294 | \brief ECB ARC4 decrypt using linux crypto blkcipher |
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295 | \param desc blkcipher descriptor |
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296 | \param dst output scatterlist |
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297 | \param src input scatterlist |
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298 | \param nbytes data size in bytes |
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299 | */ |
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300 | static int ecb_arc4_decrypt(struct blkcipher_desc *desc, |
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301 | struct scatterlist *dst, struct scatterlist *src, |
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302 | unsigned int nbytes) |
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303 | { |
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304 | struct arc4_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); |
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305 | struct blkcipher_walk walk; |
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306 | int err; |
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307 | |||
308 | DPRINTF(1, "\n"); |
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309 | blkcipher_walk_init(&walk, dst, src, nbytes); |
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310 | err = blkcipher_walk_virt(desc, &walk); |
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311 | |||
312 | while ((nbytes = walk.nbytes)) { |
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313 | _deu_arc4_ecb(ctx, walk.dst.virt.addr, walk.src.virt.addr, |
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314 | NULL, nbytes, CRYPTO_DIR_DECRYPT, 0); |
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315 | nbytes &= ARC4_BLOCK_SIZE - 1; |
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316 | err = blkcipher_walk_done(desc, &walk, nbytes); |
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317 | } |
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318 | |||
319 | return err; |
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320 | } |
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321 | |||
322 | /* |
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323 | * \brief ARC4 function mappings |
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324 | */ |
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325 | static struct crypto_alg ifxdeu_ecb_arc4_alg = { |
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326 | .cra_name = "ecb(arc4)", |
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327 | .cra_driver_name = "ifxdeu-ecb(arc4)", |
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328 | .cra_priority = 400, |
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329 | .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER, |
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330 | .cra_blocksize = ARC4_BLOCK_SIZE, |
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331 | .cra_ctxsize = sizeof(struct arc4_ctx), |
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332 | .cra_type = &crypto_blkcipher_type, |
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333 | .cra_module = THIS_MODULE, |
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334 | .cra_list = LIST_HEAD_INIT(ifxdeu_ecb_arc4_alg.cra_list), |
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335 | .cra_u = { |
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336 | .blkcipher = { |
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337 | .min_keysize = ARC4_MIN_KEY_SIZE, |
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338 | .max_keysize = ARC4_MAX_KEY_SIZE, |
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339 | .setkey = arc4_set_key, |
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340 | .encrypt = ecb_arc4_encrypt, |
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341 | .decrypt = ecb_arc4_decrypt, |
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342 | } |
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343 | } |
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344 | }; |
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345 | |||
346 | /*! \fn int ifxdeu_init_arc4(void) |
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347 | \ingroup IFX_ARC4_FUNCTIONS |
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348 | \brief initialize arc4 driver |
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349 | */ |
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350 | int ifxdeu_init_arc4(void) |
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351 | { |
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352 | int ret = -ENOSYS; |
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353 | |||
354 | |||
355 | if ((ret = crypto_register_alg(&ifxdeu_arc4_alg))) |
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356 | goto arc4_err; |
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357 | |||
358 | if ((ret = crypto_register_alg(&ifxdeu_ecb_arc4_alg))) |
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359 | goto ecb_arc4_err; |
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360 | |||
361 | arc4_chip_init (); |
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362 | |||
363 | CRTCL_SECT_INIT; |
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364 | |||
365 | printk (KERN_NOTICE "IFX DEU ARC4 initialized%s%s.\n", disable_multiblock ? "" : " (multiblock)", disable_deudma ? "" : " (DMA)"); |
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366 | return ret; |
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367 | |||
368 | arc4_err: |
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369 | crypto_unregister_alg(&ifxdeu_arc4_alg); |
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370 | printk(KERN_ERR "IFX arc4 initialization failed!\n"); |
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371 | return ret; |
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372 | ecb_arc4_err: |
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373 | crypto_unregister_alg(&ifxdeu_ecb_arc4_alg); |
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374 | printk (KERN_ERR "IFX ecb_arc4 initialization failed!\n"); |
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375 | return ret; |
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376 | |||
377 | } |
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378 | |||
379 | /*! \fn void ifxdeu_fini_arc4(void) |
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380 | \ingroup IFX_ARC4_FUNCTIONS |
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381 | \brief unregister arc4 driver |
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382 | */ |
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383 | void ifxdeu_fini_arc4(void) |
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384 | { |
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385 | crypto_unregister_alg (&ifxdeu_arc4_alg); |
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386 | crypto_unregister_alg (&ifxdeu_ecb_arc4_alg); |
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387 | |||
388 | |||
389 | } |
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390 | |||
391 |