OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From b11c5d1dc29e81326d1215011d19377737082aeb Mon Sep 17 00:00:00 2001 |
2 | From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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3 | Date: Wed, 1 Jul 2015 16:36:43 +0200 |
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4 | Subject: [PATCH] MIPS: change 'extern inline' to 'static inline' |
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5 | |||
6 | The kernel changed it a long time ago. Also this is now broken |
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7 | on gcc-5.x. |
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8 | |||
9 | Reported-by: Andy Kennedy <andy.kennedy@adtran.com> |
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10 | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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11 | --- |
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12 | arch/mips/include/asm/io.h | 12 ++++++------ |
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13 | arch/mips/include/asm/system.h | 6 +++--- |
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14 | 2 files changed, 9 insertions(+), 9 deletions(-) |
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15 | |||
16 | --- a/arch/mips/include/asm/io.h |
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17 | +++ b/arch/mips/include/asm/io.h |
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18 | @@ -118,7 +118,7 @@ static inline void set_io_port_base(unsi |
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19 | * Change virtual addresses to physical addresses and vv. |
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20 | * These are trivial on the 1:1 Linux/MIPS mapping |
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21 | */ |
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22 | -extern inline phys_addr_t virt_to_phys(volatile void * address) |
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23 | +static inline phys_addr_t virt_to_phys(volatile void * address) |
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24 | { |
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25 | #ifndef CONFIG_64BIT |
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26 | return CPHYSADDR(address); |
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27 | @@ -127,7 +127,7 @@ extern inline phys_addr_t virt_to_phys(v |
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28 | #endif |
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29 | } |
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30 | |||
31 | -extern inline void * phys_to_virt(unsigned long address) |
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32 | +static inline void * phys_to_virt(unsigned long address) |
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33 | { |
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34 | #ifndef CONFIG_64BIT |
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35 | return (void *)KSEG0ADDR(address); |
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36 | @@ -139,7 +139,7 @@ extern inline void * phys_to_virt(unsign |
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37 | /* |
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38 | * IO bus memory addresses are also 1:1 with the physical address |
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39 | */ |
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40 | -extern inline unsigned long virt_to_bus(volatile void * address) |
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41 | +static inline unsigned long virt_to_bus(volatile void * address) |
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42 | { |
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43 | #ifndef CONFIG_64BIT |
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44 | return CPHYSADDR(address); |
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45 | @@ -148,7 +148,7 @@ extern inline unsigned long virt_to_bus( |
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46 | #endif |
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47 | } |
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48 | |||
49 | -extern inline void * bus_to_virt(unsigned long address) |
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50 | +static inline void * bus_to_virt(unsigned long address) |
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51 | { |
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52 | #ifndef CONFIG_64BIT |
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53 | return (void *)KSEG0ADDR(address); |
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54 | @@ -166,12 +166,12 @@ extern unsigned long isa_slot_offset; |
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55 | extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); |
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56 | |||
57 | #if 0 |
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58 | -extern inline void *ioremap(unsigned long offset, unsigned long size) |
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59 | +static inline void *ioremap(unsigned long offset, unsigned long size) |
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60 | { |
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61 | return __ioremap(offset, size, _CACHE_UNCACHED); |
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62 | } |
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63 | |||
64 | -extern inline void *ioremap_nocache(unsigned long offset, unsigned long size) |
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65 | +static inline void *ioremap_nocache(unsigned long offset, unsigned long size) |
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66 | { |
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67 | return __ioremap(offset, size, _CACHE_UNCACHED); |
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68 | } |
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69 | --- a/arch/mips/include/asm/system.h |
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70 | +++ b/arch/mips/include/asm/system.h |
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71 | @@ -23,7 +23,7 @@ |
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72 | #include <linux/kernel.h> |
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73 | #endif |
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74 | |||
75 | -extern __inline__ void |
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76 | +static __inline__ void |
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77 | __sti(void) |
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78 | { |
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79 | __asm__ __volatile__( |
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80 | @@ -47,7 +47,7 @@ __sti(void) |
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81 | * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs |
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82 | * no nops at all. |
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83 | */ |
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84 | -extern __inline__ void |
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85 | +static __inline__ void |
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86 | __cli(void) |
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87 | { |
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88 | __asm__ __volatile__( |
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89 | @@ -208,7 +208,7 @@ do { \ |
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90 | * For 32 and 64 bit operands we can take advantage of ll and sc. |
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91 | * FIXME: This doesn't work for R3000 machines. |
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92 | */ |
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93 | -extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) |
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94 | +static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) |
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95 | { |
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96 | #ifdef CONFIG_CPU_HAS_LLSC |
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97 | unsigned long dummy; |