OpenWrt – Blame information for rev 1
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Rev | Author | Line No. | Line |
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1 | office | 1 | From 3af3addee645bd81537be1ddee49969f8dfc64ee Mon Sep 17 00:00:00 2001 |
2 | From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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3 | Date: Sun, 13 Oct 2013 15:24:56 +0200 |
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4 | Subject: sf: add support for 4-byte addressing |
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5 | |||
6 | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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7 | |||
8 | --- a/drivers/mtd/spi/sf_internal.h |
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9 | +++ b/drivers/mtd/spi/sf_internal.h |
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10 | @@ -38,12 +38,14 @@ |
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11 | #define CMD_READ_ID 0x9f |
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12 | |||
13 | /* Bank addr access commands */ |
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14 | -#ifdef CONFIG_SPI_FLASH_BAR |
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15 | -# define CMD_BANKADDR_BRWR 0x17 |
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16 | -# define CMD_BANKADDR_BRRD 0x16 |
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17 | -# define CMD_EXTNADDR_WREAR 0xC5 |
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18 | -# define CMD_EXTNADDR_RDEAR 0xC8 |
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19 | -#endif |
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20 | +#define CMD_BANKADDR_BRWR 0x17 |
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21 | +#define CMD_BANKADDR_BRRD 0x16 |
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22 | +#define CMD_EXTNADDR_WREAR 0xC5 |
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23 | +#define CMD_EXTNADDR_RDEAR 0xC8 |
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24 | + |
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25 | +/* Macronix style 4-byte addressing */ |
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26 | +#define CMD_EN4B 0xb7 |
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27 | +#define CMD_EX4B 0xe9 |
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28 | |||
29 | /* Common status */ |
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30 | #define STATUS_WIP 0x01 |
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31 | --- a/drivers/mtd/spi/sf_ops.c |
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32 | +++ b/drivers/mtd/spi/sf_ops.c |
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33 | @@ -21,6 +21,7 @@ static void spi_flash_addr(const struct |
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34 | cmd[1] = addr >> (flash->addr_width * 8 - 8); |
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35 | cmd[2] = addr >> (flash->addr_width * 8 - 16); |
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36 | cmd[3] = addr >> (flash->addr_width * 8 - 24); |
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37 | + cmd[4] = addr >> (flash->addr_width * 8 - 32); |
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38 | } |
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39 | |||
40 | static int spi_flash_cmdsz(const struct spi_flash *flash) |
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41 | @@ -163,7 +164,7 @@ int spi_flash_write_common(struct spi_fl |
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42 | int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) |
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43 | { |
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44 | u32 erase_size; |
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45 | - u8 cmd[4], cmd_len; |
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46 | + u8 cmd[5], cmd_len; |
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47 | int ret = -1; |
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48 | |||
49 | erase_size = flash->erase_size; |
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50 | @@ -188,8 +189,8 @@ int spi_flash_cmd_erase_ops(struct spi_f |
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51 | spi_flash_addr(flash, offset, cmd); |
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52 | cmd_len = spi_flash_cmdsz(flash); |
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53 | |||
54 | - debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], |
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55 | - cmd[2], cmd[3], offset); |
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56 | + debug("SF: erase %2x %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], |
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57 | + cmd[2], cmd[3], cmd[4], offset); |
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58 | |||
59 | ret = spi_flash_write_common(flash, cmd, cmd_len, NULL, 0); |
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60 | if (ret < 0) { |
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61 | @@ -212,7 +213,7 @@ int spi_flash_cmd_write_ops(struct spi_f |
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62 | { |
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63 | unsigned long byte_addr, page_size; |
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64 | size_t chunk_len, actual; |
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65 | - u8 cmd[4], cmd_len; |
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66 | + u8 cmd[5], cmd_len; |
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67 | int ret = -1; |
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68 | |||
69 | ret = spi_claim_bus(flash->spi); |
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70 | @@ -239,8 +240,8 @@ int spi_flash_cmd_write_ops(struct spi_f |
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71 | spi_flash_addr(flash, offset, cmd); |
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72 | cmd_len = spi_flash_cmdsz(flash); |
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73 | |||
74 | - debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", |
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75 | - buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); |
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76 | + debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x%02x } chunk_len = %zu\n", |
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77 | + buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], chunk_len); |
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78 | |||
79 | ret = spi_flash_write_common(flash, cmd, cmd_len, |
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80 | buf + actual, chunk_len); |
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81 | @@ -276,9 +277,13 @@ int spi_flash_read_common(struct spi_fla |
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82 | int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, |
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83 | size_t len, void *data) |
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84 | { |
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85 | - u8 cmd[5], cmd_len, bank_sel = 0; |
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86 | - u32 remain_len, read_len; |
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87 | + u8 cmd[6], cmd_len; |
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88 | + u32 read_len; |
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89 | int ret = -1; |
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90 | +#ifdef CONFIG_SPI_FLASH_BAR |
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91 | + u8 bank_sel = 0; |
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92 | + u32 remain_len; |
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93 | +#endif |
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94 | |||
95 | ret = spi_claim_bus(flash->spi); |
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96 | if (ret) { |
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97 | @@ -305,12 +310,15 @@ int spi_flash_cmd_read_ops(struct spi_fl |
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98 | debug("SF: fail to set bank%d\n", bank_sel); |
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99 | goto done; |
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100 | } |
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101 | -#endif |
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102 | + |
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103 | remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset; |
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104 | if (len < remain_len) |
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105 | read_len = len; |
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106 | else |
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107 | read_len = remain_len; |
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108 | +#else |
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109 | + read_len = len; |
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110 | +#endif |
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111 | |||
112 | spi_flash_addr(flash, offset, cmd); |
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113 | cmd_len = spi_flash_cmdsz(flash); |
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114 | --- a/drivers/mtd/spi/sf_probe.c |
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115 | +++ b/drivers/mtd/spi/sf_probe.c |
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116 | @@ -153,6 +153,25 @@ static const struct spi_flash_params spi |
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117 | */ |
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118 | }; |
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119 | |||
120 | +int spi_flash_4byte_set(struct spi_flash *flash, u8 idcode0, int enable) |
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121 | +{ |
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122 | + u8 cmd, bankaddr; |
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123 | + |
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124 | + switch (idcode0) { |
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125 | + case 0xc2: |
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126 | + case 0xef: |
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127 | + case 0x1c: |
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128 | + /* Macronix style */ |
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129 | + cmd = enable ? CMD_EN4B : CMD_EX4B; |
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130 | + return spi_flash_cmd(flash->spi, cmd, NULL, 0); |
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131 | + default: |
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132 | + /* Spansion style */ |
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133 | + cmd = CMD_BANKADDR_BRWR; |
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134 | + bankaddr = enable << 7; |
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135 | + return spi_flash_cmd_write(flash->spi, &cmd, 1, &bankaddr, 1); |
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136 | + } |
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137 | +} |
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138 | + |
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139 | static int spi_flash_validate_params(struct spi_flash *flash, |
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140 | u8 *idcode) |
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141 | { |
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142 | @@ -218,8 +237,18 @@ static int spi_flash_validate_params(str |
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143 | flash->poll_cmd = CMD_FLAG_STATUS; |
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144 | #endif |
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145 | |||
146 | +#ifndef CONFIG_SPI_FLASH_BAR |
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147 | + /* enable 4-byte addressing if the device exceeds 16MiB */ |
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148 | + if (flash->size > SPI_FLASH_16MB_BOUN) { |
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149 | + flash->addr_width = 4; |
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150 | + spi_flash_4byte_set(flash, idcode[0], 1); |
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151 | + } else { |
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152 | + flash->addr_width = 3; |
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153 | + } |
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154 | +#else |
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155 | /* Configure default 3-byte addressing */ |
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156 | flash->addr_width = 3; |
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157 | +#endif |
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158 | |||
159 | /* Configure the BAR - discover bank cmds and read current bank */ |
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160 | #ifdef CONFIG_SPI_FLASH_BAR |