corrade-nucleus-nucleons – Blame information for rev 6
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Rev | Author | Line No. | Line |
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2 | office | 1 | ace.define("ace/mode/verilog_highlight_rules",["require","exports","module","ace/lib/oop","ace/mode/text_highlight_rules"], function(require, exports, module) { |
2 | "use strict"; |
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3 | |||
4 | var oop = require("../lib/oop"); |
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5 | var TextHighlightRules = require("./text_highlight_rules").TextHighlightRules; |
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6 | |||
7 | var VerilogHighlightRules = function() { |
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8 | var keywords = "always|and|assign|automatic|begin|buf|bufif0|bufif1|case|casex|casez|cell|cmos|config|" + |
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9 | "deassign|default|defparam|design|disable|edge|else|end|endcase|endconfig|endfunction|endgenerate|endmodule|" + |
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10 | "endprimitive|endspecify|endtable|endtask|event|for|force|forever|fork|function|generate|genvar|highz0|" + |
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11 | "highz1|if|ifnone|incdir|include|initial|inout|input|instance|integer|join|large|liblist|library|localparam|" + |
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12 | "macromodule|medium|module|nand|negedge|nmos|nor|noshowcancelled|not|notif0|notif1|or|output|parameter|pmos|" + |
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13 | "posedge|primitive|pull0|pull1|pulldown|pullup|pulsestyle_onevent|pulsestyle_ondetect|rcmos|real|realtime|" + |
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14 | "reg|release|repeat|rnmos|rpmos|rtran|rtranif0|rtranif1|scalared|showcancelled|signed|small|specify|specparam|" + |
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15 | "strong0|strong1|supply0|supply1|table|task|time|tran|tranif0|tranif1|tri|tri0|tri1|triand|trior|trireg|" + |
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16 | "unsigned|use|vectored|wait|wand|weak0|weak1|while|wire|wor|xnor|xor" + |
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17 | "begin|bufif0|bufif1|case|casex|casez|config|else|end|endcase|endconfig|endfunction|" + |
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18 | "endgenerate|endmodule|endprimitive|endspecify|endtable|endtask|for|forever|function|generate|if|ifnone|" + |
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19 | "macromodule|module|primitive|repeat|specify|table|task|while"; |
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20 | |||
21 | var builtinConstants = ( |
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22 | "true|false|null" |
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23 | ); |
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24 | |||
25 | var builtinFunctions = ( |
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26 | "count|min|max|avg|sum|rank|now|coalesce|main" |
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27 | ); |
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28 | |||
29 | var keywordMapper = this.createKeywordMapper({ |
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30 | "support.function": builtinFunctions, |
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31 | "keyword": keywords, |
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32 | "constant.language": builtinConstants |
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33 | }, "identifier", true); |
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34 | |||
35 | this.$rules = { |
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36 | "start" : [ { |
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37 | token : "comment", |
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38 | regex : "//.*$" |
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39 | }, { |
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40 | token : "comment.start", |
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41 | regex : "/\\*", |
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42 | next : [ |
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43 | { token : "comment.end", regex : "\\*/", next: "start" }, |
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44 | { defaultToken : "comment" } |
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45 | ] |
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46 | }, { |
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47 | token : "string", // " string |
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48 | regex : '".*?"' |
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49 | }, { |
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50 | token : "string", // ' string |
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51 | regex : "'.*?'" |
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52 | }, { |
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53 | token : "constant.numeric", // float |
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54 | regex : "[+-]?\\d+(?:(?:\\.\\d*)?(?:[eE][+-]?\\d+)?)?\\b" |
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55 | }, { |
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56 | token : keywordMapper, |
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57 | regex : "[a-zA-Z_$][a-zA-Z0-9_$]*\\b" |
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58 | }, { |
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59 | token : "keyword.operator", |
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60 | regex : "\\+|\\-|\\/|\\/\\/|%|<@>|@>|<@|&|\\^|~|<|>|<=|=>|==|!=|<>|=" |
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61 | }, { |
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62 | token : "paren.lparen", |
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63 | regex : "[\\(]" |
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64 | }, { |
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65 | token : "paren.rparen", |
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66 | regex : "[\\)]" |
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67 | }, { |
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68 | token : "text", |
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69 | regex : "\\s+" |
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70 | } ] |
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71 | }; |
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72 | this.normalizeRules(); |
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73 | }; |
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74 | |||
75 | oop.inherits(VerilogHighlightRules, TextHighlightRules); |
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76 | |||
77 | exports.VerilogHighlightRules = VerilogHighlightRules; |
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78 | }); |
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79 | |||
80 | ace.define("ace/mode/verilog",["require","exports","module","ace/lib/oop","ace/mode/text","ace/mode/verilog_highlight_rules","ace/range"], function(require, exports, module) { |
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81 | "use strict"; |
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82 | |||
83 | var oop = require("../lib/oop"); |
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84 | var TextMode = require("./text").Mode; |
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85 | var VerilogHighlightRules = require("./verilog_highlight_rules").VerilogHighlightRules; |
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86 | var Range = require("../range").Range; |
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87 | |||
88 | var Mode = function() { |
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89 | this.HighlightRules = VerilogHighlightRules; |
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90 | this.$behaviour = this.$defaultBehaviour; |
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91 | }; |
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92 | oop.inherits(Mode, TextMode); |
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93 | |||
94 | (function() { |
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95 | |||
96 | this.lineCommentStart = "//"; |
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97 | this.blockComment = {start: "/*", end: "*/"}; |
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98 | |||
99 | this.$id = "ace/mode/verilog"; |
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100 | }).call(Mode.prototype); |
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101 | |||
102 | exports.Mode = Mode; |
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103 | |||
104 | }); |