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1 office 1 /***************************************************************************
2 * *
3 * ########### ########### ########## ########## *
4 * ############ ############ ############ ############ *
5 * ## ## ## ## ## ## ## *
6 * ## ## ## ## ## ## ## *
7 * ########### #### ###### ## ## ## ## ###### *
8 * ########### #### # ## ## ## ## # # *
9 * ## ## ###### ## ## ## ## # # *
10 * ## ## # ## ## ## ## # # *
11 * ############ ##### ###### ## ## ## ##### ###### *
12 * ########### ########### ## ## ## ########## *
13 * *
14 * S E C U R E M O B I L E N E T W O R K I N G *
15 * *
16 * This file is part of NexMon. *
17 * *
18 * Copyright (c) 2016 NexMon Team *
19 * *
20 * NexMon is free software: you can redistribute it and/or modify *
21 * it under the terms of the GNU General Public License as published by *
22 * the Free Software Foundation, either version 3 of the License, or *
23 * (at your option) any later version. *
24 * *
25 * NexMon is distributed in the hope that it will be useful, *
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
28 * GNU General Public License for more details. *
29 * *
30 * You should have received a copy of the GNU General Public License *
31 * along with NexMon. If not, see <http://www.gnu.org/licenses/>. *
32 * *
33 **************************************************************************/
34  
35 #include <types.h>
36 #include <bcmcdc.h>
37  
38 /* Most of these structs are taken from the bcm4339 includes file and might currently be wrong */
39  
40 struct wlc_hw_info {
41 struct wlc_info *wlc; /* 0x00 */
42 int PAD; /* 0x04 */
43 int PAD; /* 0x08 */
44 int PAD; /* 0x0c */
45 int PAD; /* 0x10 */
46 struct dma_info *di[6]; /* 0x14 - only 4 bytes */
47 int PAD; // 0x2c
48 int PAD; // 0x30
49 int PAD; // 0x34
50 int PAD; // 0x38
51 int PAD; // 0x3c
52 int PAD; // 0x40
53 int PAD; // 0x44
54 int PAD; // 0x48
55 int PAD; // 0x4c
56 int PAD; // 0x50
57 int PAD; // 0x54
58 int PAD; // 0x58
59 int PAD; // 0x5c
60 int PAD; // 0x60
61 int PAD; // 0x64
62 int PAD; // 0x68
63 int PAD; // 0x6c
64 int PAD; // 0x70
65 char PAD; // 0x74
66 char PAD; // 0x75
67 char ucode_loaded; /* 0x76 */
68 char PAD; /* 0x77 */
69 int PAD; /* 0x78 */
70 int sih; /* 0x7c */
71 int vars; /* 0x80 */
72 int vars_size; /* 0x84 */
73 int PAD; /* 0x88 */
74 int PAD; /* 0x8c */
75 struct d11regs* regs; /* 0x90 verified bcm43596 */
76 int physhim; /* 0x94 */
77 int phy_sh; /* 0x98 */
78 struct wlc_hwband *band; /* 0x9c */
79 int PAD; // 0xa0
80 int PAD; // 0xa4
81 int PAD; // 0xa8
82 int PAD; // 0xac
83 int PAD; // 0xb0
84 char up; // 0xb4
85 char PAD;
86 char PAD;
87 char PAD;
88 };
89  
90 struct wl_rxsts {
91 uint32 pkterror; /* error flags per pkt */
92 uint32 phytype; /* 802.11 A/B/G ... */
93 uint16 chanspec; /* channel spec */
94 uint16 datarate; /* rate in 500kbps (0 for HT frame) */
95 uint8 mcs; /* MCS for HT frame */
96 uint8 htflags; /* HT modulation flags */
97 uint8 PAD;
98 uint8 PAD;
99 uint32 antenna; /* antenna pkts received on */
100 uint32 pktlength; /* pkt length minus bcm phy hdr */
101 uint32 mactime; /* time stamp from mac, count per 1us */
102 uint32 sq; /* signal quality */
103 int32 signal; /* in dBm */
104 int32 noise; /* in dBm */
105 uint32 preamble; /* Unknown, short, long */
106 uint32 encoding; /* Unknown, CCK, PBCC, OFDM, HT */
107 uint32 nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */
108 void *wlif; /* wl interface */
109 } __attribute__((packed));
110  
111 /* status per error RX pkt */
112 #define WL_RXS_CRC_ERROR 0x00000001 /* CRC Error in packet */
113 #define WL_RXS_RUNT_ERROR 0x00000002 /* Runt packet */
114 #define WL_RXS_ALIGN_ERROR 0x00000004 /* Misaligned packet */
115 #define WL_RXS_OVERSIZE_ERROR 0x00000008 /* packet bigger than RX_LENGTH (usually 1518) */
116 #define WL_RXS_WEP_ICV_ERROR 0x00000010 /* Integrity Check Value error */
117 #define WL_RXS_WEP_ENCRYPTED 0x00000020 /* Encrypted with WEP */
118 #define WL_RXS_PLCP_SHORT 0x00000040 /* Short PLCP error */
119 #define WL_RXS_DECRYPT_ERR 0x00000080 /* Decryption error */
120 #define WL_RXS_OTHER_ERR 0x80000000 /* Other errors */
121  
122 /* phy type */
123 #define WL_RXS_PHY_A 0x00000000 /* A phy type */
124 #define WL_RXS_PHY_B 0x00000001 /* B phy type */
125 #define WL_RXS_PHY_G 0x00000002 /* G phy type */
126 #define WL_RXS_PHY_N 0x00000004 /* N phy type */
127  
128 /* encoding */
129 #define WL_RXS_ENCODING_UNKNOWN 0x00000000
130 #define WL_RXS_ENCODING_DSSS_CCK 0x00000001 /* DSSS/CCK encoding (1, 2, 5.5, 11) */
131 #define WL_RXS_ENCODING_OFDM 0x00000002 /* OFDM encoding */
132 #define WL_RXS_ENCODING_HT 0x00000003 /* HT encoding */
133 #define WL_RXS_ENCODING_AC 0x00000004 /* HT encoding */
134  
135 /* preamble */
136 #define WL_RXS_UNUSED_STUB 0x0 /* stub to match with wlc_ethereal.h */
137 #define WL_RXS_PREAMBLE_SHORT 0x00000001 /* Short preamble */
138 #define WL_RXS_PREAMBLE_LONG 0x00000002 /* Long preamble */
139 #define WL_RXS_PREAMBLE_HT_MM 0x00000003 /* HT mixed mode preamble */
140 #define WL_RXS_PREAMBLE_HT_GF 0x00000004 /* HT green field preamble */
141  
142 /* htflags */
143 #define WL_RXS_HTF_40 0x01
144 #define WL_RXS_HTF_20L 0x02
145 #define WL_RXS_HTF_20U 0x04
146 #define WL_RXS_HTF_SGI 0x08
147 #define WL_RXS_HTF_STBC_MASK 0x30
148 #define WL_RXS_HTF_STBC_SHIFT 4
149 #define WL_RXS_HTF_LDPC 0x40
150  
151 #define WL_RXS_NFRM_AMPDU_FIRST 0x00000001 /* first MPDU in A-MPDU */
152 #define WL_RXS_NFRM_AMPDU_SUB 0x00000002 /* subsequent MPDU(s) in A-MPDU */
153 #define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */
154 #define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */
155  
156 struct osl_info {
157 unsigned int pktalloced;
158 int PAD[1];
159 void *callback_when_dropped;
160 unsigned int bustype;
161 } __attribute__((packed));
162  
163 typedef struct sk_buff {
164 int field0; /* 0x00 */
165 int field4; /* 0x04 */
166 void *data; /* 0x08 */
167 short len; /* 0x0C */
168 short fieldE; // 0x0E
169 int field10; // 0x10
170 unsigned short next; // 0x14
171 unsigned short prev; // 0x16
172 unsigned short prev2; // 0x18
173 unsigned short prev3; // 0x1A
174 int PAD; // 0x1C
175 char byte20; // 0x20
176 char PAD; // 0x21
177 char PAD; // 0x22
178 char byte23; // 0x23
179 int PAD; // 0x24
180 int PAD; // 0x28
181 int dword2C; // 0x2C
182 } __attribute__((packed)) sk_buff;
183  
184 #define HNDRTE_DEV_NAME_MAX 16
185  
186 typedef struct hndrte_dev {
187 char name[HNDRTE_DEV_NAME_MAX];
188 struct hndrte_devfuncs *funcs;
189 uint32 devid;
190 void *softc; /* Software context */
191 uint32 flags; /* RTEDEVFLAG_XXXX */
192 struct hndrte_dev *next;
193 struct hndrte_dev *chained;
194 void *pdev;
195 } hndrte_dev;
196  
197 struct hndrte_devfuncs {
198 void *(*probe)(struct hndrte_dev *dev, void *regs, uint bus,
199 uint16 device, uint coreid, uint unit);
200 int (*open)(struct hndrte_dev *dev);
201 int (*close)(struct hndrte_dev *dev);
202 int (*xmit)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
203 int (*recv)(struct hndrte_dev *src, struct hndrte_dev *dev, void *pkt);
204 int (*ioctl)(struct hndrte_dev *dev, uint32 cmd, void *buffer, int len,
205 int *used, int *needed, int set);
206 void (*txflowcontrol) (struct hndrte_dev *dev, bool state, int prio);
207 void (*poll)(struct hndrte_dev *dev);
208 int (*xmit_ctl)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
209 int (*xmit2)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb, int8 ch);
210 };
211  
212 struct tunables {
213 char gap[62];
214 short somebnd; // @ 0x38
215 short rxbnd; // @ 0x40
216 };
217  
218 struct wlc_hwband {
219 int bandtype; /* 0x00 */
220 int bandunit; /* 0x04 */
221 char mhfs; /* 0x05 */
222 char PAD[10]; /* 0x06 */
223 char bandhw_stf_ss_mode; /* 0x13 */
224 short CWmin; /* 0x14 */
225 short CWmax; /* 0x16 */
226 int core_flags; /* 0x18 */
227 short phytype; /* 0x1C */
228 short phyrev; /* 0x1E */
229 short radioid; /* 0x20 */
230 short radiorev; /* 0x22 */
231 void *pi; /* 0x24 */
232 char abgphy_encore; /* 0x25 */
233 };
234  
235 /**
236 * Name might be inaccurate
237 */
238 struct device {
239 char name[16];
240 void *init_function;
241 int PAD;
242 void *some_device_info;
243 int PAD;
244 int PAD;
245 struct device *bound_device;
246 };
247  
248 /**
249 * Name might be inaccurate
250 */
251 struct wl_info {
252 int unit;
253 struct wlc_pub *pub;
254 struct wlc_info *wlc;
255 struct wlc_hw_info *wlc_hw; // 0xC
256 struct hndrte_dev *dev; // 0x10
257 };
258  
259 /**
260 * Name might be inaccurate
261 */
262 struct sdiox_info {
263 int unit;
264 void *something;
265 void *sdio; // sdio_info struct
266 void *osh;
267 void *device_address;
268 } __attribute__((packed));
269  
270 struct wlcband {
271 int bandtype; /* 0x000 */
272 int bandunit; /* 0x004 */
273 short phytype; /* 0x008 */
274 short phyrev; /* 0x00A */
275 short radioid; /* 0x00C */
276 short radiorev; /* 0x00E */
277 void *pi; /* 0x010 */
278 char abgphy_encore; /* 0x014 */
279 char gmode; /* 0x015 */
280 char PAD; /* 0x016 */
281 char PAD; /* 0x017 */
282 void *hwrs_scb; /* 0x018 */
283 int defrateset; /* 0x01C */
284 int rspec_override; /* 0x020 */
285 int mrspec_override; /* 0x024 */
286 char band_stf_ss_mode; /* 0x028 */
287 char band_stf_stbc_tx; /* 0x029 */
288 int hw_rateset; /* 0x030 */
289 char basic_rate; /* 0x034 */
290 } __attribute__((packed));
291  
292 struct wlc_info {
293 struct wlc_pub *pub; /* 0x000 */
294 struct osl_info *osh; /* 0x004 */
295 struct wl_info *wl; /* 0x008 */
296 volatile struct d11regs *regs; /* 0x00C */
297 struct wlc_hw_info *hw; /* 0x010 */
298 int PAD; /* 0x014 */
299 int PAD; /* 0x018 */
300 void *core; /* 0x01C */
301 int PAD; /* 0x020 */
302 int PAD; /* 0x024 */
303 int PAD; /* 0x028 */
304 struct wlcband *band; /* 0x02C */
305 int PAD; /* 0x030 */
306 int PAD; /* 0x034 */
307 int PAD; /* 0x038 */
308 int PAD; /* 0x03C */
309 int PAD; /* 0x040 */
310 int PAD; /* 0x044 */
311 int PAD; /* 0x048 */
312 int PAD; /* 0x04C */
313 int PAD; /* 0x050 */
314 int PAD; /* 0x054 */
315 int PAD; /* 0x058 */
316 int PAD; /* 0x05C */
317 int PAD; /* 0x060 */
318 int PAD; /* 0x064 */
319 int PAD; /* 0x068 */
320 int PAD; /* 0x06C */
321 int PAD; /* 0x070 */
322 int PAD; /* 0x074 */
323 int PAD; /* 0x078 */
324 int PAD; /* 0x07C */
325 int PAD; /* 0x080 */
326 int PAD; /* 0x084 */
327 int PAD; /* 0x088 */
328 int PAD; /* 0x08C */
329 int PAD; /* 0x090 */
330 int PAD; /* 0x094 */
331 int PAD; /* 0x098 */
332 int PAD; /* 0x09C */
333 int PAD; /* 0x0A0 */
334 int PAD; /* 0x0A4 */
335 int PAD; /* 0x0A8 */
336 int PAD; /* 0x0AC */
337 int PAD; /* 0x0B0 */
338 int PAD; /* 0x0B4 */
339 int PAD; /* 0x0B8 */
340 int PAD; /* 0x0BC */
341 int PAD; /* 0x0C0 */
342 int PAD; /* 0x0C4 */
343 int PAD; /* 0x0C8 */
344 int PAD; /* 0x0CC */
345 int PAD; /* 0x0D0 */
346 int PAD; /* 0x0D4 */
347 int PAD; /* 0x0D8 */
348 int PAD; /* 0x0DC */
349 int PAD; /* 0x0E0 */
350 int PAD; /* 0x0E4 */
351 int PAD; /* 0x0E8 */
352 int PAD; /* 0x0EC */
353 int PAD; /* 0x0F0 */
354 int PAD; /* 0x0F4 */
355 int PAD; /* 0x0F8 */
356 int PAD; /* 0x0FC */
357 int PAD; /* 0x100 */
358 int PAD; /* 0x104 */
359 int PAD; /* 0x108 */
360 int PAD; /* 0x10C */
361 int PAD; /* 0x110 */
362 int PAD; /* 0x114 */
363 int PAD; /* 0x118 */
364 int PAD; /* 0x11C */
365 int PAD; /* 0x120 */
366 int PAD; /* 0x124 */
367 int PAD; /* 0x128 */
368 int PAD; /* 0x12C */
369 int PAD; /* 0x130 */
370 int PAD; /* 0x134 */
371 int PAD; /* 0x138 */
372 int PAD; /* 0x13C */
373 int PAD; /* 0x140 */
374 int PAD; /* 0x144 */
375 int PAD; /* 0x148 */
376 int PAD; /* 0x14C */
377 int PAD; /* 0x150 */
378 int PAD; /* 0x154 */
379 int PAD; /* 0x158 */
380 void *cmi; /* 0x15C */
381 int PAD; /* 0x160 */
382 int PAD; /* 0x164 */
383 int PAD; /* 0x168 */
384 int PAD; /* 0x16C */
385 int PAD; /* 0x170 */
386 int PAD; /* 0x174 */
387 int PAD; /* 0x178 */
388 int PAD; /* 0x17C */
389 int PAD; /* 0x180 */
390 int PAD; /* 0x184 */
391 int PAD; /* 0x188 */
392 int PAD; /* 0x18C */
393 int PAD; /* 0x190 */
394 int PAD; /* 0x194 */
395 int PAD; /* 0x198 */
396 int PAD; /* 0x19C */
397 int PAD; /* 0x1A0 */
398 int PAD; /* 0x1A4 */
399 int PAD; /* 0x1A8 */
400 int PAD; /* 0x1AC */
401 int PAD; /* 0x1B0 */
402 int PAD; /* 0x1B4 */
403 int PAD; /* 0x1B8 */
404 int PAD; /* 0x1BC */
405 int PAD; /* 0x1C0 */
406 int PAD; /* 0x1C4 */
407 short PAD; /* 0x1C8 */
408 char bandlocked; /* 0x1CA */
409 char field_1CB; /* 0x1CB */
410 int PAD; /* 0x1CC */
411 int PAD; /* 0x1D0 */
412 int PAD; /* 0x1D4 */
413 int PAD; /* 0x1D8 */
414 int PAD; /* 0x1DC */
415 int PAD; /* 0x1E0 */
416 int PAD; /* 0x1E4 */
417 int PAD; /* 0x1E8 */
418 int PAD; /* 0x1EC */
419 int PAD; /* 0x1F0 */
420 int PAD; /* 0x1F4 */
421 int PAD; /* 0x1F8 */
422 int PAD; /* 0x1FC */
423 int PAD; /* 0x200 */
424 int PAD; /* 0x204 */
425 int monitor; /* 0x208 */
426 int bcnmisc_ibss; /* 0x20C */
427 int bcnmisc_scan; /* 0x210 */
428 int bcnmisc_monitor; /* 0x214 */
429 int PAD; /* 0x218 */
430 int PAD; /* 0x21C */
431 int PAD; /* 0x220 */
432 int PAD; /* 0x224 */
433 short PAD; /* 0x228 */
434 short wme_dp; /* 0x22A */
435 int PAD; /* 0x22C */
436 int PAD; /* 0x230 */
437 int PAD; /* 0x234 */
438 int PAD; /* 0x238 */
439 int PAD; /* 0x23C */
440 int PAD; /* 0x240 */
441 int PAD; /* 0x244 */
442 int PAD; /* 0x248 */
443 unsigned short tx_prec_map; /* 0x24C */
444 short PAD; /* 0x24E */
445 int PAD; /* 0x250 */
446 int PAD; /* 0x254 */
447 int PAD; /* 0x258 */
448 int PAD; /* 0x25C */
449 int PAD; /* 0x260 */
450 int PAD; /* 0x264 */
451 int PAD; /* 0x268 */
452 int PAD; /* 0x26C */
453 int PAD; /* 0x270 */
454 int PAD; /* 0x274 */
455 int PAD; /* 0x278 */
456 int PAD; /* 0x27C */
457 int PAD; /* 0x280 */
458 int PAD; /* 0x284 */
459 int PAD; /* 0x288 */
460 int PAD; /* 0x28C */
461 int PAD; /* 0x290 */
462 int PAD; /* 0x294 */
463 int PAD; /* 0x298 */
464 int PAD; /* 0x29C */
465 int PAD; /* 0x2A0 */
466 int PAD; /* 0x2A4 */
467 int PAD; /* 0x2A8 */
468 int PAD; /* 0x2AC */
469 int PAD; /* 0x2B0 */
470 int PAD; /* 0x2B4 */
471 int PAD; /* 0x2B8 */
472 int PAD; /* 0x2BC */
473 int PAD; /* 0x2C0 */
474 int PAD; /* 0x2C4 */
475 int PAD; /* 0x2C8 */
476 int PAD; /* 0x2CC */
477 int PAD; /* 0x2D0 */
478 int PAD; /* 0x2D4 */
479 int PAD; /* 0x2D8 */
480 int PAD; /* 0x2DC */
481 int PAD; /* 0x2E0 */
482 int PAD; /* 0x2E4 */
483 int PAD; /* 0x2E8 */
484 int PAD; /* 0x2EC */
485 int PAD; /* 0x2F0 */
486 int PAD; /* 0x2F4 */
487 int PAD; /* 0x2F8 */
488 int PAD; /* 0x2FC */
489 int PAD; /* 0X300 */
490 int PAD; /* 0X304 */
491 int PAD; /* 0X308 */
492 int PAD; /* 0X30C */
493 int PAD; /* 0X310 */
494 int PAD; /* 0X314 */
495 int PAD; /* 0X318 */
496 int PAD; /* 0X31C */
497 int PAD; /* 0X320 */
498 int PAD; /* 0X324 */
499 int PAD; /* 0X328 */
500 int PAD; /* 0X32C */
501 int PAD; /* 0X330 */
502 int PAD; /* 0X334 */
503 int PAD; /* 0X338 */
504 void *scan_results; /* 0X33C */
505 int PAD; /* 0X340 */
506 void *custom_scan_results; /* 0X344 */
507 int PAD; /* 0X348 */
508 int PAD; /* 0X34C */
509 int PAD; /* 0X350 */
510 int PAD; /* 0X354 */
511 int PAD; /* 0X358 */
512 int PAD; /* 0X35C */
513 int PAD; /* 0X360 */
514 short *field_364; /* 0X364 */
515 int PAD; /* 0X368 */
516 int PAD; /* 0X36C */
517 int PAD; /* 0X370 */
518 int PAD; /* 0X374 */
519 int PAD; /* 0X378 */
520 int PAD; /* 0X37C */
521 int PAD; /* 0X380 */
522 int PAD; /* 0X384 */
523 int PAD; /* 0X388 */
524 int PAD; /* 0X38C */
525 int PAD; /* 0X390 */
526 int PAD; /* 0X394 */
527 int PAD; /* 0X398 */
528 int PAD; /* 0X39C */
529 int PAD; /* 0X3A0 */
530 int PAD; /* 0X3A4 */
531 int PAD; /* 0X3A8 */
532 int PAD; /* 0X3AC */
533 int PAD; /* 0X3B0 */
534 int PAD; /* 0X3B4 */
535 int PAD; /* 0X3B8 */
536 int PAD; /* 0X3BC */
537 int PAD; /* 0X3C0 */
538 int PAD; /* 0X3C4 */
539 int PAD; /* 0X3C8 */
540 int PAD; /* 0X3CC */
541 int PAD; /* 0X3D0 */
542 int PAD; /* 0X3D4 */
543 int PAD; /* 0X3D8 */
544 int PAD; /* 0X3DC */
545 int PAD; /* 0X3E0 */
546 int PAD; /* 0X3E4 */
547 int PAD; /* 0X3E8 */
548 int PAD; /* 0X3EC */
549 int PAD; /* 0X3F0 */
550 int PAD; /* 0X3F4 */
551 int PAD; /* 0X3F8 */
552 int PAD; /* 0X3FC */
553 int PAD; /* 0X400 */
554 int PAD; /* 0X404 */
555 int PAD; /* 0X408 */
556 int PAD; /* 0X40C */
557 int PAD; /* 0X410 */
558 int PAD; /* 0X414 */
559 int PAD; /* 0X418 */
560 int PAD; /* 0X41C */
561 int PAD; /* 0X420 */
562 int PAD; /* 0X424 */
563 int PAD; /* 0X428 */
564 int PAD; /* 0X42C */
565 int PAD; /* 0X430 */
566 int PAD; /* 0X434 */
567 int PAD; /* 0X438 */
568 int PAD; /* 0X43C */
569 int PAD; /* 0X440 */
570 int PAD; /* 0X444 */
571 int PAD; /* 0X448 */
572 int PAD; /* 0X44C */
573 int PAD; /* 0X450 */
574 int PAD; /* 0X454 */
575 int PAD; /* 0X458 */
576 int PAD; /* 0X45C */
577 int PAD; /* 0X460 */
578 int PAD; /* 0X464 */
579 int PAD; /* 0X468 */
580 int PAD; /* 0X46C */
581 int PAD; /* 0X470 */
582 int PAD; /* 0X474 */
583 int PAD; /* 0X478 */
584 int PAD; /* 0X47C */
585 int PAD; /* 0X480 */
586 int PAD; /* 0X484 */
587 int PAD; /* 0X488 */
588 int PAD; /* 0X48C */
589 int PAD; /* 0X490 */
590 int PAD; /* 0X494 */
591 int PAD; /* 0X498 */
592 int PAD; /* 0X49C */
593 int PAD; /* 0X4A0 */
594 int PAD; /* 0X4A4 */
595 int PAD; /* 0X4A8 */
596 int PAD; /* 0X4AC */
597 int PAD; /* 0X4B0 */
598 int PAD; /* 0X4B4 */
599 int PAD; /* 0X4B8 */
600 int PAD; /* 0X4BC */
601 int PAD; /* 0X4C0 */
602 int PAD; /* 0X4C4 */
603 int PAD; /* 0X4C8 */
604 int PAD; /* 0X4CC */
605 int PAD; /* 0X4D0 */
606 int PAD; /* 0X4D4 */
607 int PAD; /* 0X4D8 */
608 int PAD; /* 0X4DC */
609 int PAD; /* 0X4E0 */
610 int PAD; /* 0X4E4 */
611 int PAD; /* 0X4E8 */
612 int PAD; /* 0X4EC */
613 int PAD; /* 0X4F0 */
614 int PAD; /* 0X4F4 */
615 int PAD; /* 0X4F8 */
616 int PAD; /* 0X4FC */
617 int PAD; /* 0X500 */
618 int PAD; /* 0X504 */
619 int PAD; /* 0X508 */
620 int PAD; /* 0X50C */
621 short some_chanspec; /* 0X510 */
622 short PAD; /* 0X512 */
623 int PAD; /* 0X514 */
624 int PAD; /* 0X518 */
625 int PAD; /* 0X51C */
626 int PAD; /* 0X520 */
627 int PAD; /* 0X524 */
628 int PAD; /* 0X528 */
629 int PAD; /* 0X52C */
630 int PAD; /* 0X530 */
631 int PAD; /* 0X534 */
632 int PAD; /* 0X538 */
633 int PAD; /* 0X53C */
634 int PAD; /* 0X540 */
635 int PAD; /* 0X544 */
636 int PAD; /* 0X548 */
637 int PAD; /* 0X54C */
638 void *active_queue; /* 0X550 veryfied for bcm43596a0 by seraching for "Active Q" */
639 void *primary_queue; /* 0X554 veryfied for bcm43596a0 by seraching for "Active Q" */
640 void *excursion_queue; /* 0X558 veryfied for bcm43596a0 by seraching for "Active Q" */
641 int PAD; /* 0X55C */
642 int PAD; /* 0X560 */
643 int PAD; /* 0X564 */
644 int PAD; /* 0X568 */
645 int PAD; /* 0X56C */
646 int PAD; /* 0X570 */
647 int PAD; /* 0X574 */
648 int PAD; /* 0X578 */
649 int PAD; /* 0X57C */
650 int PAD; /* 0X580 */
651 int PAD; /* 0X584 */
652 int PAD; /* 0X588 */
653 int PAD; /* 0X58C */
654 int PAD; /* 0X590 */
655 int PAD; /* 0X594 */
656 int PAD; /* 0X598 */
657 int PAD; /* 0X59C */
658 int PAD; /* 0X5A0 */
659 int PAD; /* 0X5A4 */
660 int PAD; /* 0X5A8 */
661 int PAD; /* 0X5AC */
662 int PAD; /* 0X5B0 */
663 int PAD; /* 0X5B4 */
664 int PAD; /* 0X5B8 */
665 int PAD; /* 0X5BC */
666 int PAD; /* 0X5C0 */
667 int PAD; /* 0X5C4 */
668 int PAD; /* 0X5C8 */
669 int PAD; /* 0X5CC */
670 int PAD; /* 0X5D0 */
671 int PAD; /* 0X5D4 */
672 int PAD; /* 0X5D8 */
673 int PAD; /* 0X5DC */
674 int PAD; /* 0X5E0 */
675 int PAD; /* 0X5E4 */
676 int PAD; /* 0X5E8 */
677 int PAD; /* 0X5EC */
678 int PAD; /* 0X5F0 */
679 int PAD; /* 0X5F4 */
680 int PAD; /* 0X5F8 */
681 int PAD; /* 0X5FC */
682 };
683  
684 struct wlc_pub {
685 struct wlc_info *wlc; /* 0x000 */
686 int PAD; /* 0x004 */
687 int PAD; /* 0x008 */
688 int PAD; /* 0x00C */
689 int PAD; /* 0x010 */
690 void *osh; /* 0x014 */
691 int PAD; /* 0x018 */
692 int PAD; /* 0x01C */
693 int PAD; /* 0x020 */
694 char up_maybe; /* 0x024 */
695 char field_25; /* 0x025 */
696 char field_26; /* 0x026 */
697 char field_27; /* 0x027 */
698 struct tunables *tunables; /* 0x028 */
699 int PAD; /* 0x02C */
700 int field_30; /* 0x030 */
701 int PAD; /* 0x034 */
702 int PAD; /* 0x038 */
703 int PAD; /* 0x03C */
704 int PAD; /* 0x040 */
705 char PAD; /* 0x044 */
706 char PAD; /* 0x045 */
707 char field_46; /* 0x046 */
708 char PAD; /* 0x047 */
709 int PAD; /* 0x048 */
710 char associated; /* 0x04C */
711 char PAD; /* 0x04D */
712 char PAD; /* 0x04E */
713 char PAD; /* 0x04F */
714 int PAD; /* 0x050 */
715 char gap2[147];
716 char is_amsdu; // @ 0xe7
717 } __attribute__((packed));
718  
719 struct wlc_bsscfg {
720 void *wlc; /* 0x000 */
721 char associated; /* 0x004 */
722 char PAD; /* 0x005 */
723 char PAD; /* 0x006 */
724 char PAD; /* 0x007 */
725 int PAD; /* 0x008 */
726 int PAD; /* 0x00C */
727 int PAD; /* 0x010 */
728 int PAD; /* 0x014 */
729 int PAD; /* 0x018 */
730 int PAD; /* 0x01C */
731 int PAD; /* 0x020 */
732 int PAD; /* 0x024 */
733 int PAD; /* 0x028 */
734 int PAD; /* 0x02C */
735 int PAD; /* 0x030 */
736 int PAD; /* 0x034 */
737 int PAD; /* 0x038 */
738 int PAD; /* 0x03C */
739 int PAD; /* 0x040 */
740 int PAD; /* 0x044 */
741 int PAD; /* 0x048 */
742 int PAD; /* 0x04C */
743 int PAD; /* 0x050 */
744 int PAD; /* 0x054 */
745 int PAD; /* 0x058 */
746 int PAD; /* 0x05C */
747 int PAD; /* 0x060 */
748 int PAD; /* 0x064 */
749 int PAD; /* 0x068 */
750 int PAD; /* 0x06C */
751 int PAD; /* 0x070 */
752 int PAD; /* 0x074 */
753 int PAD; /* 0x078 */
754 int PAD; /* 0x07C */
755 int PAD; /* 0x080 */
756 int PAD; /* 0x084 */
757 int PAD; /* 0x088 */
758 int PAD; /* 0x08C */
759 int PAD; /* 0x090 */
760 int PAD; /* 0x094 */
761 int PAD; /* 0x098 */
762 int PAD; /* 0x09C */
763 int PAD; /* 0x0A0 */
764 int PAD; /* 0x0A4 */
765 int PAD; /* 0x0A8 */
766 int PAD; /* 0x0AC */
767 int PAD; /* 0x0B0 */
768 int PAD; /* 0x0B4 */
769 int PAD; /* 0x0B8 */
770 int PAD; /* 0x0BC */
771 int PAD; /* 0x0C0 */
772 int PAD; /* 0x0C4 */
773 int PAD; /* 0x0C8 */
774 int PAD; /* 0x0CC */
775 int PAD; /* 0x0D0 */
776 int PAD; /* 0x0D4 */
777 int PAD; /* 0x0D8 */
778 int PAD; /* 0x0DC */
779 int PAD; /* 0x0E0 */
780 int PAD; /* 0x0E4 */
781 int PAD; /* 0x0E8 */
782 int PAD; /* 0x0EC */
783 int PAD; /* 0x0F0 */
784 int PAD; /* 0x0F4 */
785 int PAD; /* 0x0F8 */
786 int PAD; /* 0x0FC */
787 int PAD; /* 0x100 */
788 int PAD; /* 0x104 */
789 int PAD; /* 0x108 */
790 int PAD; /* 0x10C */
791 int PAD; /* 0x110 */
792 int PAD; /* 0x114 */
793 int PAD; /* 0x118 */
794 int PAD; /* 0x11C */
795 int PAD; /* 0x120 */
796 int PAD; /* 0x124 */
797 int PAD; /* 0x128 */
798 int PAD; /* 0x12C */
799 int PAD; /* 0x130 */
800 int PAD; /* 0x134 */
801 int PAD; /* 0x138 */
802 int PAD; /* 0x13C */
803 int PAD; /* 0x140 */
804 int PAD; /* 0x144 */
805 int PAD; /* 0x148 */
806 int PAD; /* 0x14C */
807 int PAD; /* 0x150 */
808 int PAD; /* 0x154 */
809 int PAD; /* 0x158 */
810 int PAD; /* 0x15C */
811 int PAD; /* 0x160 */
812 int PAD; /* 0x164 */
813 int PAD; /* 0x168 */
814 int PAD; /* 0x16C */
815 int PAD; /* 0x170 */
816 int PAD; /* 0x174 */
817 int PAD; /* 0x178 */
818 int PAD; /* 0x17C */
819 int PAD; /* 0x180 */
820 int PAD; /* 0x184 */
821 int PAD; /* 0x188 */
822 int PAD; /* 0x18C */
823 int PAD; /* 0x190 */
824 int PAD; /* 0x194 */
825 int PAD; /* 0x198 */
826 int PAD; /* 0x19C */
827 int PAD; /* 0x1A0 */
828 int PAD; /* 0x1A4 */
829 int PAD; /* 0x1A8 */
830 int PAD; /* 0x1AC */
831 int PAD; /* 0x1B0 */
832 int PAD; /* 0x1B4 */
833 int PAD; /* 0x1B8 */
834 int PAD; /* 0x1BC */
835 int PAD; /* 0x1C0 */
836 int PAD; /* 0x1C4 */
837 int PAD; /* 0x1C8 */
838 int PAD; /* 0x1CC */
839 int PAD; /* 0x1D0 */
840 int PAD; /* 0x1D4 */
841 int PAD; /* 0x1D8 */
842 int PAD; /* 0x1DC */
843 int PAD; /* 0x1E0 */
844 int PAD; /* 0x1E4 */
845 int PAD; /* 0x1E8 */
846 int PAD; /* 0x1EC */
847 int PAD; /* 0x1F0 */
848 int PAD; /* 0x1F4 */
849 int PAD; /* 0x1F8 */
850 int PAD; /* 0x1FC */
851 int PAD; /* 0x200 */
852 int PAD; /* 0x204 */
853 int PAD; /* 0x208 */
854 int PAD; /* 0x20C */
855 int PAD; /* 0x210 */
856 int PAD; /* 0x214 */
857 int PAD; /* 0x218 */
858 int PAD; /* 0x21C */
859 int PAD; /* 0x220 */
860 int PAD; /* 0x224 */
861 int PAD; /* 0x228 */
862 int PAD; /* 0x22C */
863 int PAD; /* 0x230 */
864 int PAD; /* 0x234 */
865 int PAD; /* 0x238 */
866 int PAD; /* 0x23C */
867 int PAD; /* 0x240 */
868 int PAD; /* 0x244 */
869 int PAD; /* 0x248 */
870 int PAD; /* 0x24C */
871 int PAD; /* 0x250 */
872 int PAD; /* 0x254 */
873 int PAD; /* 0x258 */
874 int PAD; /* 0x25C */
875 int PAD; /* 0x260 */
876 int PAD; /* 0x264 */
877 int PAD; /* 0x268 */
878 int PAD; /* 0x26C */
879 int PAD; /* 0x270 */
880 int PAD; /* 0x274 */
881 int PAD; /* 0x278 */
882 int PAD; /* 0x27C */
883 int PAD; /* 0x280 */
884 int PAD; /* 0x284 */
885 int PAD; /* 0x288 */
886 int PAD; /* 0x28C */
887 int PAD; /* 0x290 */
888 int PAD; /* 0x294 */
889 int PAD; /* 0x298 */
890 int PAD; /* 0x29C */
891 int PAD; /* 0x2A0 */
892 int PAD; /* 0x2A4 */
893 int PAD; /* 0x2A8 */
894 int PAD; /* 0x2AC */
895 int PAD; /* 0x2B0 */
896 int PAD; /* 0x2B4 */
897 int PAD; /* 0x2B8 */
898 int PAD; /* 0x2BC */
899 int PAD; /* 0x2C0 */
900 int PAD; /* 0x2C4 */
901 int PAD; /* 0x2C8 */
902 int PAD; /* 0x2CC */
903 int PAD; /* 0x2D0 */
904 int PAD; /* 0x2D4 */
905 int PAD; /* 0x2D8 */
906 int PAD; /* 0x2DC */
907 int PAD; /* 0x2E0 */
908 int PAD; /* 0x2E4 */
909 int PAD; /* 0x2E8 */
910 int PAD; /* 0x2EC */
911 int PAD; /* 0x2F0 */
912 int PAD; /* 0x2F4 */
913 int PAD; /* 0x2F8 */
914 int PAD; /* 0x2FC */
915 int PAD; /* 0X300 */
916 int PAD; /* 0X304 */
917 int PAD; /* 0X308 */
918 int PAD; /* 0X30C */
919 int PAD; /* 0X310 */
920 int PAD; /* 0X314 */
921 int PAD; /* 0X318 */
922 int PAD; /* 0X31C */
923 int PAD; /* 0X320 */
924 int PAD; /* 0X324 */
925 int PAD; /* 0X328 */
926 int PAD; /* 0X32C */
927 int PAD; /* 0X330 */
928 int PAD; /* 0X334 */
929 int PAD; /* 0X338 */
930 int PAD; /* 0X33C */
931 int PAD; /* 0X340 */
932 int PAD; /* 0X344 */
933 int PAD; /* 0X348 */
934 int PAD; /* 0X34C */
935 int PAD; /* 0X350 */
936 int PAD; /* 0X354 */
937 int PAD; /* 0X358 */
938 int PAD; /* 0X35C */
939 int PAD; /* 0X360 */
940 int PAD; /* 0X364 */
941 int PAD; /* 0X368 */
942 int PAD; /* 0X36C */
943 int PAD; /* 0X370 */
944 int PAD; /* 0X374 */
945 int PAD; /* 0X378 */
946 int PAD; /* 0X37C */
947 int PAD; /* 0X380 */
948 int PAD; /* 0X384 */
949 int PAD; /* 0X388 */
950 int PAD; /* 0X38C */
951 int PAD; /* 0X390 */
952 int PAD; /* 0X394 */
953 int PAD; /* 0X398 */
954 int PAD; /* 0X39C */
955 int PAD; /* 0X3A0 */
956 int PAD; /* 0X3A4 */
957 int PAD; /* 0X3A8 */
958 int PAD; /* 0X3AC */
959 int PAD; /* 0X3B0 */
960 int PAD; /* 0X3B4 */
961 int PAD; /* 0X3B8 */
962 int PAD; /* 0X3BC */
963 int PAD; /* 0X3C0 */
964 int PAD; /* 0X3C4 */
965 int PAD; /* 0X3C8 */
966 int PAD; /* 0X3CC */
967 int PAD; /* 0X3D0 */
968 int PAD; /* 0X3D4 */
969 int PAD; /* 0X3D8 */
970 int PAD; /* 0X3DC */
971 int PAD; /* 0X3E0 */
972 int PAD; /* 0X3E4 */
973 int PAD; /* 0X3E8 */
974 int PAD; /* 0X3EC */
975 int PAD; /* 0X3F0 */
976 int PAD; /* 0X3F4 */
977 int PAD; /* 0X3F8 */
978 int PAD; /* 0X3FC */
979 int PAD; /* 0X400 */
980 int PAD; /* 0X404 */
981 int PAD; /* 0X408 */
982 int PAD; /* 0X40C */
983 int PAD; /* 0X410 */
984 int PAD; /* 0X414 */
985 int PAD; /* 0X418 */
986 int PAD; /* 0X41C */
987 int PAD; /* 0X420 */
988 int PAD; /* 0X424 */
989 int PAD; /* 0X428 */
990 int PAD; /* 0X42C */
991 int PAD; /* 0X430 */
992 int PAD; /* 0X434 */
993 int PAD; /* 0X438 */
994 int PAD; /* 0X43C */
995 int PAD; /* 0X440 */
996 int PAD; /* 0X444 */
997 int PAD; /* 0X448 */
998 int PAD; /* 0X44C */
999 int PAD; /* 0X450 */
1000 int PAD; /* 0X454 */
1001 int PAD; /* 0X458 */
1002 int PAD; /* 0X45C */
1003 int PAD; /* 0X460 */
1004 int PAD; /* 0X464 */
1005 int PAD; /* 0X468 */
1006 int PAD; /* 0X46C */
1007 int PAD; /* 0X470 */
1008 int PAD; /* 0X474 */
1009 int PAD; /* 0X478 */
1010 int PAD; /* 0X47C */
1011 int PAD; /* 0X480 */
1012 int PAD; /* 0X484 */
1013 int PAD; /* 0X488 */
1014 int PAD; /* 0X48C */
1015 int PAD; /* 0X490 */
1016 int PAD; /* 0X494 */
1017 int PAD; /* 0X498 */
1018 int PAD; /* 0X49C */
1019 int PAD; /* 0X4A0 */
1020 int PAD; /* 0X4A4 */
1021 int PAD; /* 0X4A8 */
1022 int PAD; /* 0X4AC */
1023 int PAD; /* 0X4B0 */
1024 int PAD; /* 0X4B4 */
1025 int PAD; /* 0X4B8 */
1026 int PAD; /* 0X4BC */
1027 int PAD; /* 0X4C0 */
1028 int PAD; /* 0X4C4 */
1029 int PAD; /* 0X4C8 */
1030 int PAD; /* 0X4CC */
1031 int PAD; /* 0X4D0 */
1032 int PAD; /* 0X4D4 */
1033 int PAD; /* 0X4D8 */
1034 int PAD; /* 0X4DC */
1035 int PAD; /* 0X4E0 */
1036 int PAD; /* 0X4E4 */
1037 int PAD; /* 0X4E8 */
1038 int PAD; /* 0X4EC */
1039 int PAD; /* 0X4F0 */
1040 int PAD; /* 0X4F4 */
1041 int PAD; /* 0X4F8 */
1042 int PAD; /* 0X4FC */
1043 int PAD; /* 0X500 */
1044 int PAD; /* 0X504 */
1045 int PAD; /* 0X508 */
1046 int PAD; /* 0X50C */
1047 int PAD; /* 0X510 */
1048 int PAD; /* 0X514 */
1049 int PAD; /* 0X518 */
1050 int PAD; /* 0X51C */
1051 int PAD; /* 0X520 */
1052 int PAD; /* 0X524 */
1053 int PAD; /* 0X528 */
1054 int PAD; /* 0X52C */
1055 int PAD; /* 0X530 */
1056 int PAD; /* 0X534 */
1057 int PAD; /* 0X538 */
1058 int PAD; /* 0X53C */
1059 int PAD; /* 0X540 */
1060 short PAD; /* 0X544 */
1061 short field_546; /* 0X546 */
1062 int PAD; /* 0X548 */
1063 int PAD; /* 0X54C */
1064 int PAD; /* 0X550 */
1065 int PAD; /* 0X554 */
1066 int PAD; /* 0X558 */
1067 int PAD; /* 0X55C */
1068 int PAD; /* 0X560 */
1069 int PAD; /* 0X564 */
1070 int PAD; /* 0X568 */
1071 int PAD; /* 0X56C */
1072 int PAD; /* 0X570 */
1073 int PAD; /* 0X574 */
1074 int PAD; /* 0X578 */
1075 int PAD; /* 0X57C */
1076 int PAD; /* 0X580 */
1077 int PAD; /* 0X584 */
1078 } __attribute__((packed));
1079  
1080 struct hnddma_pub {
1081 void *di_fn; /* DMA function pointers */
1082 unsigned int txavail; /* # free tx descriptors */
1083 unsigned int dmactrlflags; /* dma control flags */
1084 /* rx error counters */
1085 unsigned int rxgiants; /* rx giant frames */
1086 unsigned int rxnobuf; /* rx out of dma descriptors */
1087 /* tx error counters */
1088 unsigned int txnobuf; /* tx out of dma descriptors */
1089 } __attribute__((packed));
1090  
1091 struct dma_info {
1092 struct hnddma_pub hnddma; /* exported structure */
1093 int msg_level; /* message level pointer */
1094 int something;
1095 char name[8]; /* callers name for diag msgs */
1096 void *osh;
1097 void *sih;
1098 bool dma64; /* this dma engine is operating in 64-bit mode */
1099 bool addrext; /* this dma engine supports DmaExtendedAddrChanges */
1100 char gap2[2];
1101 void *txregs; /* 64-bit dma tx engine registers */
1102 void *rxregs; /* 64-bit dma rx engine registers */
1103 void *txd; /* pointer to dma64 tx descriptor ring */
1104 void *rxd; /* pointer to dma64 rx descriptor ring */
1105 short dmadesc_align; /* alignment requirement for dma descriptors */
1106 short ntxd; /* # tx descriptors tunable */
1107 short txin; /* index of next descriptor to reclaim */
1108 short txout; /* index of next descriptor to post */
1109 void **txp; /* pointer to parallel array of pointers to packets */
1110 void *tx_dmah; /* DMA MAP meta-data handle */
1111 int txp_dmah;
1112 int txdpa; /* Aligned physical address of descriptor ring */
1113 int txdpaorig; /* Original physical address of descriptor ring */
1114 short txdalign; /* #bytes added to alloc'd mem to align txd */
1115 int txdalloc; /* #bytes allocated for the ring */
1116 int xmtptrbase; /* When using unaligned descriptors, the ptr register
1117 * is not just an index, it needs all 13 bits to be
1118 * an offset from the addr register.
1119 */
1120 short PAD;
1121 short nrxd;
1122 short rxin;
1123 short rxout;
1124 short PAD;
1125 void **rxp;
1126 int PAD;
1127 int PAD;
1128 int rxdpa;
1129 short rxdalign;
1130 short PAD;
1131 int PAD;
1132 int PAD;
1133 int PAD;
1134 int rxbufsize; /* rx buffer size in bytes, not including the extra headroom */
1135 int rxextrahdrroom; /* extra rx headroom. */
1136  
1137 } __attribute__((packed));
1138  
1139 struct intctrlregs {
1140 unsigned int intstatus;
1141 unsigned int intmask;
1142 };
1143  
1144 /* read: 32-bit register that can be read as 32-bit or as 2 16-bit
1145 * write: only low 16b-it half can be written
1146 */
1147 union pmqreg {
1148 unsigned int pmqhostdata; /* read only! */
1149 struct {
1150 unsigned short pmqctrlstatus; /* read/write */
1151 unsigned short PAD;
1152 } w;
1153 };
1154  
1155 /* dma registers per channel(xmt or rcv) */
1156 struct dma64regs {
1157 unsigned int control; /* enable, et al */
1158 unsigned int ptr; /* last descriptor posted to chip */
1159 unsigned int addrlow; /* desc ring base address low 32-bits (8K aligned) */
1160 unsigned int addrhigh; /* desc ring base address bits 63:32 (8K aligned) */
1161 unsigned int status0; /* current descriptor, xmt state */
1162 unsigned int status1; /* active descriptor, xmt error */
1163 };
1164  
1165 /* 4byte-wide pio register set per channel(xmt or rcv) */
1166 struct pio4regs {
1167 unsigned int fifocontrol;
1168 unsigned int fifodata;
1169 };
1170  
1171 struct fifo64 {
1172 struct dma64regs dmaxmt; /* dma tx */
1173 struct pio4regs piotx; /* pio tx */
1174 struct dma64regs dmarcv; /* dma rx */
1175 struct pio4regs piorx; /* pio rx */
1176 };
1177  
1178 struct dma32diag { /* diag access */
1179 unsigned int fifoaddr; /* diag address */
1180 unsigned int fifodatalow; /* low 32bits of data */
1181 unsigned int fifodatahigh; /* high 32bits of data */
1182 unsigned int pad; /* reserved */
1183 };
1184  
1185 /*
1186 * Host Interface Registers
1187 */
1188 struct d11regs {
1189 /* Device Control ("semi-standard host registers") */
1190 unsigned int PAD[3]; /* 0x0 - 0x8 */
1191 unsigned int biststatus; /* 0xC */
1192 unsigned int biststatus2; /* 0x10 */
1193 unsigned int PAD; /* 0x14 */
1194 unsigned int gptimer; /* 0x18 */
1195 unsigned int usectimer; /* 0x1c *//* for corerev >= 26 */
1196  
1197 /* Interrupt Control *//* 0x20 */
1198 struct intctrlregs intctrlregs[8];
1199  
1200 unsigned int PAD[40]; /* 0x60 - 0xFC */
1201  
1202 unsigned int intrcvlazy[4]; /* 0x100 - 0x10C */
1203  
1204 unsigned int PAD[4]; /* 0x110 - 0x11c */
1205  
1206 unsigned int maccontrol; /* 0x120 */
1207 unsigned int maccommand; /* 0x124 */
1208 unsigned int macintstatus; /* 0x128 */
1209 unsigned int macintmask; /* 0x12C */
1210  
1211 /* Transmit Template Access */
1212 unsigned int tplatewrptr; /* 0x130 */
1213 unsigned int tplatewrdata; /* 0x134 */
1214 unsigned int PAD[2]; /* 0x138 - 0x13C */
1215  
1216 /* PMQ registers */
1217 union pmqreg pmqreg; /* 0x140 */
1218 unsigned int pmqpatl; /* 0x144 */
1219 unsigned int pmqpath; /* 0x148 */
1220 unsigned int PAD; /* 0x14C */
1221  
1222 unsigned int chnstatus; /* 0x150 */
1223 unsigned int psmdebug; /* 0x154 */
1224 unsigned int phydebug; /* 0x158 */
1225 unsigned int machwcap; /* 0x15C */
1226  
1227 /* Extended Internal Objects */
1228 unsigned int objaddr; /* 0x160 */
1229 unsigned int objdata; /* 0x164 */
1230 unsigned int PAD[2]; /* 0x168 - 0x16c */
1231  
1232 unsigned int frmtxstatus; /* 0x170 */
1233 unsigned int frmtxstatus2; /* 0x174 */
1234 unsigned int PAD[2]; /* 0x178 - 0x17c */
1235  
1236 /* TSF host access */
1237 unsigned int tsf_timerlow; /* 0x180 */
1238 unsigned int tsf_timerhigh; /* 0x184 */
1239 unsigned int tsf_cfprep; /* 0x188 */
1240 unsigned int tsf_cfpstart; /* 0x18c */
1241 unsigned int tsf_cfpmaxdur32; /* 0x190 */
1242 unsigned int PAD[3]; /* 0x194 - 0x19c */
1243  
1244 unsigned int maccontrol1; /* 0x1a0 */
1245 unsigned int machwcap1; /* 0x1a4 */
1246 unsigned int PAD[14]; /* 0x1a8 - 0x1dc */
1247  
1248 /* Clock control and hardware workarounds*/
1249 unsigned int clk_ctl_st; /* 0x1e0 */
1250 unsigned int hw_war;
1251 unsigned int d11_phypllctl; /* the phypll request/avail bits are
1252 * moved to clk_ctl_st
1253 */
1254 unsigned int PAD[5]; /* 0x1ec - 0x1fc */
1255  
1256 /* 0x200-0x37F dma/pio registers */
1257 struct fifo64 fifo64regs[6];
1258  
1259 /* FIFO diagnostic port access */
1260 struct dma32diag dmafifo; /* 0x380 - 0x38C */
1261  
1262 unsigned int aggfifocnt; /* 0x390 */
1263 unsigned int aggfifodata; /* 0x394 */
1264 unsigned int PAD[16]; /* 0x398 - 0x3d4 */
1265 unsigned short radioregaddr; /* 0x3d8 */
1266 unsigned short radioregdata; /* 0x3da */
1267  
1268 /*
1269 * time delay between the change on rf disable input and
1270 * radio shutdown
1271 */
1272 unsigned int rfdisabledly; /* 0x3DC */
1273  
1274 /* PHY register access */
1275 unsigned short phyversion; /* 0x3e0 - 0x0 */
1276 unsigned short phybbconfig; /* 0x3e2 - 0x1 */
1277 unsigned short phyadcbias; /* 0x3e4 - 0x2 Bphy only */
1278 unsigned short phyanacore; /* 0x3e6 - 0x3 pwwrdwn on aphy */
1279 unsigned short phyrxstatus0; /* 0x3e8 - 0x4 */
1280 unsigned short phyrxstatus1; /* 0x3ea - 0x5 */
1281 unsigned short phycrsth; /* 0x3ec - 0x6 */
1282 unsigned short phytxerror; /* 0x3ee - 0x7 */
1283 unsigned short phychannel; /* 0x3f0 - 0x8 */
1284 unsigned short PAD[1]; /* 0x3f2 - 0x9 */
1285 unsigned short phytest; /* 0x3f4 - 0xa */
1286 unsigned short phy4waddr; /* 0x3f6 - 0xb */
1287 unsigned short phy4wdatahi; /* 0x3f8 - 0xc */
1288 unsigned short phy4wdatalo; /* 0x3fa - 0xd */
1289 unsigned short phyregaddr; /* 0x3fc - 0xe */
1290 unsigned short phyregdata; /* 0x3fe - 0xf */
1291  
1292 /* IHR *//* 0x400 - 0x7FE */
1293  
1294 /* RXE Block */
1295 unsigned short PAD; /* SPR_RXE_0x00 0x400 */
1296 unsigned short PAD; /* SPR_RXE_Copy_Offset 0x402 */
1297 unsigned short PAD; /* SPR_RXE_Copy_Length 0x404 */
1298 unsigned short rcv_fifo_ctl; /* SPR_RXE_FIFOCTL0 0x406 */
1299 unsigned short PAD; /* SPR_RXE_FIFOCTL1 0x408 */
1300 unsigned short rcv_frm_cnt; /* SPR_Received_Frame_Count 0x40a */
1301 unsigned short PAD; /* SPR_RXE_0x0c 0x40c */
1302 unsigned short PAD; /* SPR_RXE_RXHDR_OFFSET 0x40e */
1303 unsigned short PAD; /* SPR_RXE_RXHDR_LEN 0x410 */
1304 unsigned short PAD; /* SPR_RXE_PHYRXSTAT0 0x412 */
1305 unsigned short rssi; /* SPR_RXE_PHYRXSTAT1 0x414 */
1306 unsigned short PAD; /* SPR_RXE_0x16 0x416 */
1307 unsigned short PAD; /* SPR_RXE_FRAMELEN 0x418 */
1308 unsigned short PAD; /* SPR_RXE_0x1a 0x41a */
1309 unsigned short PAD; /* SPR_RXE_ENCODING 0x41c */
1310 unsigned short PAD; /* SPR_RXE_0x1e 0x41e */
1311 unsigned short rcm_ctl; /* SPR_RCM_Control 0x420 */
1312 unsigned short rcm_mat_data; /* SPR_RCM_Match_Data 0x422 */
1313 unsigned short rcm_mat_mask; /* SPR_RCM_Match_Mask 0x424 */
1314 unsigned short rcm_mat_dly; /* SPR_RCM_Match_Delay 0x426 */
1315 unsigned short rcm_cond_mask_l; /* SPR_RCM_Condition_Mask_Low 0x428 */
1316 unsigned short rcm_cond_mask_h; /* SPR_RCM_Condition_Mask_High 0x42A */
1317 unsigned short rcm_cond_dly; /* SPR_RCM_Condition_Delay 0x42C */
1318 unsigned short PAD; /* SPR_RXE_0x2e 0x42E */
1319 unsigned short ext_ihr_addr; /* SPR_Ext_IHR_Address 0x430 */
1320 unsigned short ext_ihr_data; /* SPR_Ext_IHR_Data 0x432 */
1321 unsigned short rxe_phyrs_2; /* SPR_RXE_PHYRXSTAT2 0x434 */
1322 unsigned short rxe_phyrs_3; /* SPR_RXE_PHYRXSTAT3 0x436 */
1323 unsigned short phy_mode; /* SPR_PHY_Mode 0x438 */
1324 unsigned short rcmta_ctl; /* SPR_RCM_TA_Control 0x43a */
1325 unsigned short rcmta_size; /* SPR_RCM_TA_Size 0x43c */
1326 unsigned short rcmta_addr0; /* SPR_RCM_TA_Address_0 0x43e */
1327 unsigned short rcmta_addr1; /* SPR_RCM_TA_Address_1 0x440 */
1328 unsigned short rcmta_addr2; /* SPR_RCM_TA_Address_2 0x442 */
1329 unsigned short PAD[30]; /* SPR_RXE_0x44 ... 0x7e 0x444 */
1330  
1331  
1332 /* PSM Block *//* 0x480 - 0x500 */
1333  
1334 unsigned short PAD; /* SPR_MAC_MAX_NAP 0x480 */
1335 unsigned short psm_maccontrol_h; /* SPR_MAC_CTLHI 0x482 */
1336 unsigned short psm_macintstatus_l; /* SPR_MAC_IRQLO 0x484 */
1337 unsigned short psm_macintstatus_h; /* SPR_MAC_IRQHI 0x486 */
1338 unsigned short psm_macintmask_l; /* SPR_MAC_IRQMASKLO 0x488 */
1339 unsigned short psm_macintmask_h; /* SPR_MAC_IRQMASKHI 0x48A */
1340 unsigned short psm_0x0c; /* SPR_PSM_0x0c 0x48C */
1341 unsigned short psm_maccommand; /* SPR_MAC_CMD 0x48E */
1342 unsigned short psm_brc; /* SPR_BRC 0x490 */
1343 unsigned short psm_phy_hdr_param; /* SPR_PHY_HDR_Parameter 0x492 */
1344 unsigned short psm_postcard; /* SPR_Postcard 0x494 */
1345 unsigned short psm_pcard_loc_l; /* SPR_Postcard_Location_Low 0x496 */
1346 unsigned short psm_pcard_loc_h; /* SPR_Postcard_Location_High 0x498 */
1347 unsigned short psm_gpio_in; /* SPR_GPIO_IN 0x49A */
1348 unsigned short psm_gpio_out; /* SPR_GPIO_OUT 0x49C */
1349 unsigned short psm_gpio_oe; /* SPR_GPIO_OUTEN 0x49E */
1350  
1351 unsigned short psm_bred_0; /* SPR_BRED0 0x4A0 */
1352 unsigned short psm_bred_1; /* SPR_BRED1 0x4A2 */
1353 unsigned short psm_bred_2; /* SPR_BRED2 0x4A4 */
1354 unsigned short psm_bred_3; /* SPR_BRED3 0x4A6 */
1355 unsigned short psm_brcl_0; /* SPR_BRCL0 0x4A8 */
1356 unsigned short psm_brcl_1; /* SPR_BRCL1 0x4AA */
1357 unsigned short psm_brcl_2; /* SPR_BRCL2 0x4AC */
1358 unsigned short psm_brcl_3; /* SPR_BRCL3 0x4AE */
1359 unsigned short psm_brpo_0; /* SPR_BRPO0 0x4B0 */
1360 unsigned short psm_brpo_1; /* SPR_BRPO1 0x4B2 */
1361 unsigned short psm_brpo_2; /* SPR_BRPO2 0x4B4 */
1362 unsigned short psm_brpo_3; /* SPR_BRPO3 0x4B6 */
1363 unsigned short psm_brwk_0; /* SPR_BRWK0 0x4B8 */
1364 unsigned short psm_brwk_1; /* SPR_BRWK1 0x4BA */
1365 unsigned short psm_brwk_2; /* SPR_BRWK2 0x4BC */
1366 unsigned short psm_brwk_3; /* SPR_BRWK3 0x4BE */
1367  
1368 unsigned short psm_base_0; /* SPR_BASE0 - Offset Register 0 0x4C0 */
1369 unsigned short psm_base_1; /* SPR_BASE1 - Offset Register 1 0x4C2 */
1370 unsigned short psm_base_2; /* SPR_BASE2 - Offset Register 2 0x4C4 */
1371 unsigned short psm_base_3; /* SPR_BASE3 - Offset Register 3 0x4C6 */
1372 unsigned short psm_base_4; /* SPR_BASE4 - Offset Register 4 0x4C8 */
1373 unsigned short psm_base_5; /* SPR_BASE5 - Offset Register 5 0x4CA */
1374 unsigned short psm_base_6; /* SPR_BASE6 - Do not use (broken) 0x4CC */
1375 unsigned short psm_ihr_err; /* SPR_PSM_0x4e 0x4CE */
1376 unsigned short psm_pc_reg_0; /* SPR_PC0 - Link Register 0 0x4D0 */
1377 unsigned short psm_pc_reg_1; /* SPR_PC1 - Link Register 1 0x4D2 */
1378 unsigned short psm_pc_reg_2; /* SPR_PC2 - Link Register 2 0x4D4 */
1379 unsigned short psm_pc_reg_3; /* SPR_PC2 - Link Register 6 0x4D6 */
1380 unsigned short psm_brc_1; /* SPR_PSM_COND - PSM external condition bits 0x4D8 */
1381 unsigned short PAD; /* SPR_PSM_0x5a ... 0x7e 0x4DA */
1382 unsigned short PAD; /* SPR_PSM_0x5c 0x4DC */
1383 unsigned short PAD; /* SPR_PSM_0x5e 0x4DE */
1384 unsigned short PAD; /* SPR_PSM_0x60 0x4E0 */
1385 unsigned short PAD; /* SPR_PSM_0x62 0x4E2 */
1386 unsigned short PAD; /* SPR_PSM_0x64 0x4E4 */
1387 unsigned short PAD; /* SPR_PSM_0x66 0x4E6 */
1388 unsigned short PAD; /* SPR_PSM_0x68 0x4E8 */
1389 unsigned short PAD; /* SPR_PSM_0x6a 0x4EA */
1390 unsigned short PAD; /* SPR_PSM_0x6c 0x4EC */
1391 unsigned short PAD; /* SPR_PSM_0x6e 0x4EE */
1392 unsigned short psm_corectlsts; /* SPR_PSM_0x70 0x4F0 *//* Corerev >= 13 */
1393 unsigned short PAD; /* SPR_PSM_0x72 0x4F2 */
1394 unsigned short PAD; /* SPR_PSM_0x74 0x4F4 */
1395 unsigned short PAD; /* SPR_PSM_0x76 0x4F6 */
1396 unsigned short PAD; /* SPR_PSM_0x78 0x4F8 */
1397 unsigned short PAD; /* SPR_PSM_0x7a 0x4FA */
1398 unsigned short PAD; /* SPR_PSM_0x7c 0x4FC */
1399 unsigned short PAD; /* SPR_PSM_0x7e 0x4FE */
1400  
1401 /* TXE0 Block *//* 0x500 - 0x580 */
1402 unsigned short txe_ctl; /* SPR_TXE0_CTL 0x500 */
1403 unsigned short txe_aux; /* SPR_TXE0_AUX 0x502 */
1404 unsigned short txe_ts_loc; /* SPR_TXE0_TS_LOC 0x504 */
1405 unsigned short txe_time_out; /* SPR_TXE0_TIMEOUT 0x506 */
1406 unsigned short txe_wm_0; /* SPR_TXE0_WM0 0x508 */
1407 unsigned short txe_wm_1; /* SPR_TXE0_WM1 0x50A */
1408 unsigned short txe_phyctl; /* SPR_TXE0_PHY_CTL 0x50C */
1409 unsigned short txe_status; /* SPR_TXE0_STATUS 0x50E */
1410 unsigned short txe_mmplcp0; /* SPR_TXE0_0x10 0x510 */
1411 unsigned short txe_mmplcp1; /* SPR_TXE0_0x12 0x512 */
1412 unsigned short txe_phyctl1; /* SPR_TXE0_0x14 0x514 */
1413  
1414 unsigned short PAD; /* SPR_TXE0_0x16 0x516 */
1415 unsigned short PAD; /* SPR_TX_STATUS0 0x518 */
1416 unsigned short PAD; /* SPR_TX_STATUS1 0x51a */
1417 unsigned short PAD; /* SPR_TX_STATUS2 0x51c */
1418 unsigned short PAD; /* SPR_TX_STATUS3 0x51e */
1419  
1420 /* Transmit control */
1421 unsigned short xmtfifodef; /* SPR_TXE0_FIFO_Def 0x520 */
1422 unsigned short xmtfifo_frame_cnt; /* SPR_TXE0_0x22 0x522 *//* Corerev >= 16 */
1423 unsigned short xmtfifo_byte_cnt; /* SPR_TXE0_0x24 0x524 *//* Corerev >= 16 */
1424 unsigned short xmtfifo_head; /* SPR_TXE0_0x26 0x526 *//* Corerev >= 16 */
1425 unsigned short xmtfifo_rd_ptr; /* SPR_TXE0_0x28 0x528 *//* Corerev >= 16 */
1426 unsigned short xmtfifo_wr_ptr; /* SPR_TXE0_0x2a 0x52A *//* Corerev >= 16 */
1427 unsigned short xmtfifodef1; /* SPR_TXE0_0x2c 0x52C *//* Corerev >= 16 */
1428  
1429 unsigned short PAD; /* SPR_TXE0_0x2e 0x52E */
1430 unsigned short PAD; /* SPR_TXE0_0x30 0x530 */
1431 unsigned short PAD; /* SPR_TXE0_0x32 0x532 */
1432 unsigned short PAD; /* SPR_TXE0_0x34 0x534 */
1433 unsigned short PAD; /* SPR_TXE0_0x36 0x536 */
1434 unsigned short PAD; /* SPR_TXE0_0x38 0x538 */
1435 unsigned short PAD; /* SPR_TXE0_0x3a 0x53A */
1436 unsigned short PAD; /* SPR_TXE0_0x3c 0x53C */
1437 unsigned short PAD; /* SPR_TXE0_0x3e 0x53E */
1438  
1439 unsigned short xmtfifocmd; /* SPR_TXE0_FIFO_CMD 0x540 */
1440 unsigned short xmtfifoflush; /* SPR_TXE0_FIFO_FLUSH 0x542 */
1441 unsigned short xmtfifothresh; /* SPR_TXE0_FIFO_THRES 0x544 */
1442 unsigned short xmtfifordy; /* SPR_TXE0_FIFO_RDY 0x546 */
1443 unsigned short xmtfifoprirdy; /* SPR_TXE0_FIFO_PRI_RDY 0x548 */
1444 unsigned short xmtfiforqpri; /* SPR_TXE0_FIFO_RQ_PRI 0x54A */
1445 unsigned short xmttplatetxptr; /* SPR_TXE0_Template_TX_Pointer 0x54C */
1446 unsigned short PAD; /* SPR_TXE0_0x4e 0x54E */
1447 unsigned short xmttplateptr; /* SPR_TXE0_Template_Pointer 0x550 */
1448 unsigned short smpl_clct_strptr; /* SPR_TXE0_0x52 0x552 *//* Corerev >= 22 */
1449 unsigned short smpl_clct_stpptr; /* SPR_TXE0_0x54 0x554 *//* Corerev >= 22 */
1450 unsigned short smpl_clct_curptr; /* SPR_TXE0_0x56 0x556 *//* Corerev >= 22 */
1451 unsigned short PAD; /* SPR_TXE0_0x58 0x558 */
1452 unsigned short PAD; /* SPR_TXE0_0x5a 0x55A */
1453 unsigned short PAD; /* SPR_TXE0_0x5c 0x55C */
1454 unsigned short PAD; /* SPR_TXE0_0x5e 0x55E */
1455 unsigned short xmttplatedatalo; /* SPR_TXE0_Template_Data_Low 0x560 */
1456 unsigned short xmttplatedatahi; /* SPR_TXE0_Template_Data_High 0x562 */
1457  
1458 unsigned short PAD; /* SPR_TXE0_0x64 0x564 */
1459 unsigned short PAD; /* SPR_TXE0_0x66 0x566 */
1460  
1461 unsigned short xmtsel; /* SPR_TXE0_SELECT 0x568 */
1462 unsigned short xmttxcnt; /* 0x56A */
1463 unsigned short xmttxshmaddr; /* 0x56C */
1464  
1465 unsigned short PAD[0x09]; /* 0x56E - 0x57E */
1466  
1467 /* TXE1 Block */
1468 unsigned short PAD[0x40]; /* 0x580 - 0x5FE */
1469  
1470 /* TSF Block */
1471 unsigned short PAD[0X02]; /* 0x600 - 0x602 */
1472 unsigned short tsf_cfpstrt_l; /* 0x604 */
1473 unsigned short tsf_cfpstrt_h; /* 0x606 */
1474 unsigned short PAD[0X05]; /* 0x608 - 0x610 */
1475 unsigned short tsf_cfppretbtt; /* 0x612 */
1476 unsigned short PAD[0XD]; /* 0x614 - 0x62C */
1477 unsigned short tsf_clk_frac_l; /* 0x62E */
1478 unsigned short tsf_clk_frac_h; /* 0x630 */
1479 unsigned short PAD[0X14]; /* 0x632 - 0x658 */
1480 unsigned short tsf_random; /* 0x65A */
1481 unsigned short PAD[0x05]; /* 0x65C - 0x664 */
1482 /* GPTimer 2 registers */
1483 unsigned short tsf_gpt2_stat; /* 0x666 */
1484 unsigned short tsf_gpt2_ctr_l; /* 0x668 */
1485 unsigned short tsf_gpt2_ctr_h; /* 0x66A */
1486 unsigned short tsf_gpt2_val_l; /* 0x66C */
1487 unsigned short tsf_gpt2_val_h; /* 0x66E */
1488 unsigned short tsf_gptall_stat; /* 0x670 */
1489 unsigned short PAD[0x07]; /* 0x672 - 0x67E */
1490  
1491 /* IFS Block */
1492 unsigned short ifs_sifs_rx_tx_tx; /* 0x680 */
1493 unsigned short ifs_sifs_nav_tx; /* 0x682 */
1494 unsigned short ifs_slot; /* 0x684 */
1495 unsigned short PAD; /* 0x686 */
1496 unsigned short ifs_ctl; /* 0x688 */
1497 unsigned short PAD[0x3]; /* 0x68a - 0x68F */
1498 unsigned short ifsstat; /* 0x690 */
1499 unsigned short ifsmedbusyctl; /* 0x692 */
1500 unsigned short iftxdur; /* 0x694 */
1501 unsigned short PAD[0x3]; /* 0x696 - 0x69b */
1502 /* EDCF support in dot11macs */
1503 unsigned short ifs_aifsn; /* 0x69c */
1504 unsigned short ifs_ctl1; /* 0x69e */
1505  
1506 /* slow clock registers */
1507 unsigned short scc_ctl; /* 0x6a0 */
1508 unsigned short scc_timer_l; /* 0x6a2 */
1509 unsigned short scc_timer_h; /* 0x6a4 */
1510 unsigned short scc_frac; /* 0x6a6 */
1511 unsigned short scc_fastpwrup_dly; /* 0x6a8 */
1512 unsigned short scc_per; /* 0x6aa */
1513 unsigned short scc_per_frac; /* 0x6ac */
1514 unsigned short scc_cal_timer_l; /* 0x6ae */
1515 unsigned short scc_cal_timer_h; /* 0x6b0 */
1516 unsigned short PAD; /* 0x6b2 */
1517  
1518 unsigned short PAD[0x26];
1519  
1520 /* NAV Block */
1521 unsigned short nav_ctl; /* 0x700 */
1522 unsigned short navstat; /* 0x702 */
1523 unsigned short PAD[0x3e]; /* 0x702 - 0x77E */
1524  
1525 /* WEP/PMQ Block *//* 0x780 - 0x7FE */
1526 unsigned short PAD[0x20]; /* 0x780 - 0x7BE */
1527  
1528 unsigned short wepctl; /* 0x7C0 */
1529 unsigned short wepivloc; /* 0x7C2 */
1530 unsigned short wepivkey; /* 0x7C4 */
1531 unsigned short wepwkey; /* 0x7C6 */
1532  
1533 unsigned short PAD[4]; /* 0x7C8 - 0x7CE */
1534 unsigned short pcmctl; /* 0X7D0 */
1535 unsigned short pcmstat; /* 0X7D2 */
1536 unsigned short PAD[6]; /* 0x7D4 - 0x7DE */
1537  
1538 unsigned short pmqctl; /* 0x7E0 */
1539 unsigned short pmqstatus; /* 0x7E2 */
1540 unsigned short pmqpat0; /* 0x7E4 */
1541 unsigned short pmqpat1; /* 0x7E6 */
1542 unsigned short pmqpat2; /* 0x7E8 */
1543  
1544 unsigned short pmqdat; /* 0x7EA */
1545 unsigned short pmqdator; /* 0x7EC */
1546 unsigned short pmqhst; /* 0x7EE */
1547 unsigned short pmqpath0; /* 0x7F0 */
1548 unsigned short pmqpath1; /* 0x7F2 */
1549 unsigned short pmqpath2; /* 0x7F4 */
1550 unsigned short pmqdath; /* 0x7F6 */
1551  
1552 unsigned short PAD[0x04]; /* 0x7F8 - 0x7FE */
1553  
1554 /* SHM *//* 0x800 - 0xEFE */
1555 unsigned short PAD[0x380]; /* 0x800 - 0xEFE */
1556 } __attribute__((packed));
1557  
1558 typedef void (*to_fun_t)(void *arg);
1559  
1560 typedef struct _ctimeout {
1561 struct _ctimeout *next;
1562 uint32 ms;
1563 to_fun_t fun;
1564 void *arg;
1565 bool expired;
1566 } ctimeout_t;
1567  
1568 struct hndrte_timer
1569 {
1570 uint32 *context; /* first field so address of context is timer struct ptr */
1571 void *data;
1572 void (*mainfn)(struct hndrte_timer *);
1573 void (*auxfn)(void *context);
1574 ctimeout_t t;
1575 int interval;
1576 int set;
1577 int periodic;
1578 bool _freedone;
1579 } __attribute__((packed));
1580  
1581 /*== maccontrol register ==*/
1582 #define MCTL_GMODE (1U << 31)
1583 #define MCTL_DISCARD_PMQ (1 << 30)
1584 #define MCTL_WAKE (1 << 26)
1585 #define MCTL_HPS (1 << 25)
1586 #define MCTL_PROMISC (1 << 24)
1587 #define MCTL_KEEPBADFCS (1 << 23)
1588 #define MCTL_KEEPCONTROL (1 << 22)
1589 #define MCTL_PHYLOCK (1 << 21)
1590 #define MCTL_BCNS_PROMISC (1 << 20)
1591 #define MCTL_LOCK_RADIO (1 << 19)
1592 #define MCTL_AP (1 << 18)
1593 #define MCTL_INFRA (1 << 17)
1594 #define MCTL_BIGEND (1 << 16)
1595 #define MCTL_GPOUT_SEL_MASK (3 << 14)
1596 #define MCTL_GPOUT_SEL_SHIFT 14
1597 #define MCTL_EN_PSMDBG (1 << 13)
1598 #define MCTL_IHR_EN (1 << 10)
1599 #define MCTL_SHM_UPPER (1 << 9)
1600 #define MCTL_SHM_EN (1 << 8)
1601 #define MCTL_PSM_JMP_0 (1 << 2)
1602 #define MCTL_PSM_RUN (1 << 1)
1603 #define MCTL_EN_MAC (1 << 0)
1604  
1605 struct ethernet_header {
1606 uint8 dst[6];
1607 uint8 src[6];
1608 uint16 type;
1609 } __attribute__((packed));
1610  
1611 struct ipv6_header {
1612 uint32 version_traffic_class_flow_label;
1613 uint16 payload_length;
1614 uint8 next_header;
1615 uint8 hop_limit;
1616 uint8 src_ip[16];
1617 uint8 dst_ip[16];
1618 } __attribute__((packed));
1619  
1620 struct ip_header {
1621 uint8 version_ihl;
1622 uint8 dscp_ecn;
1623 uint16 total_length;
1624 uint16 identification;
1625 uint16 flags_fragment_offset;
1626 uint8 ttl;
1627 uint8 protocol;
1628 uint16 header_checksum;
1629 union {
1630 uint32 integer;
1631 uint8 array[4];
1632 } src_ip;
1633 union {
1634 uint32 integer;
1635 uint8 array[4];
1636 } dst_ip;
1637 } __attribute__((packed));
1638  
1639 struct udp_header {
1640 uint16 src_port;
1641 uint16 dst_port;
1642 union {
1643 uint16 length; /* UDP: length of UDP header and payload */
1644 uint16 checksum_coverage; /* UDPLITE: checksum_coverage */
1645 } len_chk_cov;
1646 uint16 checksum;
1647 } __attribute__((packed));
1648  
1649 struct ethernet_ip_udp_header {
1650 struct ethernet_header ethernet;
1651 struct ip_header ip;
1652 struct udp_header udp;
1653 } __attribute__((packed));
1654  
1655 struct ethernet_ipv6_udp_header {
1656 struct ethernet_header ethernet;
1657 struct ipv6_header ipv6;
1658 struct udp_header udp;
1659 uint8 payload[1];
1660 } __attribute__((packed));
1661  
1662 struct nexmon_header {
1663 uint32 hooked_fct;
1664 uint32 args[3];
1665 uint8 payload[1];
1666 } __attribute__((packed));
1667