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1 office 1 /***************************************************************************
2 * *
3 * ########### ########### ########## ########## *
4 * ############ ############ ############ ############ *
5 * ## ## ## ## ## ## ## *
6 * ## ## ## ## ## ## ## *
7 * ########### #### ###### ## ## ## ## ###### *
8 * ########### #### # ## ## ## ## # # *
9 * ## ## ###### ## ## ## ## # # *
10 * ## ## # ## ## ## ## # # *
11 * ############ ##### ###### ## ## ## ##### ###### *
12 * ########### ########### ## ## ## ########## *
13 * *
14 * S E C U R E M O B I L E N E T W O R K I N G *
15 * *
16 * This file is part of NexMon. *
17 * *
18 * Copyright (c) 2016 NexMon Team *
19 * *
20 * NexMon is free software: you can redistribute it and/or modify *
21 * it under the terms of the GNU General Public License as published by *
22 * the Free Software Foundation, either version 3 of the License, or *
23 * (at your option) any later version. *
24 * *
25 * NexMon is distributed in the hope that it will be useful, *
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
28 * GNU General Public License for more details. *
29 * *
30 * You should have received a copy of the GNU General Public License *
31 * along with NexMon. If not, see <http://www.gnu.org/licenses/>. *
32 * *
33 **************************************************************************/
34  
35 #include <types.h>
36 #include <bcmcdc.h>
37  
38 /* Most of these structs are taken from the bcm4339 includes file and might currently be wrong */
39  
40 /* used for PAPD cal */
41 typedef struct _acphy_txgains {
42 uint16 txlpf;
43 uint16 txgm;
44 uint16 pga;
45 uint16 pad;
46 uint16 ipa;
47 } acphy_txgains_t;
48  
49 /* htphy: tx gain settings */
50 typedef struct {
51 uint16 rad_gain; /* Radio gains */
52 uint16 rad_gain_mi; /* Radio gains [16:31] */
53 uint16 rad_gain_hi; /* Radio gains [32:47] */
54 uint16 dac_gain; /* DAC attenuation */
55 uint16 bbmult; /* BBmult */
56 } txgain_setting_t;
57  
58 typedef struct { /* wlc_phy_write_tx_gain_acphy */
59 uint8 txlpf; /* Radio gains */
60 uint8 ipa;
61 uint8 pad; /* Radio gains [16:31] */
62 uint8 pga;
63 uint8 txgm; /* Radio gains [32:47] */
64 uint8 unknown;
65 uint16 dac_gain; /* DAC attenuation */
66 uint16 bbmult; /* BBmult */
67 } ac_txgain_setting_t;
68  
69 struct phy_pub {
70 uint phy_type; /* PHY_TYPE_XX */
71 uint phy_rev; /* phy revision */
72 uint8 phy_corenum; /* number of cores */
73 uint16 radioid; /* radio id */
74 uint8 radiorev; /* radio revision */
75 uint8 radiover; /* radio version */
76 uint8 radiomajorrev; /* radio major revision */
77 uint8 radiominorrev; /* radio minor revision */
78 uint coreflags; /* sbtml core/phy specific flags */
79 uint ana_rev; /* analog core revision */
80 bool abgphy_encore; /* true if chipset is encore enabled */
81 };
82  
83 struct shared_phy {
84 struct phy_info *phy_head; // 0x000 ?? /* head of phy list */
85 uint unit; // 0x004 ?? /* device instance number */
86 struct osl_info *osh; // 0x008 ?? /* pointer to os handle */
87 void *sih; // 0x00c ?? /* si handle (cookie for siutils calls) */
88 void *physhim; // 0x010 ?? /* phy <-> wl shim layer for wlapi */
89 uint corerev; // 0x014 ?? /* d11corerev, shadow of wlc_hw->corerev */
90 uint32 machwcap; // 0x018 ?? /* mac hw capability */
91 bool up; // 0x01c ?? /* main driver is up and running */
92 bool clk; // 0x01d ?? /* main driver make the clk available */
93 uint8 PAD; // 0x01e
94 uint8 PAD; // 0x01f
95 uint32 PAD; // 0x020
96 uint32 PAD; // 0x024
97 uint32 PAD; // 0x028
98 uint32 PAD; // 0x02C
99 uint32 PAD; // 0x030
100 uint32 PAD; // 0x034
101 uint32 PAD; // 0x038
102 uint32 PAD; // 0x03C
103 uint32 PAD; // 0x040
104 uint32 PAD; // 0x044
105 uint32 PAD; // 0x048
106 uint32 PAD; // 0x04C
107 uint32 PAD; // 0x050
108 uint32 PAD; // 0x054
109 uint32 PAD; // 0x058
110 uint32 PAD; // 0x05C
111 uint32 PAD; // 0x060
112 uint32 PAD; // 0x064
113 uint32 PAD; // 0x068
114 uint32 PAD; // 0x06C
115 uint32 PAD; // 0x070
116 uint32 PAD; // 0x074
117 uint32 PAD; // 0x078
118 uint32 PAD; // 0x07C
119 uint32 PAD; // 0x080
120 uint32 PAD; // 0x084
121 uint32 PAD; // 0x088
122 uint32 PAD; // 0x08C
123 uint8 PAD; // 0x090
124 uint8 hw_phyrxchain; // 0x091 ??
125 uint8 PAD; // 0x092
126 uint8 PAD; // 0x093
127 uint32 PAD; // 0x094
128 uint32 PAD; // 0x098
129 uint32 PAD; // 0x09C
130 } __attribute__((packed));
131  
132 struct phy_info {
133 struct phy_pub pubpi_ro; // 0x000 ??
134 //struct shared_phy *sh; // 0x01c ?? wrong on bcm4358
135 //int PAD; // 0x01c
136 //int PAD; // 0x020
137 //int PAD; // 0x024
138 //int PAD; // 0x028
139 //int PAD; // 0x02c
140 //int PAD; // 0x030
141 //int PAD; // 0x034
142 struct phy_pub pubpi; // 0x01c checked on bcm4358
143 struct shared_phy *sh; // 0x038
144 int PAD; // 0x03c
145 int PAD; // 0x040
146 int PAD; // 0x044
147 int PAD; // 0x048
148 int PAD; // 0x04c
149 int PAD; // 0x050
150 int PAD; // 0x054
151 int PAD; // 0x058
152 int PAD; // 0x05c
153 int PAD; // 0x060
154 int PAD; // 0x064
155 int PAD; // 0x068
156 int PAD; // 0x06c
157 int PAD; // 0x070
158 int PAD; // 0x074
159 int PAD; // 0x078
160 int PAD; // 0x07c
161 int PAD; // 0x080
162 int PAD; // 0x084
163 int PAD; // 0x088
164 int PAD; // 0x08c
165 int PAD; // 0x090
166 int PAD; // 0x094
167 int PAD; // 0x098
168 int PAD; // 0x09c
169 int PAD; // 0x0a0
170 int PAD; // 0x0a4
171 int PAD; // 0x0a8
172 int PAD; // 0x0ac
173 int PAD; // 0x0b0
174 int PAD; // 0x0b4
175 int PAD; // 0x0b8
176 //struct phy_info_acphy *pi_ac; // 0x0bc ??
177 int PAD; // 0x0bc
178 int PAD; // 0x0c0
179 //struct d11regs *regs; // 0x0c4 ?? wrong for bcm4358
180 int PAD; // 0x0c4
181 int PAD; // 0x0c8
182 int PAD; // 0x0cc
183 int PAD; // 0x0d0
184 int PAD; // 0x0d4
185 int PAD; // 0x0d8
186 int PAD; // 0x0dc
187 int PAD; // 0x0e0
188 struct phy_info_acphy *pi_ac; // 0x0e4 // checked for bcm4358
189 int PAD; // 0x0e8
190 struct d11regs *regs; // 0x0ec // checked for bcm4358
191 int PAD; // 0x0f0
192 //struct phy_pub pubpi; // 0x0d0 ??
193 //short PAD; // 0x0ec ??
194 //short radio_chanspec; // 0x0ee ??
195 //short PAD; // 0x0f0 ??
196 //short bw; // 0x0f2 ??
197 int PAD; // 0x0f4
198 //int PAD; // 0x0f8
199 short PAD; // 0x0f8
200 short radio_chanspec; // 0x0fa
201 //int PAD; // 0x0fc
202 short PAD; // 0x0fc
203 short bw; // 0x0fe
204 int PAD; // 0x100
205 int PAD; // 0x104
206 int PAD; // 0x108
207 int PAD; // 0x10c
208 int PAD; // 0x110
209 int PAD; // 0x114
210 int PAD; // 0x118
211 int PAD; // 0x11c
212 int PAD; // 0x120
213 } __attribute__((packed));
214  
215 struct wlc_hw_info {
216 struct wlc_info *wlc; /* 0x00 */
217 int PAD; /* 0x04 */
218 int PAD; /* 0x08 */
219 int PAD; /* 0x0c */
220 int PAD; /* 0x10 */
221 struct dma_info *di[6]; /* 0x14 - only 4 bytes */
222 int PAD; // 0x2c
223 int PAD; // 0x30
224 int PAD; // 0x34
225 int PAD; // 0x38
226 int PAD; // 0x3c
227 int PAD; // 0x40
228 int PAD; // 0x44
229 int PAD; // 0x48
230 int PAD; // 0x4c
231 int PAD; // 0x50
232 int PAD; // 0x54
233 int PAD; // 0x58
234 int PAD; // 0x5c
235 int PAD; // 0x60
236 int PAD; // 0x64
237 int PAD; // 0x68
238 int PAD; // 0x6c
239 int PAD; // 0x70
240 char PAD; // 0x74
241 char PAD; // 0x75
242 char ucode_loaded; /* 0x76 */
243 char PAD; /* 0x77 */
244 int PAD; /* 0x78 */
245 int sih; /* 0x7c */
246 int vars; /* 0x80 */
247 int vars_size; /* 0x84 */
248 struct d11regs* regs; /* 0x88 */
249 int physhim; /* 0x8c */
250 int phy_sh; /* 0x90 */
251 struct wlc_hwband *band; /* 0x94 */ // checked for bcm4358
252 int PAD; // 0x98
253 int PAD; // 0x9c
254 int PAD; // 0xa0
255 int PAD; // 0xa4
256 int PAD; // 0xa8
257 char up; // 0xac verified wl_dpc
258 char PAD;
259 char PAD;
260 char PAD;
261 int PAD; // 0xb0
262 int PAD; // 0xb4
263 int PAD; // 0xb8
264 int PAD; // 0xbc
265 int PAD; // 0xc0
266 int PAD; // 0xc4
267 int PAD; // 0xc8
268 int PAD; // 0xcc
269 int PAD; // 0xd0
270 int PAD; // 0xd4
271 int PAD; // 0xd8
272 int PAD; // 0xdc
273 int PAD; // 0xe0
274 int PAD; // 0xe4
275 int PAD; // 0xe8
276 int PAD; // 0xec
277 int PAD; // 0xf0
278 int PAD; // 0xf4
279 int PAD; // 0xf8
280 int PAD; // 0xfc
281 };
282  
283 struct wl_rxsts {
284 uint32 pkterror; /* error flags per pkt */
285 uint32 phytype; /* 802.11 A/B/G ... */
286 uint16 chanspec; /* channel spec */
287 uint16 datarate; /* rate in 500kbps (0 for HT frame) */
288 uint8 mcs; /* MCS for HT frame */
289 uint8 htflags; /* HT modulation flags */
290 uint8 PAD;
291 uint8 PAD;
292 uint32 antenna; /* antenna pkts received on */
293 uint32 pktlength; /* pkt length minus bcm phy hdr */
294 uint32 mactime; /* time stamp from mac, count per 1us */
295 uint32 sq; /* signal quality */
296 int32 signal; /* in dBm */
297 int32 noise; /* in dBm */
298 uint32 preamble; /* Unknown, short, long */
299 uint32 encoding; /* Unknown, CCK, PBCC, OFDM, HT */
300 uint32 nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */
301 void *wlif; /* wl interface */
302 } __attribute__((packed));
303  
304 /* status per error RX pkt */
305 #define WL_RXS_CRC_ERROR 0x00000001 /* CRC Error in packet */
306 #define WL_RXS_RUNT_ERROR 0x00000002 /* Runt packet */
307 #define WL_RXS_ALIGN_ERROR 0x00000004 /* Misaligned packet */
308 #define WL_RXS_OVERSIZE_ERROR 0x00000008 /* packet bigger than RX_LENGTH (usually 1518) */
309 #define WL_RXS_WEP_ICV_ERROR 0x00000010 /* Integrity Check Value error */
310 #define WL_RXS_WEP_ENCRYPTED 0x00000020 /* Encrypted with WEP */
311 #define WL_RXS_PLCP_SHORT 0x00000040 /* Short PLCP error */
312 #define WL_RXS_DECRYPT_ERR 0x00000080 /* Decryption error */
313 #define WL_RXS_OTHER_ERR 0x80000000 /* Other errors */
314  
315 /* phy type */
316 #define WL_RXS_PHY_A 0x00000000 /* A phy type */
317 #define WL_RXS_PHY_B 0x00000001 /* B phy type */
318 #define WL_RXS_PHY_G 0x00000002 /* G phy type */
319 #define WL_RXS_PHY_N 0x00000004 /* N phy type */
320  
321 /* encoding */
322 #define WL_RXS_ENCODING_UNKNOWN 0x00000000
323 #define WL_RXS_ENCODING_DSSS_CCK 0x00000001 /* DSSS/CCK encoding (1, 2, 5.5, 11) */
324 #define WL_RXS_ENCODING_OFDM 0x00000002 /* OFDM encoding */
325 #define WL_RXS_ENCODING_HT 0x00000003 /* HT encoding */
326 #define WL_RXS_ENCODING_AC 0x00000004 /* HT encoding */
327  
328 /* preamble */
329 #define WL_RXS_UNUSED_STUB 0x0 /* stub to match with wlc_ethereal.h */
330 #define WL_RXS_PREAMBLE_SHORT 0x00000001 /* Short preamble */
331 #define WL_RXS_PREAMBLE_LONG 0x00000002 /* Long preamble */
332 #define WL_RXS_PREAMBLE_HT_MM 0x00000003 /* HT mixed mode preamble */
333 #define WL_RXS_PREAMBLE_HT_GF 0x00000004 /* HT green field preamble */
334  
335 /* htflags */
336 #define WL_RXS_HTF_40 0x01
337 #define WL_RXS_HTF_20L 0x02
338 #define WL_RXS_HTF_20U 0x04
339 #define WL_RXS_HTF_SGI 0x08
340 #define WL_RXS_HTF_STBC_MASK 0x30
341 #define WL_RXS_HTF_STBC_SHIFT 4
342 #define WL_RXS_HTF_LDPC 0x40
343  
344 #define WL_RXS_NFRM_AMPDU_FIRST 0x00000001 /* first MPDU in A-MPDU */
345 #define WL_RXS_NFRM_AMPDU_SUB 0x00000002 /* subsequent MPDU(s) in A-MPDU */
346 #define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */
347 #define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */
348  
349 struct osl_info {
350 unsigned int pktalloced;
351 int PAD[1];
352 void *callback_when_dropped;
353 unsigned int bustype;
354 } __attribute__((packed));
355  
356 typedef struct sk_buff {
357 int field0; /* 0x00 */
358 void *head; /* 0x04 */
359 void *data; /* 0x08 */
360 short len; /* 0x0C */
361 short fieldE; // 0x0E
362 int field10; // 0x10
363 unsigned short next; // 0x14
364 unsigned short prev; // 0x16
365 unsigned short prev2; // 0x18
366 unsigned short prev3; // 0x1A
367 int PAD; // 0x1C
368 char byte20; // 0x20
369 char PAD; // 0x21
370 char PAD; // 0x22
371 char byte23; // 0x23
372 int PAD; // 0x24
373 int PAD; // 0x28
374 int dword2C; // 0x2C
375 } __attribute__((packed)) sk_buff;
376  
377 #define HNDRTE_DEV_NAME_MAX 16
378  
379 typedef struct hndrte_dev {
380 char name[HNDRTE_DEV_NAME_MAX];
381 struct hndrte_devfuncs *funcs;
382 uint32 devid;
383 void *softc; /* Software context */
384 uint32 flags; /* RTEDEVFLAG_XXXX */
385 struct hndrte_dev *next;
386 struct hndrte_dev *chained;
387 void *pdev;
388 } hndrte_dev;
389  
390 struct hndrte_devfuncs {
391 void *(*probe)(struct hndrte_dev *dev, void *regs, uint bus,
392 uint16 device, uint coreid, uint unit);
393 int (*open)(struct hndrte_dev *dev);
394 int (*close)(struct hndrte_dev *dev);
395 int (*xmit)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
396 int (*recv)(struct hndrte_dev *src, struct hndrte_dev *dev, void *pkt);
397 int (*ioctl)(struct hndrte_dev *dev, uint32 cmd, void *buffer, int len,
398 int *used, int *needed, int set);
399 void (*txflowcontrol) (struct hndrte_dev *dev, bool state, int prio);
400 void (*poll)(struct hndrte_dev *dev);
401 int (*xmit_ctl)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
402 int (*xmit2)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb, int8 ch);
403 };
404  
405 struct tunables {
406 char gap[62];
407 short somebnd; // @ 0x38
408 short rxbnd; // @ 0x40
409 };
410  
411 struct wlc_hwband {
412 int bandtype; /* 0x00 */
413 int bandunit; /* 0x04 */
414 char mhfs; /* 0x05 */
415 char PAD[10]; /* 0x06 */
416 char bandhw_stf_ss_mode; /* 0x13 */
417 short CWmin; /* 0x14 */
418 short CWmax; /* 0x16 */
419 int core_flags; /* 0x18 */
420 short phytype; /* 0x1C */
421 short phyrev; /* 0x1E */
422 short radioid; /* 0x20 */
423 short radiorev; /* 0x22 */
424 void *pi; /* 0x24 */ // checked for bcm4358
425 char abgphy_encore; /* 0x25 */
426 };
427  
428 /**
429 * Name might be inaccurate
430 */
431 struct device {
432 char name[16];
433 void *init_function;
434 int PAD;
435 void *some_device_info;
436 int PAD;
437 int PAD;
438 struct device *bound_device;
439 };
440  
441 /**
442 * Name might be inaccurate
443 */
444 struct wl_info {
445 int unit;
446 struct wlc_pub *pub;
447 struct wlc_info *wlc;
448 struct wlc_hw_info *wlc_hw;
449 struct hndrte_dev *dev; // 0x10
450 };
451  
452 /**
453 * Name might be inaccurate
454 */
455 struct sdiox_info {
456 int unit;
457 void *something;
458 void *sdio; // sdio_info struct
459 void *osh;
460 void *device_address;
461 } __attribute__((packed));
462  
463 struct wlcband {
464 int bandtype; /* 0x000 */
465 int bandunit; /* 0x004 */
466 short phytype; /* 0x008 */
467 short phyrev; /* 0x00A */
468 short radioid; /* 0x00C */
469 short radiorev; /* 0x00E */
470 void *pi; /* 0x010 */
471 char abgphy_encore; /* 0x014 */
472 char gmode; /* 0x015 */
473 char PAD; /* 0x016 */
474 char PAD; /* 0x017 */
475 void *hwrs_scb; /* 0x018 */
476 int defrateset; /* 0x01C */
477 int rspec_override; /* 0x020 */
478 int mrspec_override; /* 0x024 */
479 char band_stf_ss_mode; /* 0x028 */
480 char band_stf_stbc_tx; /* 0x029 */
481 int hw_rateset; /* 0x030 */
482 char basic_rate; /* 0x034 */
483 } __attribute__((packed));
484  
485 struct wlc_info {
486 struct wlc_pub *pub; /* 0x000 */
487 struct osl_info *osh; /* 0x004 */
488 void *wl; /* 0x008 */
489 volatile struct d11regs *regs; /* 0x00C */
490 struct wlc_hw_info *hw; /* 0x010 */
491 int PAD; /* 0x014 */
492 int PAD; /* 0x018 */
493 void *core; /* 0x01C */
494 struct wlcband *band; /* 0x020 verified */
495 int PAD; /* 0x024 */
496 struct wlcband *bandstate[2]; /* 0x028 */
497 int PAD; /* 0x030 */
498 int PAD; /* 0x034 */
499 int PAD; /* 0x038 */
500 int PAD; /* 0x03C */
501 int PAD; /* 0x040 */
502 int PAD; /* 0x044 */
503 int PAD; /* 0x048 */
504 int PAD; /* 0x04C */
505 int PAD; /* 0x050 */
506 int PAD; /* 0x054 */
507 int PAD; /* 0x058 */
508 int PAD; /* 0x05C */
509 int PAD; /* 0x060 */
510 int PAD; /* 0x064 */
511 int PAD; /* 0x068 */
512 int PAD; /* 0x06C */
513 int PAD; /* 0x070 */
514 int PAD; /* 0x074 */
515 int PAD; /* 0x078 */
516 int PAD; /* 0x07C */
517 int PAD; /* 0x080 */
518 int PAD; /* 0x084 */
519 int PAD; /* 0x088 */
520 int PAD; /* 0x08C */
521 int PAD; /* 0x090 */
522 int PAD; /* 0x094 */
523 int PAD; /* 0x098 */
524 int PAD; /* 0x09C */
525 int PAD; /* 0x0A0 */
526 int PAD; /* 0x0A4 */
527 int PAD; /* 0x0A8 */
528 int PAD; /* 0x0AC */
529 int PAD; /* 0x0B0 */
530 int PAD; /* 0x0B4 */
531 int PAD; /* 0x0B8 */
532 int PAD; /* 0x0BC */
533 int PAD; /* 0x0C0 */
534 int PAD; /* 0x0C4 */
535 int PAD; /* 0x0C8 */
536 int PAD; /* 0x0CC */
537 int PAD; /* 0x0D0 */
538 int PAD; /* 0x0D4 */
539 int PAD; /* 0x0D8 */
540 int PAD; /* 0x0DC */
541 int PAD; /* 0x0E0 */
542 int PAD; /* 0x0E4 */
543 int PAD; /* 0x0E8 */
544 int PAD; /* 0x0EC */
545 int PAD; /* 0x0F0 */
546 int PAD; /* 0x0F4 */
547 int PAD; /* 0x0F8 */
548 int PAD; /* 0x0FC */
549 int PAD; /* 0x100 */
550 int PAD; /* 0x104 */
551 int PAD; /* 0x108 */
552 int PAD; /* 0x10C */
553 int PAD; /* 0x110 */
554 int PAD; /* 0x114 */
555 int PAD; /* 0x118 */
556 int PAD; /* 0x11C */
557 int PAD; /* 0x120 */
558 int PAD; /* 0x124 */
559 int PAD; /* 0x128 */
560 int PAD; /* 0x12C */
561 int PAD; /* 0x130 */
562 int PAD; /* 0x134 */
563 int PAD; /* 0x138 */
564 int PAD; /* 0x13C */
565 int PAD; /* 0x140 */
566 int PAD; /* 0x144 */
567 int PAD; /* 0x148 */
568 int PAD; /* 0x14C */
569 int PAD; /* 0x150 */
570 int PAD; /* 0x154 */
571 int PAD; /* 0x158 */
572 void *cmi; /* 0x15C */
573 int PAD; /* 0x160 */
574 int PAD; /* 0x164 */
575 void *scan; /* 0x168 */ // verified for bcm4358
576 int PAD; /* 0x16C */
577 int PAD; /* 0x170 */
578 int PAD; /* 0x174 */
579 int PAD; /* 0x178 */
580 int PAD; /* 0x17C */
581 int PAD; /* 0x180 */
582 int PAD; /* 0x184 */
583 int PAD; /* 0x188 */
584 int PAD; /* 0x18C */
585 int PAD; /* 0x190 */
586 int PAD; /* 0x194 */
587 int PAD; /* 0x198 */
588 int PAD; /* 0x19C */
589 int PAD; /* 0x1A0 */
590 int PAD; /* 0x1A4 */
591 int PAD; /* 0x1A8 */
592 int PAD; /* 0x1AC */
593 int PAD; /* 0x1B0 */
594 int PAD; /* 0x1B4 */
595 int PAD; /* 0x1B8 */
596 int PAD; /* 0x1BC */
597 int PAD; /* 0x1C0 */
598 int PAD; /* 0x1C4 */
599 short PAD; /* 0x1C8 */
600 char bandlocked; /* 0x1CA */
601 char field_1CB; /* 0x1CB */
602 int PAD; /* 0x1CC */
603 int PAD; /* 0x1D0 */
604 int PAD; /* 0x1D4 */
605 int PAD; /* 0x1D8 */
606 int PAD; /* 0x1DC */
607 int PAD; /* 0x1E0 */
608 int PAD; /* 0x1E4 */
609 int PAD; /* 0x1E8 */
610 int PAD; /* 0x1EC */
611 int PAD; /* 0x1F0 */
612 int PAD; /* 0x1F4 */
613 int PAD; /* 0x1F8 */
614 int PAD; /* 0x1FC */
615 int PAD; /* 0x200 */
616 int PAD; /* 0x204 */
617 int monitor; /* 0x208 */
618 int bcnmisc_ibss; /* 0x20C */
619 int bcnmisc_scan; /* 0x210 */
620 int bcnmisc_monitor; /* 0x214 */
621 int PAD; /* 0x218 */
622 int PAD; /* 0x21C */
623 int PAD; /* 0x220 */
624 int PAD; /* 0x224 */
625 short PAD; /* 0x228 */
626 short wme_dp; /* 0x22A */
627 int PAD; /* 0x22C */
628 int PAD; /* 0x230 */
629 int PAD; /* 0x234 */
630 int PAD; /* 0x238 */
631 int PAD; /* 0x23C */
632 int PAD; /* 0x240 */
633 int PAD; /* 0x244 */
634 int PAD; /* 0x248 */
635 unsigned short tx_prec_map; /* 0x24C */
636 short PAD; /* 0x24E */
637 int PAD; /* 0x250 */
638 int PAD; /* 0x254 */
639 int PAD; /* 0x258 */
640 int PAD; /* 0x25C */
641 int PAD; /* 0x260 */
642 int PAD; /* 0x264 */
643 int PAD; /* 0x268 */
644 int PAD; /* 0x26C */
645 int PAD; /* 0x270 */
646 int PAD; /* 0x274 */
647 int PAD; /* 0x278 */
648 int PAD; /* 0x27C */
649 int PAD; /* 0x280 */
650 int PAD; /* 0x284 */
651 int PAD; /* 0x288 */
652 int PAD; /* 0x28C */
653 int PAD; /* 0x290 */
654 int PAD; /* 0x294 */
655 int PAD; /* 0x298 */
656 int PAD; /* 0x29C */
657 int PAD; /* 0x2A0 */
658 int PAD; /* 0x2A4 */
659 int PAD; /* 0x2A8 */
660 int PAD; /* 0x2AC */
661 int PAD; /* 0x2B0 */
662 int PAD; /* 0x2B4 */
663 int PAD; /* 0x2B8 */
664 int PAD; /* 0x2BC */
665 int PAD; /* 0x2C0 */
666 int PAD; /* 0x2C4 */
667 int PAD; /* 0x2C8 */
668 int PAD; /* 0x2CC */
669 int PAD; /* 0x2D0 */
670 int PAD; /* 0x2D4 */
671 int PAD; /* 0x2D8 */
672 int PAD; /* 0x2DC */
673 int PAD; /* 0x2E0 */
674 int PAD; /* 0x2E4 */
675 int PAD; /* 0x2E8 */
676 int PAD; /* 0x2EC */
677 int PAD; /* 0x2F0 */
678 int PAD; /* 0x2F4 */
679 int PAD; /* 0x2F8 */
680 int PAD; /* 0x2FC */
681 int PAD; /* 0X300 */
682 int PAD; /* 0X304 */
683 int PAD; /* 0X308 */
684 int PAD; /* 0X30C */
685 int PAD; /* 0X310 */
686 int PAD; /* 0X314 */
687 int PAD; /* 0X318 */
688 int PAD; /* 0X31C */
689 int PAD; /* 0X320 */
690 int PAD; /* 0X324 */
691 int PAD; /* 0X328 */
692 int PAD; /* 0X32C */
693 int PAD; /* 0X330 */
694 int PAD; /* 0X334 */
695 int PAD; /* 0X338 */
696 void *scan_results; /* 0X33C */
697 int PAD; /* 0X340 */
698 void *custom_scan_results; /* 0X344 */
699 int PAD; /* 0X348 */
700 int PAD; /* 0X34C */
701 int PAD; /* 0X350 */
702 int PAD; /* 0X354 */
703 int PAD; /* 0X358 */
704 int PAD; /* 0X35C */
705 int PAD; /* 0X360 */
706 short *field_364; /* 0X364 */
707 int PAD; /* 0X368 */
708 int PAD; /* 0X36C */
709 int PAD; /* 0X370 */
710 int PAD; /* 0X374 */
711 int PAD; /* 0X378 */
712 int PAD; /* 0X37C */
713 int PAD; /* 0X380 */
714 int PAD; /* 0X384 */
715 int PAD; /* 0X388 */
716 int PAD; /* 0X38C */
717 int PAD; /* 0X390 */
718 int PAD; /* 0X394 */
719 int PAD; /* 0X398 */
720 int PAD; /* 0X39C */
721 int PAD; /* 0X3A0 */
722 int PAD; /* 0X3A4 */
723 int PAD; /* 0X3A8 */
724 int PAD; /* 0X3AC */
725 int PAD; /* 0X3B0 */
726 int PAD; /* 0X3B4 */
727 int PAD; /* 0X3B8 */
728 int PAD; /* 0X3BC */
729 int PAD; /* 0X3C0 */
730 int PAD; /* 0X3C4 */
731 int PAD; /* 0X3C8 */
732 int PAD; /* 0X3CC */
733 int PAD; /* 0X3D0 */
734 int PAD; /* 0X3D4 */
735 int PAD; /* 0X3D8 */
736 int PAD; /* 0X3DC */
737 int PAD; /* 0X3E0 */
738 int PAD; /* 0X3E4 */
739 int PAD; /* 0X3E8 */
740 int PAD; /* 0X3EC */
741 int PAD; /* 0X3F0 */
742 int PAD; /* 0X3F4 */
743 int PAD; /* 0X3F8 */
744 int PAD; /* 0X3FC */
745 int PAD; /* 0X400 */
746 int PAD; /* 0X404 */
747 int PAD; /* 0X408 */
748 int PAD; /* 0X40C */
749 int PAD; /* 0X410 */
750 int PAD; /* 0X414 */
751 int PAD; /* 0X418 */
752 int PAD; /* 0X41C */
753 int PAD; /* 0X420 */
754 int PAD; /* 0X424 */
755 int PAD; /* 0X428 */
756 int PAD; /* 0X42C */
757 int PAD; /* 0X430 */
758 int PAD; /* 0X434 */
759 int PAD; /* 0X438 */
760 int PAD; /* 0X43C */
761 int PAD; /* 0X440 */
762 int PAD; /* 0X444 */
763 int PAD; /* 0X448 */
764 int PAD; /* 0X44C */
765 int PAD; /* 0X450 */
766 int PAD; /* 0X454 */
767 int PAD; /* 0X458 */
768 int PAD; /* 0X45C */
769 int PAD; /* 0X460 */
770 int PAD; /* 0X464 */
771 int PAD; /* 0X468 */
772 int PAD; /* 0X46C */
773 int PAD; /* 0X470 */
774 int PAD; /* 0X474 */
775 int PAD; /* 0X478 */
776 int PAD; /* 0X47C */
777 int PAD; /* 0X480 */
778 int PAD; /* 0X484 */
779 int PAD; /* 0X488 */
780 int PAD; /* 0X48C */
781 int PAD; /* 0X490 */
782 int PAD; /* 0X494 */
783 int PAD; /* 0X498 */
784 int PAD; /* 0X49C */
785 int PAD; /* 0X4A0 */
786 int PAD; /* 0X4A4 */
787 int PAD; /* 0X4A8 */
788 int PAD; /* 0X4AC */
789 int PAD; /* 0X4B0 */
790 int PAD; /* 0X4B4 */
791 int PAD; /* 0X4B8 */
792 int PAD; /* 0X4BC */
793 int PAD; /* 0X4C0 */
794 int PAD; /* 0X4C4 */
795 int PAD; /* 0X4C8 */
796 int PAD; /* 0X4CC */
797 int PAD; /* 0X4D0 */
798 int PAD; /* 0X4D4 */
799 int PAD; /* 0X4D8 */
800 int PAD; /* 0X4DC */
801 int PAD; /* 0X4E0 */
802 int PAD; /* 0X4E4 */
803 int PAD; /* 0X4E8 */
804 int PAD; /* 0X4EC */
805 int PAD; /* 0X4F0 */
806 int PAD; /* 0X4F4 */
807 int PAD; /* 0X4F8 */
808 int PAD; /* 0X4FC */
809 int PAD; /* 0X500 */
810 int PAD; /* 0X504 */
811 int PAD; /* 0X508 */
812 int PAD; /* 0X50C */
813 short some_chanspec; /* 0X510 */
814 short PAD; /* 0X512 */
815 int PAD; /* 0X514 */
816 int PAD; /* 0X518 */
817 int PAD; /* 0X51C */
818 int PAD; /* 0X520 */
819 int PAD; /* 0X524 */
820 int PAD; /* 0X528 */
821 int PAD; /* 0X52C */
822 int PAD; /* 0X530 */
823 int PAD; /* 0X534 */
824 int PAD; /* 0X538 */
825 int PAD; /* 0X53C */
826 int PAD; /* 0X540 */
827 int PAD; /* 0X544 */
828 int PAD; /* 0X548 */
829 int PAD; /* 0X54C */
830 int PAD; /* 0X550 */
831 int PAD; /* 0X554 */
832 int PAD; /* 0X558 */
833 int PAD; /* 0X55C */
834 int PAD; /* 0X560 */
835 int PAD; /* 0X564 */
836 int PAD; /* 0X568 */
837 int PAD; /* 0X56C */
838 int PAD; /* 0X570 */
839 int PAD; /* 0X574 */
840 int PAD; /* 0X578 */
841 int PAD; /* 0X57C */
842 int PAD; /* 0X580 */
843 int PAD; /* 0X584 */
844 int PAD; /* 0X588 */
845 int PAD; /* 0X58C */
846 int PAD; /* 0X590 */
847 int PAD; /* 0X594 */
848 int PAD; /* 0X598 */
849 int PAD; /* 0X59C */
850 int PAD; /* 0X5A0 */
851 int PAD; /* 0X5A4 */
852 int PAD; /* 0X5A8 */
853 int PAD; /* 0X5AC */
854 int PAD; /* 0X5B0 */
855 int PAD; /* 0X5B4 */
856 int PAD; /* 0X5B8 */
857 int PAD; /* 0X5BC */
858 void *active_queue; /* 0X5C0 verified */
859 int PAD; /* 0X5C4 */
860 int PAD; /* 0X5C8 */
861 int PAD; /* 0X5CC */
862 int PAD; /* 0X5D0 */
863 int PAD; /* 0X5D4 */
864 int PAD; /* 0X5D8 */
865 int PAD; /* 0X5DC */
866 int PAD; /* 0X5E0 */
867 int PAD; /* 0X5E4 */
868 int PAD; /* 0X5E8 */
869 int PAD; /* 0X5EC */
870 int PAD; /* 0X5F0 */
871 int PAD; /* 0X5F4 */
872 int PAD; /* 0X5F8 */
873 int PAD; /* 0X5FC */
874 };
875  
876 struct wlc_pub {
877 struct wlc_info *wlc; /* 0x000 */
878 int PAD; /* 0x004 */
879 int PAD; /* 0x008 */
880 int PAD; /* 0x00C */
881 int PAD; /* 0x010 */
882 void *osh; /* 0x014 */
883 int PAD; /* 0x018 */
884 int PAD; /* 0x01C */
885 int PAD; /* 0x020 */
886 char up_maybe; /* 0x024 */
887 char field_25; /* 0x025 */
888 char field_26; /* 0x026 */
889 char field_27; /* 0x027 */
890 struct tunables *tunables; /* 0x028 */
891 int PAD; /* 0x02C */
892 int field_30; /* 0x030 */
893 int PAD; /* 0x034 */
894 int PAD; /* 0x038 */
895 int PAD; /* 0x03C */
896 int PAD; /* 0x040 */
897 char PAD; /* 0x044 */
898 char PAD; /* 0x045 */
899 char field_46; /* 0x046 */
900 char PAD; /* 0x047 */
901 int PAD; /* 0x048 */
902 char associated; /* 0x04C */
903 char PAD; /* 0x04D */
904 char PAD; /* 0x04E */
905 char PAD; /* 0x04F */
906 int PAD; /* 0x050 */
907 char gap2[147];
908 char is_amsdu; // @ 0xe7
909 } __attribute__((packed));
910  
911 struct wlc_bsscfg {
912 void *wlc; /* 0x000 */
913 char associated; /* 0x004 */
914 char PAD; /* 0x005 */
915 char PAD; /* 0x006 */
916 char PAD; /* 0x007 */
917 int PAD; /* 0x008 */
918 int PAD; /* 0x00C */
919 int PAD; /* 0x010 */
920 int PAD; /* 0x014 */
921 int PAD; /* 0x018 */
922 int PAD; /* 0x01C */
923 int PAD; /* 0x020 */
924 int PAD; /* 0x024 */
925 int PAD; /* 0x028 */
926 int PAD; /* 0x02C */
927 int PAD; /* 0x030 */
928 int PAD; /* 0x034 */
929 int PAD; /* 0x038 */
930 int PAD; /* 0x03C */
931 int PAD; /* 0x040 */
932 int PAD; /* 0x044 */
933 int PAD; /* 0x048 */
934 int PAD; /* 0x04C */
935 int PAD; /* 0x050 */
936 int PAD; /* 0x054 */
937 int PAD; /* 0x058 */
938 int PAD; /* 0x05C */
939 int PAD; /* 0x060 */
940 int PAD; /* 0x064 */
941 int PAD; /* 0x068 */
942 int PAD; /* 0x06C */
943 int PAD; /* 0x070 */
944 int PAD; /* 0x074 */
945 int PAD; /* 0x078 */
946 int PAD; /* 0x07C */
947 int PAD; /* 0x080 */
948 int PAD; /* 0x084 */
949 int PAD; /* 0x088 */
950 int PAD; /* 0x08C */
951 int PAD; /* 0x090 */
952 int PAD; /* 0x094 */
953 int PAD; /* 0x098 */
954 int PAD; /* 0x09C */
955 int PAD; /* 0x0A0 */
956 int PAD; /* 0x0A4 */
957 int PAD; /* 0x0A8 */
958 int PAD; /* 0x0AC */
959 int PAD; /* 0x0B0 */
960 int PAD; /* 0x0B4 */
961 int PAD; /* 0x0B8 */
962 int PAD; /* 0x0BC */
963 int PAD; /* 0x0C0 */
964 int PAD; /* 0x0C4 */
965 int PAD; /* 0x0C8 */
966 int PAD; /* 0x0CC */
967 int PAD; /* 0x0D0 */
968 int PAD; /* 0x0D4 */
969 int PAD; /* 0x0D8 */
970 int PAD; /* 0x0DC */
971 int PAD; /* 0x0E0 */
972 int PAD; /* 0x0E4 */
973 int PAD; /* 0x0E8 */
974 int PAD; /* 0x0EC */
975 int PAD; /* 0x0F0 */
976 int PAD; /* 0x0F4 */
977 int PAD; /* 0x0F8 */
978 int PAD; /* 0x0FC */
979 int PAD; /* 0x100 */
980 int PAD; /* 0x104 */
981 int PAD; /* 0x108 */
982 int PAD; /* 0x10C */
983 int PAD; /* 0x110 */
984 int PAD; /* 0x114 */
985 int PAD; /* 0x118 */
986 int PAD; /* 0x11C */
987 int PAD; /* 0x120 */
988 int PAD; /* 0x124 */
989 int PAD; /* 0x128 */
990 int PAD; /* 0x12C */
991 int PAD; /* 0x130 */
992 int PAD; /* 0x134 */
993 int PAD; /* 0x138 */
994 int PAD; /* 0x13C */
995 int PAD; /* 0x140 */
996 int PAD; /* 0x144 */
997 int PAD; /* 0x148 */
998 int PAD; /* 0x14C */
999 int PAD; /* 0x150 */
1000 int PAD; /* 0x154 */
1001 int PAD; /* 0x158 */
1002 int PAD; /* 0x15C */
1003 int PAD; /* 0x160 */
1004 int PAD; /* 0x164 */
1005 int PAD; /* 0x168 */
1006 int PAD; /* 0x16C */
1007 int PAD; /* 0x170 */
1008 int PAD; /* 0x174 */
1009 int PAD; /* 0x178 */
1010 int PAD; /* 0x17C */
1011 int PAD; /* 0x180 */
1012 int PAD; /* 0x184 */
1013 int PAD; /* 0x188 */
1014 int PAD; /* 0x18C */
1015 int PAD; /* 0x190 */
1016 int PAD; /* 0x194 */
1017 int PAD; /* 0x198 */
1018 int PAD; /* 0x19C */
1019 int PAD; /* 0x1A0 */
1020 int PAD; /* 0x1A4 */
1021 int PAD; /* 0x1A8 */
1022 int PAD; /* 0x1AC */
1023 int PAD; /* 0x1B0 */
1024 int PAD; /* 0x1B4 */
1025 int PAD; /* 0x1B8 */
1026 int PAD; /* 0x1BC */
1027 int PAD; /* 0x1C0 */
1028 int PAD; /* 0x1C4 */
1029 int PAD; /* 0x1C8 */
1030 int PAD; /* 0x1CC */
1031 int PAD; /* 0x1D0 */
1032 int PAD; /* 0x1D4 */
1033 int PAD; /* 0x1D8 */
1034 int PAD; /* 0x1DC */
1035 int PAD; /* 0x1E0 */
1036 int PAD; /* 0x1E4 */
1037 int PAD; /* 0x1E8 */
1038 int PAD; /* 0x1EC */
1039 int PAD; /* 0x1F0 */
1040 int PAD; /* 0x1F4 */
1041 int PAD; /* 0x1F8 */
1042 int PAD; /* 0x1FC */
1043 int PAD; /* 0x200 */
1044 int PAD; /* 0x204 */
1045 int PAD; /* 0x208 */
1046 int PAD; /* 0x20C */
1047 int PAD; /* 0x210 */
1048 int PAD; /* 0x214 */
1049 int PAD; /* 0x218 */
1050 int PAD; /* 0x21C */
1051 int PAD; /* 0x220 */
1052 int PAD; /* 0x224 */
1053 int PAD; /* 0x228 */
1054 int PAD; /* 0x22C */
1055 int PAD; /* 0x230 */
1056 int PAD; /* 0x234 */
1057 int PAD; /* 0x238 */
1058 int PAD; /* 0x23C */
1059 int PAD; /* 0x240 */
1060 int PAD; /* 0x244 */
1061 int PAD; /* 0x248 */
1062 int PAD; /* 0x24C */
1063 int PAD; /* 0x250 */
1064 int PAD; /* 0x254 */
1065 int PAD; /* 0x258 */
1066 int PAD; /* 0x25C */
1067 int PAD; /* 0x260 */
1068 int PAD; /* 0x264 */
1069 int PAD; /* 0x268 */
1070 int PAD; /* 0x26C */
1071 int PAD; /* 0x270 */
1072 int PAD; /* 0x274 */
1073 int PAD; /* 0x278 */
1074 int PAD; /* 0x27C */
1075 int PAD; /* 0x280 */
1076 int PAD; /* 0x284 */
1077 int PAD; /* 0x288 */
1078 int PAD; /* 0x28C */
1079 int PAD; /* 0x290 */
1080 int PAD; /* 0x294 */
1081 int PAD; /* 0x298 */
1082 int PAD; /* 0x29C */
1083 int PAD; /* 0x2A0 */
1084 int PAD; /* 0x2A4 */
1085 int PAD; /* 0x2A8 */
1086 int PAD; /* 0x2AC */
1087 int PAD; /* 0x2B0 */
1088 int PAD; /* 0x2B4 */
1089 int PAD; /* 0x2B8 */
1090 int PAD; /* 0x2BC */
1091 int PAD; /* 0x2C0 */
1092 int PAD; /* 0x2C4 */
1093 int PAD; /* 0x2C8 */
1094 int PAD; /* 0x2CC */
1095 int PAD; /* 0x2D0 */
1096 int PAD; /* 0x2D4 */
1097 int PAD; /* 0x2D8 */
1098 int PAD; /* 0x2DC */
1099 int PAD; /* 0x2E0 */
1100 int PAD; /* 0x2E4 */
1101 int PAD; /* 0x2E8 */
1102 int PAD; /* 0x2EC */
1103 int PAD; /* 0x2F0 */
1104 int PAD; /* 0x2F4 */
1105 int PAD; /* 0x2F8 */
1106 int PAD; /* 0x2FC */
1107 int PAD; /* 0X300 */
1108 int PAD; /* 0X304 */
1109 int PAD; /* 0X308 */
1110 int PAD; /* 0X30C */
1111 int PAD; /* 0X310 */
1112 int PAD; /* 0X314 */
1113 int PAD; /* 0X318 */
1114 int PAD; /* 0X31C */
1115 int PAD; /* 0X320 */
1116 int PAD; /* 0X324 */
1117 int PAD; /* 0X328 */
1118 int PAD; /* 0X32C */
1119 int PAD; /* 0X330 */
1120 int PAD; /* 0X334 */
1121 int PAD; /* 0X338 */
1122 int PAD; /* 0X33C */
1123 int PAD; /* 0X340 */
1124 int PAD; /* 0X344 */
1125 int PAD; /* 0X348 */
1126 int PAD; /* 0X34C */
1127 int PAD; /* 0X350 */
1128 int PAD; /* 0X354 */
1129 int PAD; /* 0X358 */
1130 int PAD; /* 0X35C */
1131 int PAD; /* 0X360 */
1132 int PAD; /* 0X364 */
1133 int PAD; /* 0X368 */
1134 int PAD; /* 0X36C */
1135 int PAD; /* 0X370 */
1136 int PAD; /* 0X374 */
1137 int PAD; /* 0X378 */
1138 int PAD; /* 0X37C */
1139 int PAD; /* 0X380 */
1140 int PAD; /* 0X384 */
1141 int PAD; /* 0X388 */
1142 int PAD; /* 0X38C */
1143 int PAD; /* 0X390 */
1144 int PAD; /* 0X394 */
1145 int PAD; /* 0X398 */
1146 int PAD; /* 0X39C */
1147 int PAD; /* 0X3A0 */
1148 int PAD; /* 0X3A4 */
1149 int PAD; /* 0X3A8 */
1150 int PAD; /* 0X3AC */
1151 int PAD; /* 0X3B0 */
1152 int PAD; /* 0X3B4 */
1153 int PAD; /* 0X3B8 */
1154 int PAD; /* 0X3BC */
1155 int PAD; /* 0X3C0 */
1156 int PAD; /* 0X3C4 */
1157 int PAD; /* 0X3C8 */
1158 int PAD; /* 0X3CC */
1159 int PAD; /* 0X3D0 */
1160 int PAD; /* 0X3D4 */
1161 int PAD; /* 0X3D8 */
1162 int PAD; /* 0X3DC */
1163 int PAD; /* 0X3E0 */
1164 int PAD; /* 0X3E4 */
1165 int PAD; /* 0X3E8 */
1166 int PAD; /* 0X3EC */
1167 int PAD; /* 0X3F0 */
1168 int PAD; /* 0X3F4 */
1169 int PAD; /* 0X3F8 */
1170 int PAD; /* 0X3FC */
1171 int PAD; /* 0X400 */
1172 int PAD; /* 0X404 */
1173 int PAD; /* 0X408 */
1174 int PAD; /* 0X40C */
1175 int PAD; /* 0X410 */
1176 int PAD; /* 0X414 */
1177 int PAD; /* 0X418 */
1178 int PAD; /* 0X41C */
1179 int PAD; /* 0X420 */
1180 int PAD; /* 0X424 */
1181 int PAD; /* 0X428 */
1182 int PAD; /* 0X42C */
1183 int PAD; /* 0X430 */
1184 int PAD; /* 0X434 */
1185 int PAD; /* 0X438 */
1186 int PAD; /* 0X43C */
1187 int PAD; /* 0X440 */
1188 int PAD; /* 0X444 */
1189 int PAD; /* 0X448 */
1190 int PAD; /* 0X44C */
1191 int PAD; /* 0X450 */
1192 int PAD; /* 0X454 */
1193 int PAD; /* 0X458 */
1194 int PAD; /* 0X45C */
1195 int PAD; /* 0X460 */
1196 int PAD; /* 0X464 */
1197 int PAD; /* 0X468 */
1198 int PAD; /* 0X46C */
1199 int PAD; /* 0X470 */
1200 int PAD; /* 0X474 */
1201 int PAD; /* 0X478 */
1202 int PAD; /* 0X47C */
1203 int PAD; /* 0X480 */
1204 int PAD; /* 0X484 */
1205 int PAD; /* 0X488 */
1206 int PAD; /* 0X48C */
1207 int PAD; /* 0X490 */
1208 int PAD; /* 0X494 */
1209 int PAD; /* 0X498 */
1210 int PAD; /* 0X49C */
1211 int PAD; /* 0X4A0 */
1212 int PAD; /* 0X4A4 */
1213 int PAD; /* 0X4A8 */
1214 int PAD; /* 0X4AC */
1215 int PAD; /* 0X4B0 */
1216 int PAD; /* 0X4B4 */
1217 int PAD; /* 0X4B8 */
1218 int PAD; /* 0X4BC */
1219 int PAD; /* 0X4C0 */
1220 int PAD; /* 0X4C4 */
1221 int PAD; /* 0X4C8 */
1222 int PAD; /* 0X4CC */
1223 int PAD; /* 0X4D0 */
1224 int PAD; /* 0X4D4 */
1225 int PAD; /* 0X4D8 */
1226 int PAD; /* 0X4DC */
1227 int PAD; /* 0X4E0 */
1228 int PAD; /* 0X4E4 */
1229 int PAD; /* 0X4E8 */
1230 int PAD; /* 0X4EC */
1231 int PAD; /* 0X4F0 */
1232 int PAD; /* 0X4F4 */
1233 int PAD; /* 0X4F8 */
1234 int PAD; /* 0X4FC */
1235 int PAD; /* 0X500 */
1236 int PAD; /* 0X504 */
1237 int PAD; /* 0X508 */
1238 int PAD; /* 0X50C */
1239 int PAD; /* 0X510 */
1240 int PAD; /* 0X514 */
1241 int PAD; /* 0X518 */
1242 int PAD; /* 0X51C */
1243 int PAD; /* 0X520 */
1244 int PAD; /* 0X524 */
1245 int PAD; /* 0X528 */
1246 int PAD; /* 0X52C */
1247 int PAD; /* 0X530 */
1248 int PAD; /* 0X534 */
1249 int PAD; /* 0X538 */
1250 int PAD; /* 0X53C */
1251 int PAD; /* 0X540 */
1252 short PAD; /* 0X544 */
1253 short field_546; /* 0X546 */
1254 int PAD; /* 0X548 */
1255 int PAD; /* 0X54C */
1256 int PAD; /* 0X550 */
1257 int PAD; /* 0X554 */
1258 int PAD; /* 0X558 */
1259 int PAD; /* 0X55C */
1260 int PAD; /* 0X560 */
1261 int PAD; /* 0X564 */
1262 int PAD; /* 0X568 */
1263 int PAD; /* 0X56C */
1264 int PAD; /* 0X570 */
1265 int PAD; /* 0X574 */
1266 int PAD; /* 0X578 */
1267 int PAD; /* 0X57C */
1268 int PAD; /* 0X580 */
1269 int PAD; /* 0X584 */
1270 } __attribute__((packed));
1271  
1272 struct hnddma_pub {
1273 void *di_fn; /* DMA function pointers */
1274 unsigned int txavail; /* # free tx descriptors */
1275 unsigned int dmactrlflags; /* dma control flags */
1276 /* rx error counters */
1277 unsigned int rxgiants; /* rx giant frames */
1278 unsigned int rxnobuf; /* rx out of dma descriptors */
1279 /* tx error counters */
1280 unsigned int txnobuf; /* tx out of dma descriptors */
1281 } __attribute__((packed));
1282  
1283 struct dma_info {
1284 struct hnddma_pub hnddma; /* exported structure */
1285 int msg_level; /* message level pointer */
1286 int something;
1287 char name[8]; /* callers name for diag msgs */
1288 void *osh;
1289 void *sih;
1290 bool dma64; /* this dma engine is operating in 64-bit mode */
1291 bool addrext; /* this dma engine supports DmaExtendedAddrChanges */
1292 char gap2[2];
1293 void *txregs; /* 64-bit dma tx engine registers */
1294 void *rxregs; /* 64-bit dma rx engine registers */
1295 void *txd; /* pointer to dma64 tx descriptor ring */
1296 void *rxd; /* pointer to dma64 rx descriptor ring */
1297 short dmadesc_align; /* alignment requirement for dma descriptors */
1298 short ntxd; /* # tx descriptors tunable */
1299 short txin; /* index of next descriptor to reclaim */
1300 short txout; /* index of next descriptor to post */
1301 void **txp; /* pointer to parallel array of pointers to packets */
1302 void *tx_dmah; /* DMA MAP meta-data handle */
1303 int txp_dmah;
1304 int txdpa; /* Aligned physical address of descriptor ring */
1305 int txdpaorig; /* Original physical address of descriptor ring */
1306 short txdalign; /* #bytes added to alloc'd mem to align txd */
1307 int txdalloc; /* #bytes allocated for the ring */
1308 int xmtptrbase; /* When using unaligned descriptors, the ptr register
1309 * is not just an index, it needs all 13 bits to be
1310 * an offset from the addr register.
1311 */
1312 short PAD;
1313 short nrxd;
1314 short rxin;
1315 short rxout;
1316 short PAD;
1317 void **rxp;
1318 int PAD;
1319 int PAD;
1320 int rxdpa;
1321 short rxdalign;
1322 short PAD;
1323 int PAD;
1324 int PAD;
1325 int PAD;
1326 int rxbufsize; /* rx buffer size in bytes, not including the extra headroom */
1327 int rxextrahdrroom; /* extra rx headroom. */
1328  
1329 } __attribute__((packed));
1330  
1331 struct intctrlregs {
1332 unsigned int intstatus;
1333 unsigned int intmask;
1334 };
1335  
1336 /* read: 32-bit register that can be read as 32-bit or as 2 16-bit
1337 * write: only low 16b-it half can be written
1338 */
1339 union pmqreg {
1340 unsigned int pmqhostdata; /* read only! */
1341 struct {
1342 unsigned short pmqctrlstatus; /* read/write */
1343 unsigned short PAD;
1344 } w;
1345 };
1346  
1347 /* dma registers per channel(xmt or rcv) */
1348 struct dma64regs {
1349 unsigned int control; /* enable, et al */
1350 unsigned int ptr; /* last descriptor posted to chip */
1351 unsigned int addrlow; /* desc ring base address low 32-bits (8K aligned) */
1352 unsigned int addrhigh; /* desc ring base address bits 63:32 (8K aligned) */
1353 unsigned int status0; /* current descriptor, xmt state */
1354 unsigned int status1; /* active descriptor, xmt error */
1355 };
1356  
1357 /* 4byte-wide pio register set per channel(xmt or rcv) */
1358 struct pio4regs {
1359 unsigned int fifocontrol;
1360 unsigned int fifodata;
1361 };
1362  
1363 struct fifo64 {
1364 struct dma64regs dmaxmt; /* dma tx */
1365 struct pio4regs piotx; /* pio tx */
1366 struct dma64regs dmarcv; /* dma rx */
1367 struct pio4regs piorx; /* pio rx */
1368 };
1369  
1370 struct dma32diag { /* diag access */
1371 unsigned int fifoaddr; /* diag address */
1372 unsigned int fifodatalow; /* low 32bits of data */
1373 unsigned int fifodatahigh; /* high 32bits of data */
1374 unsigned int pad; /* reserved */
1375 };
1376  
1377 struct phy_info_acphy {
1378 uint8 dac_mode; // 0x000 ??
1379 uint8 PAD; // 0x001
1380 uint16 bb_mult_save[1]; // 0x002 ??
1381 uint8 bb_mult_save_valid; // 0x004 ??
1382 uint8 PAD; // 0x005
1383 uint16 deaf_count; // 0x006 ??
1384 uint32 PAD; // 0x008
1385 uint32 PAD; // 0x00C
1386 uint32 PAD; // 0x010
1387 uint32 PAD; // 0x014
1388 uint32 PAD; // 0x018
1389 uint32 PAD; // 0x01C
1390 int PAD; // 0x020
1391 int PAD; // 0x024
1392 int PAD; // 0x028
1393 int PAD; // 0x02c
1394 int PAD; // 0x030
1395 int PAD; // 0x034
1396 int PAD; // 0x038
1397 int PAD; // 0x03c
1398 int PAD; // 0x040
1399 int PAD; // 0x044
1400 int PAD; // 0x048
1401 int PAD; // 0x04c
1402 int PAD; // 0x050
1403 int PAD; // 0x054
1404 int PAD; // 0x058
1405 int PAD; // 0x05c
1406 int PAD; // 0x060
1407 int PAD; // 0x064
1408 int PAD; // 0x068
1409 int PAD; // 0x06c
1410 int PAD; // 0x070
1411 int PAD; // 0x074
1412 int PAD; // 0x078
1413 int PAD; // 0x07c
1414 int PAD; // 0x080
1415 int PAD; // 0x084
1416 int PAD; // 0x088
1417 int PAD; // 0x08c
1418 int PAD; // 0x090
1419 int PAD; // 0x094
1420 int PAD; // 0x098
1421 int PAD; // 0x09c
1422 int PAD; // 0x0a0
1423 int PAD; // 0x0a4
1424 int PAD; // 0x0a8
1425 int PAD; // 0x0ac
1426 int PAD; // 0x0b0
1427 int PAD; // 0x0b4
1428 int PAD; // 0x0b8
1429 int PAD; // 0x0bc
1430 int PAD; // 0x0c0
1431 int PAD; // 0x0c4
1432 int PAD; // 0x0c8
1433 int PAD; // 0x0cc
1434 int PAD; // 0x0d0
1435 int PAD; // 0x0d4
1436 int PAD; // 0x0d8
1437 int PAD; // 0x0dc
1438 int PAD; // 0x0e0
1439 int PAD; // 0x0e4
1440 int PAD; // 0x0e8
1441 int PAD; // 0x0ec
1442 int PAD; // 0x0f0
1443 int PAD; // 0x0f4
1444 int PAD; // 0x0f8
1445 int PAD; // 0x0fc
1446 int PAD; // 0x100
1447 int PAD; // 0x104
1448 int PAD; // 0x108
1449 int PAD; // 0x10c
1450 //uint32 pstart; // 0x110 ??
1451 //uint32 pstop; // 0x114 ??
1452 //uint32 pfirst; // 0x118 ??
1453 //uint32 plast; // 0x11c ??
1454 int PAD; // 0x110
1455 int PAD; // 0x114
1456 int PAD; // 0x118
1457 int PAD; // 0x11c
1458 int PAD; // 0x120
1459 int PAD; // 0x124
1460 int PAD; // 0x128
1461 int PAD; // 0x12c
1462 int PAD; // 0x130
1463 int PAD; // 0x134
1464 int PAD; // 0x138
1465 int PAD; // 0x13c
1466 int PAD; // 0x140
1467 int PAD; // 0x144
1468 int PAD; // 0x148
1469 int PAD; // 0x14c
1470 int PAD; // 0x150
1471 int PAD; // 0x154
1472 int PAD; // 0x158
1473 int PAD; // 0x15c
1474 int PAD; // 0x160
1475 int PAD; // 0x164
1476 int PAD; // 0x168
1477 int PAD; // 0x16c
1478 int PAD; // 0x170
1479 int PAD; // 0x174
1480 int PAD; // 0x178
1481 int PAD; // 0x17c
1482 int PAD; // 0x180
1483 int PAD; // 0x184
1484 int PAD; // 0x188
1485 int PAD; // 0x18c
1486 int PAD; // 0x190
1487 int PAD; // 0x194
1488 int PAD; // 0x198
1489 int PAD; // 0x19c
1490 int PAD; // 0x1a0
1491 int PAD; // 0x1a4
1492 int PAD; // 0x1a8
1493 int PAD; // 0x1ac
1494 int PAD; // 0x1b0
1495 int PAD; // 0x1b4
1496 int PAD; // 0x1b8
1497 int PAD; // 0x1bc
1498 int PAD; // 0x1c0
1499 int PAD; // 0x1c4
1500 int PAD; // 0x1c8
1501 int PAD; // 0x1cc
1502 int PAD; // 0x1d0
1503 int PAD; // 0x1d4
1504 int PAD; // 0x1d8
1505 int PAD; // 0x1dc
1506 int PAD; // 0x1e0
1507 int PAD; // 0x1e4
1508 int PAD; // 0x1e8
1509 int PAD; // 0x1ec
1510 int PAD; // 0x1f0
1511 int PAD; // 0x1f4
1512 int PAD; // 0x1f8
1513 int PAD; // 0x1fc
1514 uint32 pstart; // 0x200 likely correct for bcm4358, verified location of ac_lpfCT_phyregs_orig through wlc_phy_lpf_hpc_override_acphy
1515 uint32 pstop; // 0x204 likely correct for bcm4358
1516 uint32 pfirst; // 0x208 likely correct for bcm4358
1517 uint32 plast; // 0x20c likely correct for bcm4358
1518 int PAD; // 0x210
1519 int PAD; // 0x214
1520 int PAD; // 0x218
1521 int PAD; // 0x21c
1522 int PAD; // 0x220
1523 int PAD; // 0x224
1524 int PAD; // 0x228
1525 int PAD; // 0x22c
1526 int PAD; // 0x230
1527 int PAD; // 0x234
1528 int PAD; // 0x238
1529 } __attribute__((packed));
1530  
1531 /*
1532 * Host Interface Registers
1533 */
1534 struct d11regs {
1535 /* Device Control ("semi-standard host registers") */
1536 unsigned int PAD[3]; /* 0x0 - 0x8 */
1537 unsigned int biststatus; /* 0xC */
1538 unsigned int biststatus2; /* 0x10 */
1539 unsigned int PAD; /* 0x14 */
1540 unsigned int gptimer; /* 0x18 */
1541 unsigned int usectimer; /* 0x1c *//* for corerev >= 26 */
1542  
1543 /* Interrupt Control *//* 0x20 */
1544 struct intctrlregs intctrlregs[8];
1545  
1546 unsigned int PAD[40]; /* 0x60 - 0xFC */
1547  
1548 unsigned int intrcvlazy[4]; /* 0x100 - 0x10C */
1549  
1550 unsigned int PAD[4]; /* 0x110 - 0x11c */
1551  
1552 unsigned int maccontrol; /* 0x120 */
1553 unsigned int maccommand; /* 0x124 */
1554 unsigned int macintstatus; /* 0x128 */
1555 unsigned int macintmask; /* 0x12C */
1556  
1557 /* Transmit Template Access */
1558 unsigned int tplatewrptr; /* 0x130 */
1559 unsigned int tplatewrdata; /* 0x134 */
1560 unsigned int PAD[2]; /* 0x138 - 0x13C */
1561  
1562 /* Power Management Queue (PMQ) registers */
1563 union pmqreg pmqreg; /* 0x140 */
1564 unsigned int pmqpatl; /* 0x144 */
1565 unsigned int pmqpath; /* 0x148 */
1566 unsigned int PAD; /* 0x14C */
1567  
1568 unsigned int chnstatus; /* 0x150 */
1569 unsigned int psmdebug; /* 0x154 */
1570 unsigned int phydebug; /* 0x158 */
1571 unsigned int machwcap; /* 0x15C */
1572  
1573 /* Extended Internal Objects */
1574 unsigned int objaddr; /* 0x160 */
1575 unsigned int objdata; /* 0x164 */
1576 unsigned int PAD[2]; /* 0x168 - 0x16c */
1577  
1578 unsigned int frmtxstatus; /* 0x170 */
1579 unsigned int frmtxstatus2; /* 0x174 */
1580 unsigned int PAD[2]; /* 0x178 - 0x17c */
1581  
1582 /* TSF host access */
1583 unsigned int tsf_timerlow; /* 0x180 */
1584 unsigned int tsf_timerhigh; /* 0x184 */
1585 unsigned int tsf_cfprep; /* 0x188 */
1586 unsigned int tsf_cfpstart; /* 0x18c */
1587 unsigned int tsf_cfpmaxdur32; /* 0x190 */
1588 unsigned int PAD[3]; /* 0x194 - 0x19c */
1589  
1590 unsigned int maccontrol1; /* 0x1a0 */
1591 unsigned int machwcap1; /* 0x1a4 */
1592 unsigned int PAD[14]; /* 0x1a8 - 0x1dc */
1593  
1594 /* Clock control and hardware workarounds*/
1595 unsigned int clk_ctl_st; /* 0x1e0 */
1596 unsigned int hw_war;
1597 unsigned int d11_phypllctl; /* the phypll request/avail bits are
1598 * moved to clk_ctl_st
1599 */
1600 unsigned int PAD[5]; /* 0x1ec - 0x1fc */
1601  
1602 /* 0x200-0x37F dma/pio registers */
1603 struct fifo64 fifo64regs[6];
1604  
1605 /* FIFO diagnostic port access */
1606 struct dma32diag dmafifo; /* 0x380 - 0x38C */
1607  
1608 unsigned int aggfifocnt; /* 0x390 */
1609 unsigned int aggfifodata; /* 0x394 */
1610 unsigned int PAD[16]; /* 0x398 - 0x3d4 */
1611 unsigned short radioregaddr; /* 0x3d8 */
1612 unsigned short radioregdata; /* 0x3da */
1613  
1614 /*
1615 * time delay between the change on rf disable input and
1616 * radio shutdown
1617 */
1618 unsigned int rfdisabledly; /* 0x3DC */
1619  
1620 /* PHY register access */
1621 unsigned short phyversion; /* 0x3e0 - 0x0 */
1622 unsigned short phybbconfig; /* 0x3e2 - 0x1 */
1623 unsigned short phyadcbias; /* 0x3e4 - 0x2 Bphy only */
1624 unsigned short phyanacore; /* 0x3e6 - 0x3 pwwrdwn on aphy */
1625 unsigned short phyrxstatus0; /* 0x3e8 - 0x4 */
1626 unsigned short phyrxstatus1; /* 0x3ea - 0x5 */
1627 unsigned short phycrsth; /* 0x3ec - 0x6 */
1628 unsigned short phytxerror; /* 0x3ee - 0x7 */
1629 unsigned short phychannel; /* 0x3f0 - 0x8 */
1630 unsigned short PAD[1]; /* 0x3f2 - 0x9 */
1631 unsigned short phytest; /* 0x3f4 - 0xa */
1632 unsigned short phy4waddr; /* 0x3f6 - 0xb */
1633 unsigned short phy4wdatahi; /* 0x3f8 - 0xc */
1634 unsigned short phy4wdatalo; /* 0x3fa - 0xd */
1635 unsigned short phyregaddr; /* 0x3fc - 0xe */
1636 unsigned short phyregdata; /* 0x3fe - 0xf */
1637  
1638 /* IHR *//* 0x400 - 0x7FE */
1639  
1640 /* RXE Block */
1641 unsigned short PAD; /* SPR_RXE_0x00 0x400 */
1642 unsigned short PAD; /* SPR_RXE_Copy_Offset 0x402 */
1643 unsigned short PAD; /* SPR_RXE_Copy_Length 0x404 */
1644 unsigned short rcv_fifo_ctl; /* SPR_RXE_FIFOCTL0 0x406 */
1645 unsigned short PAD; /* SPR_RXE_FIFOCTL1 0x408 */
1646 unsigned short rcv_frm_cnt; /* SPR_Received_Frame_Count 0x40a */
1647 unsigned short PAD; /* SPR_RXE_0x0c 0x40c */
1648 unsigned short PAD; /* SPR_RXE_RXHDR_OFFSET 0x40e */
1649 unsigned short PAD; /* SPR_RXE_RXHDR_LEN 0x410 */
1650 unsigned short PAD; /* SPR_RXE_PHYRXSTAT0 0x412 */
1651 unsigned short rssi; /* SPR_RXE_PHYRXSTAT1 0x414 */
1652 unsigned short PAD; /* SPR_RXE_0x16 0x416 */
1653 unsigned short PAD; /* SPR_RXE_FRAMELEN 0x418 */
1654 unsigned short PAD; /* SPR_RXE_0x1a 0x41a */
1655 unsigned short PAD; /* SPR_RXE_ENCODING 0x41c */
1656 unsigned short PAD; /* SPR_RXE_0x1e 0x41e */
1657 unsigned short rcm_ctl; /* SPR_RCM_Control 0x420 */
1658 unsigned short rcm_mat_data; /* SPR_RCM_Match_Data 0x422 */
1659 unsigned short rcm_mat_mask; /* SPR_RCM_Match_Mask 0x424 */
1660 unsigned short rcm_mat_dly; /* SPR_RCM_Match_Delay 0x426 */
1661 unsigned short rcm_cond_mask_l; /* SPR_RCM_Condition_Mask_Low 0x428 */
1662 unsigned short rcm_cond_mask_h; /* SPR_RCM_Condition_Mask_High 0x42A */
1663 unsigned short rcm_cond_dly; /* SPR_RCM_Condition_Delay 0x42C */
1664 unsigned short PAD; /* SPR_RXE_0x2e 0x42E */
1665 unsigned short ext_ihr_addr; /* SPR_Ext_IHR_Address 0x430 */
1666 unsigned short ext_ihr_data; /* SPR_Ext_IHR_Data 0x432 */
1667 unsigned short rxe_phyrs_2; /* SPR_RXE_PHYRXSTAT2 0x434 */
1668 unsigned short rxe_phyrs_3; /* SPR_RXE_PHYRXSTAT3 0x436 */
1669 unsigned short phy_mode; /* SPR_PHY_Mode 0x438 */
1670 unsigned short rcmta_ctl; /* SPR_RCM_TA_Control 0x43a */
1671 unsigned short rcmta_size; /* SPR_RCM_TA_Size 0x43c */
1672 unsigned short rcmta_addr0; /* SPR_RCM_TA_Address_0 0x43e */
1673 unsigned short rcmta_addr1; /* SPR_RCM_TA_Address_1 0x440 */
1674 unsigned short rcmta_addr2; /* SPR_RCM_TA_Address_2 0x442 */
1675 unsigned short PAD[30]; /* SPR_RXE_0x44 ... 0x7e 0x444 */
1676  
1677  
1678 /* PSM Block *//* 0x480 - 0x500 */
1679  
1680 unsigned short PAD; /* SPR_MAC_MAX_NAP 0x480 */
1681 unsigned short psm_maccontrol_h; /* SPR_MAC_CTLHI 0x482 */
1682 unsigned short psm_macintstatus_l; /* SPR_MAC_IRQLO 0x484 */
1683 unsigned short psm_macintstatus_h; /* SPR_MAC_IRQHI 0x486 */
1684 unsigned short psm_macintmask_l; /* SPR_MAC_IRQMASKLO 0x488 */
1685 unsigned short psm_macintmask_h; /* SPR_MAC_IRQMASKHI 0x48A */
1686 unsigned short psm_0x0c; /* SPR_PSM_0x0c 0x48C */
1687 unsigned short psm_maccommand; /* SPR_MAC_CMD 0x48E */
1688 unsigned short psm_brc; /* SPR_BRC 0x490 */
1689 unsigned short psm_phy_hdr_param; /* SPR_PHY_HDR_Parameter 0x492 */
1690 unsigned short psm_postcard; /* SPR_Postcard 0x494 */
1691 unsigned short psm_pcard_loc_l; /* SPR_Postcard_Location_Low 0x496 */
1692 unsigned short psm_pcard_loc_h; /* SPR_Postcard_Location_High 0x498 */
1693 unsigned short psm_gpio_in; /* SPR_GPIO_IN 0x49A */
1694 unsigned short psm_gpio_out; /* SPR_GPIO_OUT 0x49C */
1695 unsigned short psm_gpio_oe; /* SPR_GPIO_OUTEN 0x49E */
1696  
1697 unsigned short psm_bred_0; /* SPR_BRED0 0x4A0 */
1698 unsigned short psm_bred_1; /* SPR_BRED1 0x4A2 */
1699 unsigned short psm_bred_2; /* SPR_BRED2 0x4A4 */
1700 unsigned short psm_bred_3; /* SPR_BRED3 0x4A6 */
1701 unsigned short psm_brcl_0; /* SPR_BRCL0 0x4A8 */
1702 unsigned short psm_brcl_1; /* SPR_BRCL1 0x4AA */
1703 unsigned short psm_brcl_2; /* SPR_BRCL2 0x4AC */
1704 unsigned short psm_brcl_3; /* SPR_BRCL3 0x4AE */
1705 unsigned short psm_brpo_0; /* SPR_BRPO0 0x4B0 */
1706 unsigned short psm_brpo_1; /* SPR_BRPO1 0x4B2 */
1707 unsigned short psm_brpo_2; /* SPR_BRPO2 0x4B4 */
1708 unsigned short psm_brpo_3; /* SPR_BRPO3 0x4B6 */
1709 unsigned short psm_brwk_0; /* SPR_BRWK0 0x4B8 */
1710 unsigned short psm_brwk_1; /* SPR_BRWK1 0x4BA */
1711 unsigned short psm_brwk_2; /* SPR_BRWK2 0x4BC */
1712 unsigned short psm_brwk_3; /* SPR_BRWK3 0x4BE */
1713  
1714 unsigned short psm_base_0; /* SPR_BASE0 - Offset Register 0 0x4C0 */
1715 unsigned short psm_base_1; /* SPR_BASE1 - Offset Register 1 0x4C2 */
1716 unsigned short psm_base_2; /* SPR_BASE2 - Offset Register 2 0x4C4 */
1717 unsigned short psm_base_3; /* SPR_BASE3 - Offset Register 3 0x4C6 */
1718 unsigned short psm_base_4; /* SPR_BASE4 - Offset Register 4 0x4C8 */
1719 unsigned short psm_base_5; /* SPR_BASE5 - Offset Register 5 0x4CA */
1720 unsigned short psm_base_6; /* SPR_BASE6 - Do not use (broken) 0x4CC */
1721 unsigned short psm_ihr_err; /* SPR_PSM_0x4e 0x4CE */
1722 unsigned short psm_pc_reg_0; /* SPR_PC0 - Link Register 0 0x4D0 */
1723 unsigned short psm_pc_reg_1; /* SPR_PC1 - Link Register 1 0x4D2 */
1724 unsigned short psm_pc_reg_2; /* SPR_PC2 - Link Register 2 0x4D4 */
1725 unsigned short psm_pc_reg_3; /* SPR_PC2 - Link Register 6 0x4D6 */
1726 unsigned short psm_brc_1; /* SPR_PSM_COND - PSM external condition bits 0x4D8 */
1727 unsigned short PAD; /* SPR_PSM_0x5a ... 0x7e 0x4DA */
1728 unsigned short PAD; /* SPR_PSM_0x5c 0x4DC */
1729 unsigned short PAD; /* SPR_PSM_0x5e 0x4DE */
1730 unsigned short PAD; /* SPR_PSM_0x60 0x4E0 */
1731 unsigned short PAD; /* SPR_PSM_0x62 0x4E2 */
1732 unsigned short PAD; /* SPR_PSM_0x64 0x4E4 */
1733 unsigned short PAD; /* SPR_PSM_0x66 0x4E6 */
1734 unsigned short PAD; /* SPR_PSM_0x68 0x4E8 */
1735 unsigned short PAD; /* SPR_PSM_0x6a 0x4EA */
1736 unsigned short PAD; /* SPR_PSM_0x6c 0x4EC */
1737 unsigned short PAD; /* SPR_PSM_0x6e 0x4EE */
1738 unsigned short psm_corectlsts; /* SPR_PSM_0x70 0x4F0 *//* Corerev >= 13 */
1739 unsigned short PAD; /* SPR_PSM_0x72 0x4F2 */
1740 unsigned short PAD; /* SPR_PSM_0x74 0x4F4 */
1741 unsigned short PAD; /* SPR_PSM_0x76 0x4F6 */
1742 unsigned short PAD; /* SPR_PSM_0x78 0x4F8 */
1743 unsigned short PAD; /* SPR_PSM_0x7a 0x4FA */
1744 unsigned short PAD; /* SPR_PSM_0x7c 0x4FC */
1745 unsigned short PAD; /* SPR_PSM_0x7e 0x4FE */
1746  
1747 /* TXE0 Block *//* 0x500 - 0x580 */
1748 unsigned short txe_ctl; /* SPR_TXE0_CTL 0x500 */
1749 unsigned short txe_aux; /* SPR_TXE0_AUX 0x502 */
1750 unsigned short txe_ts_loc; /* SPR_TXE0_TS_LOC 0x504 */
1751 unsigned short txe_time_out; /* SPR_TXE0_TIMEOUT 0x506 */
1752 unsigned short txe_wm_0; /* SPR_TXE0_WM0 0x508 */
1753 unsigned short txe_wm_1; /* SPR_TXE0_WM1 0x50A */
1754 unsigned short txe_phyctl; /* SPR_TXE0_PHY_CTL 0x50C */
1755 unsigned short txe_status; /* SPR_TXE0_STATUS 0x50E */
1756 unsigned short txe_mmplcp0; /* SPR_TXE0_0x10 0x510 */
1757 unsigned short txe_mmplcp1; /* SPR_TXE0_0x12 0x512 */
1758 unsigned short txe_phyctl1; /* SPR_TXE0_0x14 0x514 */
1759  
1760 unsigned short PAD; /* SPR_TXE0_0x16 0x516 */
1761 unsigned short PAD; /* SPR_TX_STATUS0 0x518 */
1762 unsigned short PAD; /* SPR_TX_STATUS1 0x51a */
1763 unsigned short PAD; /* SPR_TX_STATUS2 0x51c */
1764 unsigned short PAD; /* SPR_TX_STATUS3 0x51e */
1765  
1766 union {
1767 struct {
1768 /* Transmit control */
1769 uint16 xmtfifodef; /* 0x520 */
1770 uint16 xmtfifo_frame_cnt; /* 0x522 */ /* Corerev >= 16 */
1771 uint16 xmtfifo_byte_cnt; /* 0x524 */ /* Corerev >= 16 */
1772 uint16 xmtfifo_head; /* 0x526 */ /* Corerev >= 16 */
1773 uint16 xmtfifo_rd_ptr; /* 0x528 */ /* Corerev >= 16 */
1774 uint16 xmtfifo_wr_ptr; /* 0x52A */ /* Corerev >= 16 */
1775 uint16 xmtfifodef1; /* 0x52C */ /* Corerev >= 16 */
1776  
1777 /* AggFifo */
1778 uint16 aggfifo_cmd; /* 0x52e */
1779 uint16 aggfifo_stat; /* 0x530 */
1780 uint16 aggfifo_cfgctl; /* 0x532 */
1781 uint16 aggfifo_cfgdata; /* 0x534 */
1782 uint16 aggfifo_mpdunum; /* 0x536 */
1783 uint16 aggfifo_len; /* 0x538 */
1784 uint16 aggfifo_bmp; /* 0x53A */
1785 uint16 aggfifo_ackedcnt; /* 0x53C */
1786 uint16 aggfifo_sel; /* 0x53E */
1787  
1788 uint16 xmtfifocmd; /* 0x540 */
1789 uint16 xmtfifoflush; /* 0x542 */
1790 uint16 xmtfifothresh; /* 0x544 */
1791 uint16 xmtfifordy; /* 0x546 */
1792 uint16 xmtfifoprirdy; /* 0x548 */
1793 uint16 xmtfiforqpri; /* 0x54A */
1794 uint16 xmttplatetxptr; /* 0x54C */
1795 uint16 PAD; /* 0x54E */
1796 uint16 xmttplateptr; /* 0x550 */
1797 uint16 smpl_clct_strptr; /* 0x552 */ /* Corerev >= 22 */
1798 uint16 smpl_clct_stpptr; /* 0x554 */ /* Corerev >= 22 */
1799 uint16 smpl_clct_curptr; /* 0x556 */ /* Corerev >= 22 */
1800 uint16 aggfifo_data; /* 0x558 */
1801 uint16 PAD[0x03]; /* 0x55A - 0x55E */
1802 uint16 xmttplatedatalo; /* 0x560 */
1803 uint16 xmttplatedatahi; /* 0x562 */
1804  
1805 uint16 PAD[2]; /* 0x564 - 0x566 */
1806  
1807 uint16 xmtsel; /* 0x568 */
1808 uint16 xmttxcnt; /* 0x56A */
1809 uint16 xmttxshmaddr; /* 0x56C */
1810  
1811 uint16 PAD[0x09]; /* 0x56E - 0x57E */
1812  
1813 /* TXE1 Block */
1814 uint16 PAD[0x40]; /* 0x580 - 0x5FE */
1815  
1816 /* TSF Block */
1817 uint16 PAD[0X02]; /* 0x600 - 0x602 */
1818 uint16 tsf_cfpstrt_l; /* 0x604 */
1819 uint16 tsf_cfpstrt_h; /* 0x606 */
1820 uint16 PAD[0X05]; /* 0x608 - 0x610 */
1821 uint16 tsf_cfppretbtt; /* 0x612 */
1822 uint16 PAD[0XD]; /* 0x614 - 0x62C */
1823 uint16 tsf_clk_frac_l; /* 0x62E */
1824 uint16 tsf_clk_frac_h; /* 0x630 */
1825 uint16 PAD[0X14]; /* 0x632 - 0x658 */
1826 uint16 tsf_random; /* 0x65A */
1827 uint16 PAD[0x05]; /* 0x65C - 0x664 */
1828 /* GPTimer 2 registers are corerev >= 3 */
1829 uint16 tsf_gpt2_stat; /* 0x666 */
1830 uint16 tsf_gpt2_ctr_l; /* 0x668 */
1831 uint16 tsf_gpt2_ctr_h; /* 0x66A */
1832 uint16 tsf_gpt2_val_l; /* 0x66C */
1833 uint16 tsf_gpt2_val_h; /* 0x66E */
1834 uint16 tsf_gptall_stat; /* 0x670 */
1835 uint16 PAD[0x07]; /* 0x672 - 0x67E */
1836  
1837 /* IFS Block */
1838 uint16 ifs_sifs_rx_tx_tx; /* 0x680 */
1839 uint16 ifs_sifs_nav_tx; /* 0x682 */
1840 uint16 ifs_slot; /* 0x684 */
1841 uint16 PAD; /* 0x686 */
1842 uint16 ifs_ctl; /* 0x688 */
1843 uint16 ifs_boff; /* 0x68a */
1844 uint16 PAD[0x2]; /* 0x68c - 0x68F */
1845 uint16 ifsstat; /* 0x690 */
1846 uint16 ifsmedbusyctl; /* 0x692 */
1847 uint16 iftxdur; /* 0x694 */
1848 uint16 PAD[0x3]; /* 0x696 - 0x69b */
1849 /* EDCF support in dot11macs with corerevs >= 16 */
1850 uint16 ifs_aifsn; /* 0x69c */
1851 uint16 ifs_ctl1; /* 0x69e */
1852  
1853 /* New slow clock registers on corerev >= 5 */
1854 uint16 scc_ctl; /* 0x6a0 */
1855 uint16 scc_timer_l; /* 0x6a2 */
1856 uint16 scc_timer_h; /* 0x6a4 */
1857 uint16 scc_frac; /* 0x6a6 */
1858 uint16 scc_fastpwrup_dly; /* 0x6a8 */
1859 uint16 scc_per; /* 0x6aa */
1860 uint16 scc_per_frac; /* 0x6ac */
1861 uint16 scc_cal_timer_l; /* 0x6ae */
1862 uint16 scc_cal_timer_h; /* 0x6b0 */
1863 uint16 PAD; /* 0x6b2 */
1864  
1865 /* BTCX block on corerev >=13 */
1866 uint16 btcx_ctrl; /* 0x6b4 */
1867 uint16 btcx_stat; /* 0x6b6 */
1868 uint16 btcx_trans_ctrl; /* 0x6b8 */
1869 uint16 btcx_pri_win; /* 0x6ba */
1870 uint16 btcx_tx_conf_timer; /* 0x6bc */
1871 uint16 btcx_ant_sw_timer; /* 0x6be */
1872  
1873 uint16 btcx_prv_rfact_timer; /* 0x6c0 */
1874 uint16 btcx_cur_rfact_timer; /* 0x6c2 */
1875 uint16 btcx_rfact_dur_timer; /* 0x6c4 */
1876  
1877 uint16 ifs_ctl_sel_pricrs; /* 0x6c6 */
1878 uint16 ifs_ctl_sel_seccrs; /* 0x6c8 */
1879 uint16 PAD[19]; /* 0x6ca - 0x6ee */
1880  
1881 /* ECI regs on corerev >=14 */
1882 uint16 btcx_eci_addr; /* 0x6f0 */
1883 uint16 btcx_eci_data; /* 0x6f2 */
1884  
1885 uint16 PAD[6];
1886  
1887 /* NAV Block */
1888 uint16 nav_ctl; /* 0x700 */
1889 uint16 navstat; /* 0x702 */
1890 uint16 PAD[0x3e]; /* 0x702 - 0x77E */
1891  
1892 /* WEP/PMQ Block */ /* 0x780 - 0x7FE */
1893 uint16 PAD[0x20]; /* 0x780 - 0x7BE */
1894  
1895 uint16 wepctl; /* 0x7C0 */
1896 uint16 wepivloc; /* 0x7C2 */
1897 uint16 wepivkey; /* 0x7C4 */
1898 uint16 wepwkey; /* 0x7C6 */
1899  
1900 uint16 PAD[4]; /* 0x7C8 - 0x7CE */
1901 uint16 pcmctl; /* 0X7D0 */
1902 uint16 pcmstat; /* 0X7D2 */
1903 uint16 PAD[6]; /* 0x7D4 - 0x7DE */
1904  
1905 uint16 pmqctl; /* 0x7E0 */
1906 uint16 pmqstatus; /* 0x7E2 */
1907 uint16 pmqpat0; /* 0x7E4 */
1908 uint16 pmqpat1; /* 0x7E6 */
1909 uint16 pmqpat2; /* 0x7E8 */
1910  
1911 uint16 pmqdat; /* 0x7EA */
1912 uint16 pmqdator; /* 0x7EC */
1913 uint16 pmqhst; /* 0x7EE */
1914 uint16 pmqpath0; /* 0x7F0 */
1915 uint16 pmqpath1; /* 0x7F2 */
1916 uint16 pmqpath2; /* 0x7F4 */
1917 uint16 pmqdath; /* 0x7F6 */
1918  
1919 uint16 PAD[0x04]; /* 0x7F8 - 0x7FE */
1920 /* SHM */ /* 0x800 - 0xEFE */
1921 uint16 PAD[0x380]; /* 0x800 - 0xEFE */
1922 } d11regs;
1923  
1924 struct {
1925 /* Transmit control */
1926 unsigned short xmtfifodef; /* SPR_TXE0_FIFO_Def 0x520 */
1927 unsigned short xmtfifo_frame_cnt; /* SPR_TXE0_0x22 0x522 *//* Corerev >= 16 */
1928 unsigned short xmtfifo_byte_cnt; /* SPR_TXE0_0x24 0x524 *//* Corerev >= 16 */
1929 unsigned short xmtfifo_head; /* SPR_TXE0_0x26 0x526 *//* Corerev >= 16 */
1930 unsigned short xmtfifo_rd_ptr; /* SPR_TXE0_0x28 0x528 *//* Corerev >= 16 */
1931 unsigned short xmtfifo_wr_ptr; /* SPR_TXE0_0x2a 0x52A *//* Corerev >= 16 */
1932 unsigned short xmtfifodef1; /* SPR_TXE0_0x2c 0x52C *//* Corerev >= 16 */
1933  
1934 unsigned short PAD; /* SPR_TXE0_0x2e 0x52E */
1935 unsigned short PAD; /* SPR_TXE0_0x30 0x530 */
1936 unsigned short PAD; /* SPR_TXE0_0x32 0x532 */
1937 unsigned short PAD; /* SPR_TXE0_0x34 0x534 */
1938 unsigned short PAD; /* SPR_TXE0_0x36 0x536 */
1939 unsigned short PAD; /* SPR_TXE0_0x38 0x538 */
1940 unsigned short PAD; /* SPR_TXE0_0x3a 0x53A */
1941 unsigned short PAD; /* SPR_TXE0_0x3c 0x53C */
1942 unsigned short PAD; /* SPR_TXE0_0x3e 0x53E */
1943  
1944 unsigned short xmtfifocmd; /* SPR_TXE0_FIFO_CMD 0x540 */
1945 unsigned short xmtfifoflush; /* SPR_TXE0_FIFO_FLUSH 0x542 */
1946 unsigned short xmtfifothresh; /* SPR_TXE0_FIFO_THRES 0x544 */
1947 unsigned short xmtfifordy; /* SPR_TXE0_FIFO_RDY 0x546 */
1948 unsigned short xmtfifoprirdy; /* SPR_TXE0_FIFO_PRI_RDY 0x548 */
1949 unsigned short xmtfiforqpri; /* SPR_TXE0_FIFO_RQ_PRI 0x54A */
1950 unsigned short xmttplatetxptr; /* SPR_TXE0_Template_TX_Pointer 0x54C */
1951 unsigned short PAD; /* SPR_TXE0_0x4e 0x54E */
1952 unsigned short xmttplateptr; /* SPR_TXE0_Template_Pointer 0x550 */
1953 unsigned short smpl_clct_strptr; /* SPR_TXE0_0x52 0x552 *//* Corerev >= 22 */
1954 unsigned short smpl_clct_stpptr; /* SPR_TXE0_0x54 0x554 *//* Corerev >= 22 */
1955 unsigned short smpl_clct_curptr; /* SPR_TXE0_0x56 0x556 *//* Corerev >= 22 */
1956 unsigned short PAD; /* SPR_TXE0_0x58 0x558 */
1957 unsigned short PAD; /* SPR_TXE0_0x5a 0x55A */
1958 unsigned short PAD; /* SPR_TXE0_0x5c 0x55C */
1959 unsigned short PAD; /* SPR_TXE0_0x5e 0x55E */
1960 unsigned short xmttplatedatalo; /* SPR_TXE0_Template_Data_Low 0x560 */
1961 unsigned short xmttplatedatahi; /* SPR_TXE0_Template_Data_High 0x562 */
1962  
1963 unsigned short PAD; /* SPR_TXE0_0x64 0x564 */
1964 unsigned short PAD; /* SPR_TXE0_0x66 0x566 */
1965  
1966 unsigned short xmtsel; /* SPR_TXE0_SELECT 0x568 */
1967 unsigned short xmttxcnt; /* 0x56A */
1968 unsigned short xmttxshmaddr; /* 0x56C */
1969  
1970 unsigned short PAD[0x09]; /* 0x56E - 0x57E */
1971  
1972 /* TXE1 Block */
1973 unsigned short PAD[0x40]; /* 0x580 - 0x5FE */
1974  
1975 /* TSF Block */
1976 unsigned short PAD[0X02]; /* 0x600 - 0x602 */
1977 unsigned short tsf_cfpstrt_l; /* 0x604 */
1978 unsigned short tsf_cfpstrt_h; /* 0x606 */
1979 unsigned short PAD[0X05]; /* 0x608 - 0x610 */
1980 unsigned short tsf_cfppretbtt; /* 0x612 */
1981 unsigned short PAD[0XD]; /* 0x614 - 0x62C */
1982 unsigned short tsf_clk_frac_l; /* 0x62E */
1983 unsigned short tsf_clk_frac_h; /* 0x630 */
1984 unsigned short PAD[0X14]; /* 0x632 - 0x658 */
1985 unsigned short tsf_random; /* 0x65A */
1986 unsigned short PAD[0x05]; /* 0x65C - 0x664 */
1987 /* GPTimer 2 registers */
1988 unsigned short tsf_gpt2_stat; /* 0x666 */
1989 unsigned short tsf_gpt2_ctr_l; /* 0x668 */
1990 unsigned short tsf_gpt2_ctr_h; /* 0x66A */
1991 unsigned short tsf_gpt2_val_l; /* 0x66C */
1992 unsigned short tsf_gpt2_val_h; /* 0x66E */
1993 unsigned short tsf_gptall_stat; /* 0x670 */
1994 unsigned short PAD[0x07]; /* 0x672 - 0x67E */
1995  
1996 /* IFS Block */
1997 unsigned short ifs_sifs_rx_tx_tx; /* 0x680 */
1998 unsigned short ifs_sifs_nav_tx; /* 0x682 */
1999 unsigned short ifs_slot; /* 0x684 */
2000 unsigned short PAD; /* 0x686 */
2001 unsigned short ifs_ctl; /* 0x688 */
2002 unsigned short PAD[0x3]; /* 0x68a - 0x68F */
2003 unsigned short ifsstat; /* 0x690 */
2004 unsigned short ifsmedbusyctl; /* 0x692 */
2005 unsigned short iftxdur; /* 0x694 */
2006 unsigned short PAD[0x3]; /* 0x696 - 0x69b */
2007 /* EDCF support in dot11macs */
2008 unsigned short ifs_aifsn; /* 0x69c */
2009 unsigned short ifs_ctl1; /* 0x69e */
2010  
2011 /* slow clock registers */
2012 unsigned short scc_ctl; /* 0x6a0 */
2013 unsigned short scc_timer_l; /* 0x6a2 */
2014 unsigned short scc_timer_h; /* 0x6a4 */
2015 unsigned short scc_frac; /* 0x6a6 */
2016 unsigned short scc_fastpwrup_dly; /* 0x6a8 */
2017 unsigned short scc_per; /* 0x6aa */
2018 unsigned short scc_per_frac; /* 0x6ac */
2019 unsigned short scc_cal_timer_l; /* 0x6ae */
2020 unsigned short scc_cal_timer_h; /* 0x6b0 */
2021 unsigned short PAD; /* 0x6b2 */
2022  
2023 unsigned short PAD[0x26];
2024  
2025 /* NAV Block */
2026 unsigned short nav_ctl; /* 0x700 */
2027 unsigned short navstat; /* 0x702 */
2028 unsigned short PAD[0x3e]; /* 0x702 - 0x77E */
2029  
2030 /* WEP/PMQ Block *//* 0x780 - 0x7FE */
2031 unsigned short PAD[0x20]; /* 0x780 - 0x7BE */
2032  
2033 unsigned short wepctl; /* 0x7C0 */
2034 unsigned short wepivloc; /* 0x7C2 */
2035 unsigned short wepivkey; /* 0x7C4 */
2036 unsigned short wepwkey; /* 0x7C6 */
2037  
2038 unsigned short PAD[4]; /* 0x7C8 - 0x7CE */
2039 unsigned short pcmctl; /* 0X7D0 */
2040 unsigned short pcmstat; /* 0X7D2 */
2041 unsigned short PAD[6]; /* 0x7D4 - 0x7DE */
2042  
2043 unsigned short pmqctl; /* 0x7E0 */
2044 unsigned short pmqstatus; /* 0x7E2 */
2045 unsigned short pmqpat0; /* 0x7E4 */
2046 unsigned short pmqpat1; /* 0x7E6 */
2047 unsigned short pmqpat2; /* 0x7E8 */
2048  
2049 unsigned short pmqdat; /* 0x7EA */
2050 unsigned short pmqdator; /* 0x7EC */
2051 unsigned short pmqhst; /* 0x7EE */
2052 unsigned short pmqpath0; /* 0x7F0 */
2053 unsigned short pmqpath1; /* 0x7F2 */
2054 unsigned short pmqpath2; /* 0x7F4 */
2055 unsigned short pmqdath; /* 0x7F6 */
2056  
2057 unsigned short PAD[0x04]; /* 0x7F8 - 0x7FE */
2058  
2059 /* SHM *//* 0x800 - 0xEFE */
2060 unsigned short PAD[0x380]; /* 0x800 - 0xEFE */
2061 } d11regs_nexmon_old;
2062  
2063 struct {
2064 uint16 XmtFIFOFullThreshold; /* 0x520 */
2065 uint16 XmtFifoFrameCnt; /* 0x522 */
2066 uint16 PAD[1];
2067 uint16 BMCReadReq; /* 0x526 */
2068 uint16 BMCReadOffset; /* 0x528 */
2069 uint16 BMCReadLength; /* 0x52a */
2070 uint16 BMCReadStatus; /* 0x52c */
2071 uint16 XmtShmAddr; /* 0x52e */
2072 uint16 PsmMSDUAccess; /* 0x530 */
2073 uint16 MSDUEntryBufCnt; /* 0x532 */
2074 uint16 MSDUEntryStartIdx; /* 0x534 */
2075 uint16 MSDUEntryEndIdx; /* 0x536 */
2076 uint16 SampleCollectPlayPtrHigh; /* 0x538 */
2077 uint16 SampleCollectCurPtrHigh; /* 0x53a */
2078 uint16 BMCCmd1; /* 0x53c */
2079 uint16 PAD[1];
2080 uint16 BMCCTL; /* 0x540 */
2081 uint16 BMCConfig; /* 0x542 */
2082 uint16 BMCStartAddr; /* 0x544 */
2083 uint16 BMCSize; /* 0x546 */
2084 uint16 BMCCmd; /* 0x548 */
2085 uint16 BMCMaxBuffers; /* 0x54a */
2086 uint16 BMCMinBuffers; /* 0x54c */
2087 uint16 BMCAllocCtl; /* 0x54e */
2088 uint16 BMCDescrLen; /* 0x550 */
2089 uint16 SampleCollectStartPtr; /* 0x552 */
2090 uint16 SampleCollectStopPtr; /* 0x554 */
2091 uint16 SampleCollectCurPtr; /* 0x556 */
2092 uint16 SaveRestoreStartPtr; /* 0x558 */
2093 uint16 SamplePlayStartPtr; /* 0x55a */
2094 uint16 SamplePlayStopPtr; /* 0x55c */
2095 uint16 XmtDMABusy; /* 0x55e */
2096 uint16 XmtTemplateDataLo; /* 0x560 */
2097 uint16 XmtTemplateDataHi; /* 0x562 */
2098 uint16 XmtTemplatePtr; /* 0x564 */
2099 uint16 XmtSuspFlush; /* 0x566 */
2100 uint16 XmtFifoRqPrio; /* 0x568 */
2101 uint16 BMCStatCtl; /* 0x56a */
2102 uint16 BMCStatData; /* 0x56c */
2103 uint16 BMCMSDUFifoStat; /* 0x56e */
2104 uint16 PAD[4]; /* 0x570-576 */
2105 uint16 txe_status1; /* 0x578 */
2106 uint16 PAD[323]; /* 0x57a - 0x800 */
2107  
2108 /* AQM */
2109 uint16 AQMConfig; /* 0x800 */
2110 uint16 AQMFifoDef; /* 0x802 */
2111 uint16 AQMMaxIdx; /* 0x804 */
2112 uint16 AQMRcvdBA0; /* 0x806 */
2113 uint16 AQMRcvdBA1; /* 0x808 */
2114 uint16 AQMRcvdBA2; /* 0x80a */
2115 uint16 AQMRcvdBA3; /* 0x80c */
2116 uint16 AQMBaSSN; /* 0x80e */
2117 uint16 AQMRefSN; /* 0x810 */
2118 uint16 AQMMaxAggLenLow; /* 0x812 */
2119 uint16 AQMMaxAggLenHi; /* 0x814 */
2120 uint16 AQMAggParams; /* 0x816 */
2121 uint16 AQMMinMpduLen; /* 0x818 */
2122 uint16 AQMMacAdjLen; /* 0x81a */
2123 uint16 DebugBusCtrl; /* 0x81c */
2124 uint16 PAD[1];
2125 uint16 AQMAggStats; /* 0x820 */
2126 uint16 AQMAggLenLow; /* 0x822 */
2127 uint16 AQMAggLenHi; /* 0x824 */
2128 uint16 AQMIdxFifo; /* 0x826 */
2129 uint16 AQMMpduLenFifo; /* 0x828 */
2130 uint16 AQMTxCntFifo; /* 0x82a */
2131 uint16 AQMUpdBA0; /* 0x82c */
2132 uint16 AQMUpdBA1; /* 0x82e */
2133 uint16 AQMUpdBA2; /* 0x830 */
2134 uint16 AQMUpdBA3; /* 0x832 */
2135 uint16 AQMAckCnt; /* 0x834 */
2136 uint16 AQMConsCnt; /* 0x836 */
2137 uint16 AQMFifoReady; /* 0x838 */
2138 uint16 AQMStartLoc; /* 0x83a */
2139 uint16 PAD[2];
2140 uint16 TDCCTL; /* 0x840 */
2141 uint16 TDC_Plcp0; /* 0x842 */
2142 uint16 TDC_Plcp1; /* 0x844 */
2143 uint16 TDC_FrmLen0; /* 0x846 */
2144 uint16 TDC_FrmLen1; /* 0x848 */
2145 uint16 TDC_Txtime; /* 0x84a */
2146 uint16 TDC_VhtSigB0; /* 0x84c */
2147 uint16 TDC_VhtSigB1; /* 0x84e */
2148 uint16 TDC_LSigLen; /* 0x850 */
2149 uint16 TDC_NSym0; /* 0x852 */
2150 uint16 TDC_NSym1; /* 0x854 */
2151 uint16 TDC_VhtPsduLen0; /* 0x856 */
2152 uint16 TDC_VhtPsduLen1; /* 0x858 */
2153 uint16 TDC_VhtMacPad; /* 0x85a */
2154 uint16 PAD[2];
2155 uint16 ShmDma_Ctl; /* 0x860 */
2156 uint16 ShmDma_TxdcAddr; /* 0x862 */
2157 uint16 ShmDma_ShmAddr; /* 0x864 */
2158 uint16 ShmDma_XferCnt; /* 0x866 */
2159 uint16 Txdc_Addr; /* 0x868 */
2160 uint16 Txdc_Data; /* 0x86a */
2161 uint16 PAD[10]; /* 0x86c - 0x880 */
2162  
2163 /* RXE Register */
2164 uint16 MHP_Status; /* 0x880 */
2165 uint16 MHP_FC; /* 0x882 */
2166 uint16 MHP_DUR; /* 0x884 */
2167 uint16 MHP_SC; /* 0x886 */
2168 uint16 MHP_QOS; /* 0x888 */
2169 uint16 MHP_HTC_H; /* 0x88a */
2170 uint16 MHP_HTC_L; /* 0x88c */
2171 uint16 MHP_Addr1_H; /* 0x88e */
2172 uint16 MHP_Addr1_M; /* 0x890 */
2173 uint16 MHP_Addr1_L; /* 0x892 */
2174 uint16 PAD[6]; /* 0x894 - 0x8a0 */
2175 uint16 MHP_Addr2_H; /* 0x8a0 */
2176 uint16 MHP_Addr2_M; /* 0x8a2 */
2177 uint16 MHP_Addr2_L; /* 0x8a4 */
2178 uint16 MHP_Addr3_H; /* 0x8a6 */
2179 uint16 MHP_Addr3_M; /* 0x8a8 */
2180 uint16 MHP_Addr3_L; /* 0x8aa */
2181 uint16 MHP_Addr4_H; /* 0x8ac */
2182 uint16 MHP_Addr4_M; /* 0x8ae */
2183 uint16 MHP_Addr4_L; /* 0x8b0 */
2184 uint16 MHP_CFC; /* 0x8b2 */
2185 uint16 PAD[6]; /* 0x8b4 - 0x8c0 */
2186 uint16 DAGG_CTL2; /* 0x8c0 */
2187 uint16 DAGG_BYTESLEFT; /* 0x8c2 */
2188 uint16 DAGG_SH_OFFSET; /* 0x8c4 */
2189 uint16 DAGG_STAT; /* 0x8c6 */
2190 uint16 DAGG_LEN; /* 0x8c8 */
2191 uint16 TXBA_CTL; /* 0x8ca */
2192 uint16 TXBA_DataSel; /* 0x8cc */
2193 uint16 TXBA_Data; /* 0x8ce */
2194 uint16 PAD[8]; /* 0x8d0 - 0x8e0 */
2195 uint16 AMT_CTL; /* 0x8e0 */
2196 uint16 AMT_Status; /* 0x8e2 */
2197 uint16 AMT_Limit; /* 0x8e4 */
2198 uint16 AMT_Attr; /* 0x8e6 */
2199 uint16 AMT_Match1; /* 0x8e8 */
2200 uint16 AMT_Match2; /* 0x8ea */
2201 uint16 AMT_Table_Addr; /* 0x8ec */
2202 uint16 AMT_Table_Data; /* 0x8ee */
2203 uint16 AMT_Table_Val; /* 0x8f0 */
2204 uint16 AMT_DBG_SEL; /* 0x8f2 */
2205 uint16 PAD[6]; /* 0x8f4 - 0x900 */
2206 uint16 RoeCtrl; /* 0x900 */
2207 uint16 RoeStatus; /* 0x902 */
2208 uint16 RoeIPChkSum; /* 0x904 */
2209 uint16 RoeTCPUDPChkSum; /* 0x906 */
2210 uint16 PAD[12]; /* 0x908 - 0x920 */
2211 uint16 PSOCtl; /* 0x920 */
2212 uint16 PSORxWordsWatermark; /* 0x922 */
2213 uint16 PSORxCntWatermark; /* 0x924 */
2214 uint16 PAD[5]; /* 0x926 - 0x930 */
2215 uint16 OBFFCtl; /* 0x930 */
2216 uint16 OBFFRxWordsWatermark; /* 0x932 */
2217 uint16 OBFFRxCntWatermark; /* 0x934 */
2218 uint16 PAD[101]; /* 0x936 - 0xa00 */
2219  
2220 /* TOE */
2221 uint16 ToECTL; /* 0xa00 */
2222 uint16 ToERst; /* 0xa02 */
2223 uint16 ToECSumNZ; /* 0xa04 */
2224 uint16 PAD[29]; /* 0xa06 - 0xa40 */
2225  
2226 uint16 TxSerialCtl; /* 0xa40 */
2227 uint16 TxPlcpLSig0; /* 0xa42 */
2228 uint16 TxPlcpLSig1; /* 0xa44 */
2229 uint16 TxPlcpHtSig0; /* 0xa46 */
2230 uint16 TxPlcpHtSig1; /* 0xa48 */
2231 uint16 TxPlcpHtSig2; /* 0xa4a */
2232 uint16 TxPlcpVhtSigB0; /* 0xa4c */
2233 uint16 TxPlcpVhtSigB1; /* 0xa4e */
2234 uint16 PAD[1];
2235  
2236 uint16 MacHdrFromShmLen; /* 0xa52 */
2237 uint16 TxPlcpLen; /* 0xa54 */
2238 uint16 PAD[1];
2239  
2240 uint16 TxBFRptLen; /* 0xa58 */
2241 uint16 PAD[3];
2242  
2243 uint16 TXBFCtl; /* 0xa60 */
2244 uint16 BfmRptOffset; /* 0xa62 */
2245 uint16 BfmRptLen; /* 0xa64 */
2246 uint16 TXBFBfeRptRdCnt; /* 0xa66 */
2247 uint16 PAD[76]; /* 0xa68 - 0xafe */
2248 uint16 RXMapFifoSize; /* 0xb00 */
2249 uint16 PAD[511]; /* 0xb02 - 0xEFE */
2250 } d11acregs;
2251 } u;
2252 } __attribute__((packed));
2253  
2254 typedef void (*to_fun_t)(void *arg);
2255  
2256 typedef struct _ctimeout {
2257 struct _ctimeout *next;
2258 uint32 ms;
2259 to_fun_t fun;
2260 void *arg;
2261 bool expired;
2262 } ctimeout_t;
2263  
2264 struct hndrte_timer
2265 {
2266 uint32 *context; /* first field so address of context is timer struct ptr */
2267 void *data;
2268 void (*mainfn)(struct hndrte_timer *);
2269 void (*auxfn)(void *context);
2270 ctimeout_t t;
2271 int interval;
2272 int set;
2273 int periodic;
2274 bool _freedone;
2275 } __attribute__((packed));
2276  
2277 /*== maccontrol register ==*/
2278 #define MCTL_GMODE (1U << 31)
2279 #define MCTL_DISCARD_PMQ (1 << 30)
2280 #define MCTL_WAKE (1 << 26)
2281 #define MCTL_HPS (1 << 25)
2282 #define MCTL_PROMISC (1 << 24)
2283 #define MCTL_KEEPBADFCS (1 << 23)
2284 #define MCTL_KEEPCONTROL (1 << 22)
2285 #define MCTL_PHYLOCK (1 << 21)
2286 #define MCTL_BCNS_PROMISC (1 << 20)
2287 #define MCTL_LOCK_RADIO (1 << 19)
2288 #define MCTL_AP (1 << 18)
2289 #define MCTL_INFRA (1 << 17)
2290 #define MCTL_BIGEND (1 << 16)
2291 #define MCTL_GPOUT_SEL_MASK (3 << 14)
2292 #define MCTL_GPOUT_SEL_SHIFT 14
2293 #define MCTL_EN_PSMDBG (1 << 13)
2294 #define MCTL_IHR_EN (1 << 10)
2295 #define MCTL_SHM_UPPER (1 << 9)
2296 #define MCTL_SHM_EN (1 << 8)
2297 #define MCTL_PSM_JMP_0 (1 << 2)
2298 #define MCTL_PSM_RUN (1 << 1)
2299 #define MCTL_EN_MAC (1 << 0)
2300  
2301 struct ethernet_header {
2302 uint8 dst[6];
2303 uint8 src[6];
2304 uint16 type;
2305 } __attribute__((packed));
2306  
2307 struct ipv6_header {
2308 uint32 version_traffic_class_flow_label;
2309 uint16 payload_length;
2310 uint8 next_header;
2311 uint8 hop_limit;
2312 uint8 src_ip[16];
2313 uint8 dst_ip[16];
2314 } __attribute__((packed));
2315  
2316 struct ip_header {
2317 uint8 version_ihl;
2318 uint8 dscp_ecn;
2319 uint16 total_length;
2320 uint16 identification;
2321 uint16 flags_fragment_offset;
2322 uint8 ttl;
2323 uint8 protocol;
2324 uint16 header_checksum;
2325 union {
2326 uint32 integer;
2327 uint8 array[4];
2328 } src_ip;
2329 union {
2330 uint32 integer;
2331 uint8 array[4];
2332 } dst_ip;
2333 } __attribute__((packed));
2334  
2335 struct udp_header {
2336 uint16 src_port;
2337 uint16 dst_port;
2338 union {
2339 uint16 length; /* UDP: length of UDP header and payload */
2340 uint16 checksum_coverage; /* UDPLITE: checksum_coverage */
2341 } len_chk_cov;
2342 uint16 checksum;
2343 } __attribute__((packed));
2344  
2345 struct ethernet_ip_udp_header {
2346 struct ethernet_header ethernet;
2347 struct ip_header ip;
2348 struct udp_header udp;
2349 } __attribute__((packed));
2350  
2351 struct ethernet_ipv6_udp_header {
2352 struct ethernet_header ethernet;
2353 struct ipv6_header ipv6;
2354 struct udp_header udp;
2355 uint8 payload[1];
2356 } __attribute__((packed));
2357  
2358 struct nexmon_header {
2359 uint32 hooked_fct;
2360 uint32 args[3];
2361 uint8 payload[1];
2362 } __attribute__((packed));
2363