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1 office 1 /***************************************************************************
2 * *
3 * ########### ########### ########## ########## *
4 * ############ ############ ############ ############ *
5 * ## ## ## ## ## ## ## *
6 * ## ## ## ## ## ## ## *
7 * ########### #### ###### ## ## ## ## ###### *
8 * ########### #### # ## ## ## ## # # *
9 * ## ## ###### ## ## ## ## # # *
10 * ## ## # ## ## ## ## # # *
11 * ############ ##### ###### ## ## ## ##### ###### *
12 * ########### ########### ## ## ## ########## *
13 * *
14 * S E C U R E M O B I L E N E T W O R K I N G *
15 * *
16 * This file is part of NexMon. *
17 * *
18 * Copyright (c) 2016 NexMon Team *
19 * *
20 * NexMon is free software: you can redistribute it and/or modify *
21 * it under the terms of the GNU General Public License as published by *
22 * the Free Software Foundation, either version 3 of the License, or *
23 * (at your option) any later version. *
24 * *
25 * NexMon is distributed in the hope that it will be useful, *
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
28 * GNU General Public License for more details. *
29 * *
30 * You should have received a copy of the GNU General Public License *
31 * along with NexMon. If not, see <http://www.gnu.org/licenses/>. *
32 * *
33 **************************************************************************/
34  
35 #include <types.h>
36 #include <bcmcdc.h>
37  
38 /* Most of these structs are taken from the bcm4339 includes file and might currently be wrong */
39  
40 struct wlc_hw_info {
41 struct wlc_info *wlc; /* 0x00 */
42 int PAD; /* 0x04 */
43 int PAD; /* 0x08 */
44 int PAD; /* 0x0c */
45 int PAD; /* 0x10 */
46 struct dma_info *di[6]; /* 0x14 - only 4 bytes */
47 int PAD; // 0x2c
48 int PAD; // 0x30
49 int PAD; // 0x34
50 int PAD; // 0x38
51 int PAD; // 0x3c
52 int PAD; // 0x40
53 int PAD; // 0x44
54 int PAD; // 0x48
55 int PAD; // 0x4c
56 int PAD; // 0x50
57 int PAD; // 0x54
58 int PAD; // 0x58
59 int PAD; // 0x5c
60 int PAD; // 0x60
61 int PAD; // 0x64
62 int PAD; // 0x68
63 int PAD; // 0x6c
64 int PAD; // 0x70
65 char PAD; // 0x74
66 char PAD; // 0x75
67 char ucode_loaded; /* 0x76 */
68 char PAD; /* 0x77 */
69 int PAD; /* 0x78 */
70 int sih; /* 0x7c */
71 int vars; /* 0x80 */
72 int vars_size; /* 0x84 */
73 struct d11regs* regs; /* 0x88 */
74 int physhim; /* 0x8c */
75 int phy_sh; /* 0x90 */
76 struct wlc_hwband *band; /* 0x94 */
77 int PAD; // 0x98
78 int PAD; // 0x9c
79 int PAD; // 0xa0
80 int PAD; // 0xa4
81 int PAD; // 0xa8
82 char up; // 0xac verified wl_dpc
83 char PAD;
84 char PAD;
85 char PAD;
86 int PAD; // 0xb0
87 int PAD; // 0xb4
88 int PAD; // 0xb8
89 int PAD; // 0xbc
90 int PAD; // 0xc0
91 int PAD; // 0xc4
92 int PAD; // 0xc8
93 int PAD; // 0xcc
94 int PAD; // 0xd0
95 int PAD; // 0xd4
96 int PAD; // 0xd8
97 int PAD; // 0xdc
98 int PAD; // 0xe0
99 int PAD; // 0xe4
100 int PAD; // 0xe8
101 int PAD; // 0xec
102 int PAD; // 0xf0
103 int PAD; // 0xf4
104 int PAD; // 0xf8
105 int PAD; // 0xfc
106 };
107  
108 struct wl_rxsts {
109 uint32 pkterror; /* error flags per pkt */
110 uint32 phytype; /* 802.11 A/B/G ... */
111 uint16 chanspec; /* channel spec */
112 uint16 datarate; /* rate in 500kbps (0 for HT frame) */
113 uint8 mcs; /* MCS for HT frame */
114 uint8 htflags; /* HT modulation flags */
115 uint8 PAD;
116 uint8 PAD;
117 uint32 antenna; /* antenna pkts received on */
118 uint32 pktlength; /* pkt length minus bcm phy hdr */
119 uint32 mactime; /* time stamp from mac, count per 1us */
120 uint32 sq; /* signal quality */
121 int32 signal; /* in dBm */
122 int32 noise; /* in dBm */
123 uint32 preamble; /* Unknown, short, long */
124 uint32 encoding; /* Unknown, CCK, PBCC, OFDM, HT */
125 uint32 nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */
126 void *wlif; /* wl interface */
127 } __attribute__((packed));
128  
129 /* status per error RX pkt */
130 #define WL_RXS_CRC_ERROR 0x00000001 /* CRC Error in packet */
131 #define WL_RXS_RUNT_ERROR 0x00000002 /* Runt packet */
132 #define WL_RXS_ALIGN_ERROR 0x00000004 /* Misaligned packet */
133 #define WL_RXS_OVERSIZE_ERROR 0x00000008 /* packet bigger than RX_LENGTH (usually 1518) */
134 #define WL_RXS_WEP_ICV_ERROR 0x00000010 /* Integrity Check Value error */
135 #define WL_RXS_WEP_ENCRYPTED 0x00000020 /* Encrypted with WEP */
136 #define WL_RXS_PLCP_SHORT 0x00000040 /* Short PLCP error */
137 #define WL_RXS_DECRYPT_ERR 0x00000080 /* Decryption error */
138 #define WL_RXS_OTHER_ERR 0x80000000 /* Other errors */
139  
140 /* phy type */
141 #define WL_RXS_PHY_A 0x00000000 /* A phy type */
142 #define WL_RXS_PHY_B 0x00000001 /* B phy type */
143 #define WL_RXS_PHY_G 0x00000002 /* G phy type */
144 #define WL_RXS_PHY_N 0x00000004 /* N phy type */
145  
146 /* encoding */
147 #define WL_RXS_ENCODING_UNKNOWN 0x00000000
148 #define WL_RXS_ENCODING_DSSS_CCK 0x00000001 /* DSSS/CCK encoding (1, 2, 5.5, 11) */
149 #define WL_RXS_ENCODING_OFDM 0x00000002 /* OFDM encoding */
150 #define WL_RXS_ENCODING_HT 0x00000003 /* HT encoding */
151 #define WL_RXS_ENCODING_AC 0x00000004 /* HT encoding */
152  
153 /* preamble */
154 #define WL_RXS_UNUSED_STUB 0x0 /* stub to match with wlc_ethereal.h */
155 #define WL_RXS_PREAMBLE_SHORT 0x00000001 /* Short preamble */
156 #define WL_RXS_PREAMBLE_LONG 0x00000002 /* Long preamble */
157 #define WL_RXS_PREAMBLE_HT_MM 0x00000003 /* HT mixed mode preamble */
158 #define WL_RXS_PREAMBLE_HT_GF 0x00000004 /* HT green field preamble */
159  
160 /* htflags */
161 #define WL_RXS_HTF_40 0x01
162 #define WL_RXS_HTF_20L 0x02
163 #define WL_RXS_HTF_20U 0x04
164 #define WL_RXS_HTF_SGI 0x08
165 #define WL_RXS_HTF_STBC_MASK 0x30
166 #define WL_RXS_HTF_STBC_SHIFT 4
167 #define WL_RXS_HTF_LDPC 0x40
168  
169 #define WL_RXS_NFRM_AMPDU_FIRST 0x00000001 /* first MPDU in A-MPDU */
170 #define WL_RXS_NFRM_AMPDU_SUB 0x00000002 /* subsequent MPDU(s) in A-MPDU */
171 #define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */
172 #define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */
173  
174 struct osl_info {
175 unsigned int pktalloced;
176 int PAD[1];
177 void *callback_when_dropped;
178 unsigned int bustype;
179 } __attribute__((packed));
180  
181 typedef struct sk_buff {
182 int field0; /* 0x00 */
183 int field4; /* 0x04 */
184 void *data; /* 0x08 */
185 short len; /* 0x0C */
186 short fieldE; // 0x0E
187 int field10; // 0x10
188 unsigned short next; // 0x14
189 unsigned short prev; // 0x16
190 unsigned short prev2; // 0x18
191 unsigned short prev3; // 0x1A
192 int PAD; // 0x1C
193 char byte20; // 0x20
194 char PAD; // 0x21
195 char PAD; // 0x22
196 char byte23; // 0x23
197 int PAD; // 0x24
198 int PAD; // 0x28
199 int dword2C; // 0x2C
200 } __attribute__((packed)) sk_buff;
201  
202 #define HNDRTE_DEV_NAME_MAX 16
203  
204 typedef struct hndrte_dev {
205 char name[HNDRTE_DEV_NAME_MAX];
206 struct hndrte_devfuncs *funcs;
207 uint32 devid;
208 void *softc; /* Software context */
209 uint32 flags; /* RTEDEVFLAG_XXXX */
210 struct hndrte_dev *next;
211 struct hndrte_dev *chained;
212 void *pdev;
213 } hndrte_dev;
214  
215 struct hndrte_devfuncs {
216 void *(*probe)(struct hndrte_dev *dev, void *regs, uint bus,
217 uint16 device, uint coreid, uint unit);
218 int (*open)(struct hndrte_dev *dev);
219 int (*close)(struct hndrte_dev *dev);
220 int (*xmit)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
221 int (*recv)(struct hndrte_dev *src, struct hndrte_dev *dev, void *pkt);
222 int (*ioctl)(struct hndrte_dev *dev, uint32 cmd, void *buffer, int len,
223 int *used, int *needed, int set);
224 void (*txflowcontrol) (struct hndrte_dev *dev, bool state, int prio);
225 void (*poll)(struct hndrte_dev *dev);
226 int (*xmit_ctl)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
227 int (*xmit2)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb, int8 ch);
228 };
229  
230 struct tunables {
231 char gap[62];
232 short somebnd; // @ 0x38
233 short rxbnd; // @ 0x40
234 };
235  
236 struct wlc_hwband {
237 int bandtype; /* 0x00 */
238 int bandunit; /* 0x04 */
239 char mhfs; /* 0x05 */
240 char PAD[10]; /* 0x06 */
241 char bandhw_stf_ss_mode; /* 0x13 */
242 short CWmin; /* 0x14 */
243 short CWmax; /* 0x16 */
244 int core_flags; /* 0x18 */
245 short phytype; /* 0x1C */
246 short phyrev; /* 0x1E */
247 short radioid; /* 0x20 */
248 short radiorev; /* 0x22 */
249 void *pi; /* 0x24 */
250 char abgphy_encore; /* 0x25 */
251 };
252  
253 /**
254 * Name might be inaccurate
255 */
256 struct device {
257 char name[16];
258 void *init_function;
259 int PAD;
260 void *some_device_info;
261 int PAD;
262 int PAD;
263 struct device *bound_device;
264 };
265  
266 /**
267 * Name might be inaccurate
268 * BCM43451b1: size is 0xb0
269 */
270 struct wl_info {
271 int unit; // 0x00
272 struct wlc_pub *pub; // 0x04
273 struct wlc_info *wlc; // 0x08
274 struct wlc_hw_info *wlc_hw; // 0x0C
275 struct hndrte_dev *dev; // 0x10
276 int PAD; // 0x14
277 int PAD; // 0x18
278 int PAD; // 0x1C
279 int PAD; // 0x20
280 int PAD; // 0x24
281 int PAD; // 0x28
282 int PAD; // 0x2C
283 int PAD; // 0x30
284 int PAD; // 0x34
285 int PAD; // 0x38
286 int PAD; // 0x3C
287 int PAD; // 0x40
288 int PAD; // 0x44
289 int PAD; // 0x48
290 int PAD; // 0x4C
291 int PAD; // 0x50
292 int PAD; // 0x54
293 int PAD; // 0x58
294 int PAD; // 0x5C
295 int PAD; // 0x60
296 int PAD; // 0x64
297 int PAD; // 0x68
298 int PAD; // 0x6C
299 int PAD; // 0x70
300 int PAD; // 0x74
301 int PAD; // 0x78
302 int PAD; // 0x7C
303 int PAD; // 0x80
304 int PAD; // 0x84
305 int PAD; // 0x88
306 int PAD; // 0x8C
307 int PAD; // 0x90
308 int PAD; // 0x94
309 int PAD; // 0x98
310 int PAD; // 0x9C
311 int PAD; // 0xA0
312 int PAD; // 0xA4
313 int PAD; // 0xA8
314 int PAD; // 0xAC
315 };
316  
317 /**
318 * Name might be inaccurate
319 */
320 struct sdiox_info {
321 int unit;
322 void *something;
323 void *sdio; // sdio_info struct
324 void *osh;
325 void *device_address;
326 } __attribute__((packed));
327  
328 struct wlcband {
329 int bandtype; /* 0x000 */
330 int bandunit; /* 0x004 */
331 short phytype; /* 0x008 */
332 short phyrev; /* 0x00A */
333 short radioid; /* 0x00C */
334 short radiorev; /* 0x00E */
335 void *pi; /* 0x010 */
336 char abgphy_encore; /* 0x014 */
337 char gmode; /* 0x015 */
338 char PAD; /* 0x016 */
339 char PAD; /* 0x017 */
340 void *hwrs_scb; /* 0x018 */
341 int defrateset; /* 0x01C */
342 int rspec_override; /* 0x020 */
343 int mrspec_override; /* 0x024 */
344 char band_stf_ss_mode; /* 0x028 */
345 char band_stf_stbc_tx; /* 0x029 */
346 int hw_rateset; /* 0x030 */
347 char basic_rate; /* 0x034 */
348 } __attribute__((packed));
349  
350 struct wlc_info {
351 struct wlc_pub *pub; /* 0x000 */
352 struct osl_info *osh; /* 0x004 */
353 void *wl; /* 0x008 */
354 volatile struct d11regs *regs; /* 0x00C */
355 struct wlc_hw_info *hw; /* 0x010 */
356 int PAD; /* 0x014 */
357 int PAD; /* 0x018 */
358 void *core; /* 0x01C */
359 struct wlcband *band; /* 0x020 verified */
360 int PAD; /* 0x024 */
361 struct wlcband *bandstate[2]; /* 0x028 */
362 int PAD; /* 0x030 */
363 int PAD; /* 0x034 */
364 int PAD; /* 0x038 */
365 int PAD; /* 0x03C */
366 int PAD; /* 0x040 */
367 int PAD; /* 0x044 */
368 int PAD; /* 0x048 */
369 int PAD; /* 0x04C */
370 int PAD; /* 0x050 */
371 int PAD; /* 0x054 */
372 int PAD; /* 0x058 */
373 int PAD; /* 0x05C */
374 int PAD; /* 0x060 */
375 int PAD; /* 0x064 */
376 int PAD; /* 0x068 */
377 int PAD; /* 0x06C */
378 int PAD; /* 0x070 */
379 int PAD; /* 0x074 */
380 int PAD; /* 0x078 */
381 int PAD; /* 0x07C */
382 int PAD; /* 0x080 */
383 int PAD; /* 0x084 */
384 int PAD; /* 0x088 */
385 int PAD; /* 0x08C */
386 int PAD; /* 0x090 */
387 int PAD; /* 0x094 */
388 int PAD; /* 0x098 */
389 int PAD; /* 0x09C */
390 int PAD; /* 0x0A0 */
391 int PAD; /* 0x0A4 */
392 int PAD; /* 0x0A8 */
393 int PAD; /* 0x0AC */
394 int PAD; /* 0x0B0 */
395 int PAD; /* 0x0B4 */
396 int PAD; /* 0x0B8 */
397 int PAD; /* 0x0BC */
398 int PAD; /* 0x0C0 */
399 int PAD; /* 0x0C4 */
400 int PAD; /* 0x0C8 */
401 int PAD; /* 0x0CC */
402 int PAD; /* 0x0D0 */
403 int PAD; /* 0x0D4 */
404 int PAD; /* 0x0D8 */
405 int PAD; /* 0x0DC */
406 int PAD; /* 0x0E0 */
407 int PAD; /* 0x0E4 */
408 int PAD; /* 0x0E8 */
409 int PAD; /* 0x0EC */
410 int PAD; /* 0x0F0 */
411 int PAD; /* 0x0F4 */
412 int PAD; /* 0x0F8 */
413 int PAD; /* 0x0FC */
414 int PAD; /* 0x100 */
415 int PAD; /* 0x104 */
416 int PAD; /* 0x108 */
417 int PAD; /* 0x10C */
418 int PAD; /* 0x110 */
419 int PAD; /* 0x114 */
420 int PAD; /* 0x118 */
421 int PAD; /* 0x11C */
422 int PAD; /* 0x120 */
423 int PAD; /* 0x124 */
424 int PAD; /* 0x128 */
425 int PAD; /* 0x12C */
426 int PAD; /* 0x130 */
427 int PAD; /* 0x134 */
428 int PAD; /* 0x138 */
429 int PAD; /* 0x13C */
430 int PAD; /* 0x140 */
431 int PAD; /* 0x144 */
432 int PAD; /* 0x148 */
433 int PAD; /* 0x14C */
434 int PAD; /* 0x150 */
435 int PAD; /* 0x154 */
436 int PAD; /* 0x158 */
437 void *cmi; /* 0x15C */
438 int PAD; /* 0x160 */
439 int PAD; /* 0x164 */
440 int PAD; /* 0x168 */
441 int PAD; /* 0x16C */
442 int PAD; /* 0x170 */
443 int PAD; /* 0x174 */
444 int PAD; /* 0x178 */
445 int PAD; /* 0x17C */
446 int PAD; /* 0x180 */
447 int PAD; /* 0x184 */
448 int PAD; /* 0x188 */
449 int PAD; /* 0x18C */
450 int PAD; /* 0x190 */
451 int PAD; /* 0x194 */
452 int PAD; /* 0x198 */
453 int PAD; /* 0x19C */
454 int PAD; /* 0x1A0 */
455 int PAD; /* 0x1A4 */
456 int PAD; /* 0x1A8 */
457 int PAD; /* 0x1AC */
458 int PAD; /* 0x1B0 */
459 int PAD; /* 0x1B4 */
460 int PAD; /* 0x1B8 */
461 int PAD; /* 0x1BC */
462 int PAD; /* 0x1C0 */
463 int PAD; /* 0x1C4 */
464 short PAD; /* 0x1C8 */
465 char bandlocked; /* 0x1CA */
466 char field_1CB; /* 0x1CB */
467 int PAD; /* 0x1CC */
468 int PAD; /* 0x1D0 */
469 int PAD; /* 0x1D4 */
470 int PAD; /* 0x1D8 */
471 int PAD; /* 0x1DC */
472 int PAD; /* 0x1E0 */
473 int PAD; /* 0x1E4 */
474 int PAD; /* 0x1E8 */
475 int PAD; /* 0x1EC */
476 int PAD; /* 0x1F0 */
477 int PAD; /* 0x1F4 */
478 int PAD; /* 0x1F8 */
479 int PAD; /* 0x1FC */
480 int PAD; /* 0x200 */
481 int PAD; /* 0x204 */
482 int monitor; /* 0x208 */
483 int bcnmisc_ibss; /* 0x20C */
484 int bcnmisc_scan; /* 0x210 */
485 int bcnmisc_monitor; /* 0x214 */
486 int PAD; /* 0x218 */
487 int PAD; /* 0x21C */
488 int PAD; /* 0x220 */
489 int PAD; /* 0x224 */
490 short PAD; /* 0x228 */
491 short wme_dp; /* 0x22A */
492 int PAD; /* 0x22C */
493 int PAD; /* 0x230 */
494 int PAD; /* 0x234 */
495 int PAD; /* 0x238 */
496 int PAD; /* 0x23C */
497 int PAD; /* 0x240 */
498 int PAD; /* 0x244 */
499 int PAD; /* 0x248 */
500 unsigned short tx_prec_map; /* 0x24C */
501 short PAD; /* 0x24E */
502 int PAD; /* 0x250 */
503 int PAD; /* 0x254 */
504 int PAD; /* 0x258 */
505 int PAD; /* 0x25C */
506 int PAD; /* 0x260 */
507 int PAD; /* 0x264 */
508 int PAD; /* 0x268 */
509 int PAD; /* 0x26C */
510 int PAD; /* 0x270 */
511 int PAD; /* 0x274 */
512 int PAD; /* 0x278 */
513 int PAD; /* 0x27C */
514 int PAD; /* 0x280 */
515 int PAD; /* 0x284 */
516 int PAD; /* 0x288 */
517 int PAD; /* 0x28C */
518 int PAD; /* 0x290 */
519 int PAD; /* 0x294 */
520 int PAD; /* 0x298 */
521 int PAD; /* 0x29C */
522 int PAD; /* 0x2A0 */
523 int PAD; /* 0x2A4 */
524 int PAD; /* 0x2A8 */
525 int PAD; /* 0x2AC */
526 int PAD; /* 0x2B0 */
527 int PAD; /* 0x2B4 */
528 int PAD; /* 0x2B8 */
529 int PAD; /* 0x2BC */
530 int PAD; /* 0x2C0 */
531 int PAD; /* 0x2C4 */
532 int PAD; /* 0x2C8 */
533 int PAD; /* 0x2CC */
534 int PAD; /* 0x2D0 */
535 int PAD; /* 0x2D4 */
536 int PAD; /* 0x2D8 */
537 int PAD; /* 0x2DC */
538 int PAD; /* 0x2E0 */
539 int PAD; /* 0x2E4 */
540 int PAD; /* 0x2E8 */
541 int PAD; /* 0x2EC */
542 int PAD; /* 0x2F0 */
543 int PAD; /* 0x2F4 */
544 int PAD; /* 0x2F8 */
545 int PAD; /* 0x2FC */
546 int PAD; /* 0X300 */
547 int PAD; /* 0X304 */
548 int PAD; /* 0X308 */
549 int PAD; /* 0X30C */
550 int PAD; /* 0X310 */
551 int PAD; /* 0X314 */
552 int PAD; /* 0X318 */
553 int PAD; /* 0X31C */
554 int PAD; /* 0X320 */
555 int PAD; /* 0X324 */
556 int PAD; /* 0X328 */
557 int PAD; /* 0X32C */
558 int PAD; /* 0X330 */
559 int PAD; /* 0X334 */
560 int PAD; /* 0X338 */
561 void *scan_results; /* 0X33C */
562 int PAD; /* 0X340 */
563 void *custom_scan_results; /* 0X344 */
564 int PAD; /* 0X348 */
565 int PAD; /* 0X34C */
566 int PAD; /* 0X350 */
567 int PAD; /* 0X354 */
568 int PAD; /* 0X358 */
569 int PAD; /* 0X35C */
570 int PAD; /* 0X360 */
571 short *field_364; /* 0X364 */
572 int PAD; /* 0X368 */
573 int PAD; /* 0X36C */
574 int PAD; /* 0X370 */
575 int PAD; /* 0X374 */
576 int PAD; /* 0X378 */
577 int PAD; /* 0X37C */
578 int PAD; /* 0X380 */
579 int PAD; /* 0X384 */
580 int PAD; /* 0X388 */
581 int PAD; /* 0X38C */
582 int PAD; /* 0X390 */
583 int PAD; /* 0X394 */
584 int PAD; /* 0X398 */
585 int PAD; /* 0X39C */
586 int PAD; /* 0X3A0 */
587 int PAD; /* 0X3A4 */
588 int PAD; /* 0X3A8 */
589 int PAD; /* 0X3AC */
590 int PAD; /* 0X3B0 */
591 int PAD; /* 0X3B4 */
592 int PAD; /* 0X3B8 */
593 int PAD; /* 0X3BC */
594 int PAD; /* 0X3C0 */
595 int PAD; /* 0X3C4 */
596 int PAD; /* 0X3C8 */
597 int PAD; /* 0X3CC */
598 int PAD; /* 0X3D0 */
599 int PAD; /* 0X3D4 */
600 int PAD; /* 0X3D8 */
601 int PAD; /* 0X3DC */
602 int PAD; /* 0X3E0 */
603 int PAD; /* 0X3E4 */
604 int PAD; /* 0X3E8 */
605 int PAD; /* 0X3EC */
606 int PAD; /* 0X3F0 */
607 int PAD; /* 0X3F4 */
608 int PAD; /* 0X3F8 */
609 int PAD; /* 0X3FC */
610 int PAD; /* 0X400 */
611 int PAD; /* 0X404 */
612 int PAD; /* 0X408 */
613 int PAD; /* 0X40C */
614 int PAD; /* 0X410 */
615 int PAD; /* 0X414 */
616 int PAD; /* 0X418 */
617 int PAD; /* 0X41C */
618 int PAD; /* 0X420 */
619 int PAD; /* 0X424 */
620 int PAD; /* 0X428 */
621 int PAD; /* 0X42C */
622 int PAD; /* 0X430 */
623 int PAD; /* 0X434 */
624 int PAD; /* 0X438 */
625 int PAD; /* 0X43C */
626 int PAD; /* 0X440 */
627 int PAD; /* 0X444 */
628 int PAD; /* 0X448 */
629 int PAD; /* 0X44C */
630 int PAD; /* 0X450 */
631 int PAD; /* 0X454 */
632 int PAD; /* 0X458 */
633 int PAD; /* 0X45C */
634 int PAD; /* 0X460 */
635 int PAD; /* 0X464 */
636 int PAD; /* 0X468 */
637 int PAD; /* 0X46C */
638 int PAD; /* 0X470 */
639 int PAD; /* 0X474 */
640 int PAD; /* 0X478 */
641 int PAD; /* 0X47C */
642 int PAD; /* 0X480 */
643 int PAD; /* 0X484 */
644 int PAD; /* 0X488 */
645 int PAD; /* 0X48C */
646 int PAD; /* 0X490 */
647 int PAD; /* 0X494 */
648 int PAD; /* 0X498 */
649 int PAD; /* 0X49C */
650 int PAD; /* 0X4A0 */
651 int PAD; /* 0X4A4 */
652 int PAD; /* 0X4A8 */
653 int PAD; /* 0X4AC */
654 int PAD; /* 0X4B0 */
655 int PAD; /* 0X4B4 */
656 int PAD; /* 0X4B8 */
657 int PAD; /* 0X4BC */
658 int PAD; /* 0X4C0 */
659 int PAD; /* 0X4C4 */
660 int PAD; /* 0X4C8 */
661 int PAD; /* 0X4CC */
662 int PAD; /* 0X4D0 */
663 int PAD; /* 0X4D4 */
664 int PAD; /* 0X4D8 */
665 int PAD; /* 0X4DC */
666 int PAD; /* 0X4E0 */
667 int PAD; /* 0X4E4 */
668 int PAD; /* 0X4E8 */
669 int PAD; /* 0X4EC */
670 int PAD; /* 0X4F0 */
671 int PAD; /* 0X4F4 */
672 int PAD; /* 0X4F8 */
673 int PAD; /* 0X4FC */
674 int PAD; /* 0X500 */
675 int PAD; /* 0X504 */
676 int PAD; /* 0X508 */
677 int PAD; /* 0X50C */
678 short some_chanspec; /* 0X510 */
679 short PAD; /* 0X512 */
680 int PAD; /* 0X514 */
681 int PAD; /* 0X518 */
682 int PAD; /* 0X51C */
683 int PAD; /* 0X520 */
684 int PAD; /* 0X524 */
685 int PAD; /* 0X528 */
686 int PAD; /* 0X52C */
687 int PAD; /* 0X530 */
688 int PAD; /* 0X534 */
689 int PAD; /* 0X538 */
690 int PAD; /* 0X53C */
691 int PAD; /* 0X540 */
692 int PAD; /* 0X544 */
693 int PAD; /* 0X548 */
694 int PAD; /* 0X54C */
695 int PAD; /* 0X550 */
696 int PAD; /* 0X554 */
697 int PAD; /* 0X558 */
698 int PAD; /* 0X55C */
699 int PAD; /* 0X560 */
700 int PAD; /* 0X564 */
701 int PAD; /* 0X568 */
702 int PAD; /* 0X56C */
703 int PAD; /* 0X570 */
704 int PAD; /* 0X574 */
705 int PAD; /* 0X578 */
706 int PAD; /* 0X57C */
707 int PAD; /* 0X580 */
708 int PAD; /* 0X584 */
709 int PAD; /* 0X588 */
710 int PAD; /* 0X58C */
711 int PAD; /* 0X590 */
712 int PAD; /* 0X594 */
713 int PAD; /* 0X598 */
714 int PAD; /* 0X59C */
715 int PAD; /* 0X5A0 */
716 int PAD; /* 0X5A4 */
717 int PAD; /* 0X5A8 */
718 int PAD; /* 0X5AC */
719 int PAD; /* 0X5B0 */
720 int PAD; /* 0X5B4 */
721 int PAD; /* 0X5B8 */
722 int PAD; /* 0X5BC */
723 void *active_queue; /* 0X5C0 */
724 int PAD; /* 0X5C4 */
725 int PAD; /* 0X5C8 */
726 int PAD; /* 0X5CC */
727 void *hwtimer_stuff; /* 0X5D0 verified for BCM43451b1 */
728 int PAD; /* 0X5D4 */
729 int PAD; /* 0X5D8 */
730 int PAD; /* 0X5DC */
731 int PAD; /* 0X5E0 */
732 int PAD; /* 0X5E4 */
733 int PAD; /* 0X5E8 */
734 int PAD; /* 0X5EC */
735 int PAD; /* 0X5F0 */
736 int PAD; /* 0X5F4 */
737 int PAD; /* 0X5F8 */
738 int PAD; /* 0X5FC */
739 };
740  
741 struct wlc_pub {
742 struct wlc_info *wlc; /* 0x000 */
743 int PAD; /* 0x004 */
744 int PAD; /* 0x008 */
745 int PAD; /* 0x00C */
746 int PAD; /* 0x010 */
747 void *osh; /* 0x014 */
748 int PAD; /* 0x018 */
749 int PAD; /* 0x01C */
750 int PAD; /* 0x020 */
751 char up_maybe; /* 0x024 */
752 char field_25; /* 0x025 */
753 char field_26; /* 0x026 */
754 char field_27; /* 0x027 */
755 struct tunables *tunables; /* 0x028 */
756 int PAD; /* 0x02C */
757 int field_30; /* 0x030 */
758 int PAD; /* 0x034 */
759 int PAD; /* 0x038 */
760 int PAD; /* 0x03C */
761 int PAD; /* 0x040 */
762 char PAD; /* 0x044 */
763 char PAD; /* 0x045 */
764 char field_46; /* 0x046 */
765 char PAD; /* 0x047 */
766 int PAD; /* 0x048 */
767 char associated; /* 0x04C */
768 char PAD; /* 0x04D */
769 char PAD; /* 0x04E */
770 char PAD; /* 0x04F */
771 int PAD; /* 0x050 */
772 char gap2[147];
773 char is_amsdu; // @ 0xe7
774 } __attribute__((packed));
775  
776 struct wlc_bsscfg {
777 void *wlc; /* 0x000 */
778 char associated; /* 0x004 */
779 char PAD; /* 0x005 */
780 char PAD; /* 0x006 */
781 char PAD; /* 0x007 */
782 int PAD; /* 0x008 */
783 int PAD; /* 0x00C */
784 int PAD; /* 0x010 */
785 int PAD; /* 0x014 */
786 int PAD; /* 0x018 */
787 int PAD; /* 0x01C */
788 int PAD; /* 0x020 */
789 int PAD; /* 0x024 */
790 int PAD; /* 0x028 */
791 int PAD; /* 0x02C */
792 int PAD; /* 0x030 */
793 int PAD; /* 0x034 */
794 int PAD; /* 0x038 */
795 int PAD; /* 0x03C */
796 int PAD; /* 0x040 */
797 int PAD; /* 0x044 */
798 int PAD; /* 0x048 */
799 int PAD; /* 0x04C */
800 int PAD; /* 0x050 */
801 int PAD; /* 0x054 */
802 int PAD; /* 0x058 */
803 int PAD; /* 0x05C */
804 int PAD; /* 0x060 */
805 int PAD; /* 0x064 */
806 int PAD; /* 0x068 */
807 int PAD; /* 0x06C */
808 int PAD; /* 0x070 */
809 int PAD; /* 0x074 */
810 int PAD; /* 0x078 */
811 int PAD; /* 0x07C */
812 int PAD; /* 0x080 */
813 int PAD; /* 0x084 */
814 int PAD; /* 0x088 */
815 int PAD; /* 0x08C */
816 int PAD; /* 0x090 */
817 int PAD; /* 0x094 */
818 int PAD; /* 0x098 */
819 int PAD; /* 0x09C */
820 int PAD; /* 0x0A0 */
821 int PAD; /* 0x0A4 */
822 int PAD; /* 0x0A8 */
823 int PAD; /* 0x0AC */
824 int PAD; /* 0x0B0 */
825 int PAD; /* 0x0B4 */
826 int PAD; /* 0x0B8 */
827 int PAD; /* 0x0BC */
828 int PAD; /* 0x0C0 */
829 int PAD; /* 0x0C4 */
830 int PAD; /* 0x0C8 */
831 int PAD; /* 0x0CC */
832 int PAD; /* 0x0D0 */
833 int PAD; /* 0x0D4 */
834 int PAD; /* 0x0D8 */
835 int PAD; /* 0x0DC */
836 int PAD; /* 0x0E0 */
837 int PAD; /* 0x0E4 */
838 int PAD; /* 0x0E8 */
839 int PAD; /* 0x0EC */
840 int PAD; /* 0x0F0 */
841 int PAD; /* 0x0F4 */
842 int PAD; /* 0x0F8 */
843 int PAD; /* 0x0FC */
844 int PAD; /* 0x100 */
845 int PAD; /* 0x104 */
846 int PAD; /* 0x108 */
847 int PAD; /* 0x10C */
848 int PAD; /* 0x110 */
849 int PAD; /* 0x114 */
850 int PAD; /* 0x118 */
851 int PAD; /* 0x11C */
852 int PAD; /* 0x120 */
853 int PAD; /* 0x124 */
854 int PAD; /* 0x128 */
855 int PAD; /* 0x12C */
856 int PAD; /* 0x130 */
857 int PAD; /* 0x134 */
858 int PAD; /* 0x138 */
859 int PAD; /* 0x13C */
860 int PAD; /* 0x140 */
861 int PAD; /* 0x144 */
862 int PAD; /* 0x148 */
863 int PAD; /* 0x14C */
864 int PAD; /* 0x150 */
865 int PAD; /* 0x154 */
866 int PAD; /* 0x158 */
867 int PAD; /* 0x15C */
868 int PAD; /* 0x160 */
869 int PAD; /* 0x164 */
870 int PAD; /* 0x168 */
871 int PAD; /* 0x16C */
872 int PAD; /* 0x170 */
873 int PAD; /* 0x174 */
874 int PAD; /* 0x178 */
875 int PAD; /* 0x17C */
876 int PAD; /* 0x180 */
877 int PAD; /* 0x184 */
878 int PAD; /* 0x188 */
879 int PAD; /* 0x18C */
880 int PAD; /* 0x190 */
881 int PAD; /* 0x194 */
882 int PAD; /* 0x198 */
883 int PAD; /* 0x19C */
884 int PAD; /* 0x1A0 */
885 int PAD; /* 0x1A4 */
886 int PAD; /* 0x1A8 */
887 int PAD; /* 0x1AC */
888 int PAD; /* 0x1B0 */
889 int PAD; /* 0x1B4 */
890 int PAD; /* 0x1B8 */
891 int PAD; /* 0x1BC */
892 int PAD; /* 0x1C0 */
893 int PAD; /* 0x1C4 */
894 int PAD; /* 0x1C8 */
895 int PAD; /* 0x1CC */
896 int PAD; /* 0x1D0 */
897 int PAD; /* 0x1D4 */
898 int PAD; /* 0x1D8 */
899 int PAD; /* 0x1DC */
900 int PAD; /* 0x1E0 */
901 int PAD; /* 0x1E4 */
902 int PAD; /* 0x1E8 */
903 int PAD; /* 0x1EC */
904 int PAD; /* 0x1F0 */
905 int PAD; /* 0x1F4 */
906 int PAD; /* 0x1F8 */
907 int PAD; /* 0x1FC */
908 int PAD; /* 0x200 */
909 int PAD; /* 0x204 */
910 int PAD; /* 0x208 */
911 int PAD; /* 0x20C */
912 int PAD; /* 0x210 */
913 int PAD; /* 0x214 */
914 int PAD; /* 0x218 */
915 int PAD; /* 0x21C */
916 int PAD; /* 0x220 */
917 int PAD; /* 0x224 */
918 int PAD; /* 0x228 */
919 int PAD; /* 0x22C */
920 int PAD; /* 0x230 */
921 int PAD; /* 0x234 */
922 int PAD; /* 0x238 */
923 int PAD; /* 0x23C */
924 int PAD; /* 0x240 */
925 int PAD; /* 0x244 */
926 int PAD; /* 0x248 */
927 int PAD; /* 0x24C */
928 int PAD; /* 0x250 */
929 int PAD; /* 0x254 */
930 int PAD; /* 0x258 */
931 int PAD; /* 0x25C */
932 int PAD; /* 0x260 */
933 int PAD; /* 0x264 */
934 int PAD; /* 0x268 */
935 int PAD; /* 0x26C */
936 int PAD; /* 0x270 */
937 int PAD; /* 0x274 */
938 int PAD; /* 0x278 */
939 int PAD; /* 0x27C */
940 int PAD; /* 0x280 */
941 int PAD; /* 0x284 */
942 int PAD; /* 0x288 */
943 int PAD; /* 0x28C */
944 int PAD; /* 0x290 */
945 int PAD; /* 0x294 */
946 int PAD; /* 0x298 */
947 int PAD; /* 0x29C */
948 int PAD; /* 0x2A0 */
949 int PAD; /* 0x2A4 */
950 int PAD; /* 0x2A8 */
951 int PAD; /* 0x2AC */
952 int PAD; /* 0x2B0 */
953 int PAD; /* 0x2B4 */
954 int PAD; /* 0x2B8 */
955 int PAD; /* 0x2BC */
956 int PAD; /* 0x2C0 */
957 int PAD; /* 0x2C4 */
958 int PAD; /* 0x2C8 */
959 int PAD; /* 0x2CC */
960 int PAD; /* 0x2D0 */
961 int PAD; /* 0x2D4 */
962 int PAD; /* 0x2D8 */
963 int PAD; /* 0x2DC */
964 int PAD; /* 0x2E0 */
965 int PAD; /* 0x2E4 */
966 int PAD; /* 0x2E8 */
967 int PAD; /* 0x2EC */
968 int PAD; /* 0x2F0 */
969 int PAD; /* 0x2F4 */
970 int PAD; /* 0x2F8 */
971 int PAD; /* 0x2FC */
972 int PAD; /* 0X300 */
973 int PAD; /* 0X304 */
974 int PAD; /* 0X308 */
975 int PAD; /* 0X30C */
976 int PAD; /* 0X310 */
977 int PAD; /* 0X314 */
978 int PAD; /* 0X318 */
979 int PAD; /* 0X31C */
980 int PAD; /* 0X320 */
981 int PAD; /* 0X324 */
982 int PAD; /* 0X328 */
983 int PAD; /* 0X32C */
984 int PAD; /* 0X330 */
985 int PAD; /* 0X334 */
986 int PAD; /* 0X338 */
987 int PAD; /* 0X33C */
988 int PAD; /* 0X340 */
989 int PAD; /* 0X344 */
990 int PAD; /* 0X348 */
991 int PAD; /* 0X34C */
992 int PAD; /* 0X350 */
993 int PAD; /* 0X354 */
994 int PAD; /* 0X358 */
995 int PAD; /* 0X35C */
996 int PAD; /* 0X360 */
997 int PAD; /* 0X364 */
998 int PAD; /* 0X368 */
999 int PAD; /* 0X36C */
1000 int PAD; /* 0X370 */
1001 int PAD; /* 0X374 */
1002 int PAD; /* 0X378 */
1003 int PAD; /* 0X37C */
1004 int PAD; /* 0X380 */
1005 int PAD; /* 0X384 */
1006 int PAD; /* 0X388 */
1007 int PAD; /* 0X38C */
1008 int PAD; /* 0X390 */
1009 int PAD; /* 0X394 */
1010 int PAD; /* 0X398 */
1011 int PAD; /* 0X39C */
1012 int PAD; /* 0X3A0 */
1013 int PAD; /* 0X3A4 */
1014 int PAD; /* 0X3A8 */
1015 int PAD; /* 0X3AC */
1016 int PAD; /* 0X3B0 */
1017 int PAD; /* 0X3B4 */
1018 int PAD; /* 0X3B8 */
1019 int PAD; /* 0X3BC */
1020 int PAD; /* 0X3C0 */
1021 int PAD; /* 0X3C4 */
1022 int PAD; /* 0X3C8 */
1023 int PAD; /* 0X3CC */
1024 int PAD; /* 0X3D0 */
1025 int PAD; /* 0X3D4 */
1026 int PAD; /* 0X3D8 */
1027 int PAD; /* 0X3DC */
1028 int PAD; /* 0X3E0 */
1029 int PAD; /* 0X3E4 */
1030 int PAD; /* 0X3E8 */
1031 int PAD; /* 0X3EC */
1032 int PAD; /* 0X3F0 */
1033 int PAD; /* 0X3F4 */
1034 int PAD; /* 0X3F8 */
1035 int PAD; /* 0X3FC */
1036 int PAD; /* 0X400 */
1037 int PAD; /* 0X404 */
1038 int PAD; /* 0X408 */
1039 int PAD; /* 0X40C */
1040 int PAD; /* 0X410 */
1041 int PAD; /* 0X414 */
1042 int PAD; /* 0X418 */
1043 int PAD; /* 0X41C */
1044 int PAD; /* 0X420 */
1045 int PAD; /* 0X424 */
1046 int PAD; /* 0X428 */
1047 int PAD; /* 0X42C */
1048 int PAD; /* 0X430 */
1049 int PAD; /* 0X434 */
1050 int PAD; /* 0X438 */
1051 int PAD; /* 0X43C */
1052 int PAD; /* 0X440 */
1053 int PAD; /* 0X444 */
1054 int PAD; /* 0X448 */
1055 int PAD; /* 0X44C */
1056 int PAD; /* 0X450 */
1057 int PAD; /* 0X454 */
1058 int PAD; /* 0X458 */
1059 int PAD; /* 0X45C */
1060 int PAD; /* 0X460 */
1061 int PAD; /* 0X464 */
1062 int PAD; /* 0X468 */
1063 int PAD; /* 0X46C */
1064 int PAD; /* 0X470 */
1065 int PAD; /* 0X474 */
1066 int PAD; /* 0X478 */
1067 int PAD; /* 0X47C */
1068 int PAD; /* 0X480 */
1069 int PAD; /* 0X484 */
1070 int PAD; /* 0X488 */
1071 int PAD; /* 0X48C */
1072 int PAD; /* 0X490 */
1073 int PAD; /* 0X494 */
1074 int PAD; /* 0X498 */
1075 int PAD; /* 0X49C */
1076 int PAD; /* 0X4A0 */
1077 int PAD; /* 0X4A4 */
1078 int PAD; /* 0X4A8 */
1079 int PAD; /* 0X4AC */
1080 int PAD; /* 0X4B0 */
1081 int PAD; /* 0X4B4 */
1082 int PAD; /* 0X4B8 */
1083 int PAD; /* 0X4BC */
1084 int PAD; /* 0X4C0 */
1085 int PAD; /* 0X4C4 */
1086 int PAD; /* 0X4C8 */
1087 int PAD; /* 0X4CC */
1088 int PAD; /* 0X4D0 */
1089 int PAD; /* 0X4D4 */
1090 int PAD; /* 0X4D8 */
1091 int PAD; /* 0X4DC */
1092 int PAD; /* 0X4E0 */
1093 int PAD; /* 0X4E4 */
1094 int PAD; /* 0X4E8 */
1095 int PAD; /* 0X4EC */
1096 int PAD; /* 0X4F0 */
1097 int PAD; /* 0X4F4 */
1098 int PAD; /* 0X4F8 */
1099 int PAD; /* 0X4FC */
1100 int PAD; /* 0X500 */
1101 int PAD; /* 0X504 */
1102 int PAD; /* 0X508 */
1103 int PAD; /* 0X50C */
1104 int PAD; /* 0X510 */
1105 int PAD; /* 0X514 */
1106 int PAD; /* 0X518 */
1107 int PAD; /* 0X51C */
1108 int PAD; /* 0X520 */
1109 int PAD; /* 0X524 */
1110 int PAD; /* 0X528 */
1111 int PAD; /* 0X52C */
1112 int PAD; /* 0X530 */
1113 int PAD; /* 0X534 */
1114 int PAD; /* 0X538 */
1115 int PAD; /* 0X53C */
1116 int PAD; /* 0X540 */
1117 short PAD; /* 0X544 */
1118 short field_546; /* 0X546 */
1119 int PAD; /* 0X548 */
1120 int PAD; /* 0X54C */
1121 int PAD; /* 0X550 */
1122 int PAD; /* 0X554 */
1123 int PAD; /* 0X558 */
1124 int PAD; /* 0X55C */
1125 int PAD; /* 0X560 */
1126 int PAD; /* 0X564 */
1127 int PAD; /* 0X568 */
1128 int PAD; /* 0X56C */
1129 int PAD; /* 0X570 */
1130 int PAD; /* 0X574 */
1131 int PAD; /* 0X578 */
1132 int PAD; /* 0X57C */
1133 int PAD; /* 0X580 */
1134 int PAD; /* 0X584 */
1135 } __attribute__((packed));
1136  
1137 struct hnddma_pub {
1138 void *di_fn; /* DMA function pointers */
1139 unsigned int txavail; /* # free tx descriptors */
1140 unsigned int dmactrlflags; /* dma control flags */
1141 /* rx error counters */
1142 unsigned int rxgiants; /* rx giant frames */
1143 unsigned int rxnobuf; /* rx out of dma descriptors */
1144 /* tx error counters */
1145 unsigned int txnobuf; /* tx out of dma descriptors */
1146 } __attribute__((packed));
1147  
1148 struct dma_info {
1149 struct hnddma_pub hnddma; /* exported structure */
1150 int msg_level; /* message level pointer */
1151 int something;
1152 char name[8]; /* callers name for diag msgs */
1153 void *osh;
1154 void *sih;
1155 bool dma64; /* this dma engine is operating in 64-bit mode */
1156 bool addrext; /* this dma engine supports DmaExtendedAddrChanges */
1157 char gap2[2];
1158 void *txregs; /* 64-bit dma tx engine registers */
1159 void *rxregs; /* 64-bit dma rx engine registers */
1160 void *txd; /* pointer to dma64 tx descriptor ring */
1161 void *rxd; /* pointer to dma64 rx descriptor ring */
1162 short dmadesc_align; /* alignment requirement for dma descriptors */
1163 short ntxd; /* # tx descriptors tunable */
1164 short txin; /* index of next descriptor to reclaim */
1165 short txout; /* index of next descriptor to post */
1166 void **txp; /* pointer to parallel array of pointers to packets */
1167 void *tx_dmah; /* DMA MAP meta-data handle */
1168 int txp_dmah;
1169 int txdpa; /* Aligned physical address of descriptor ring */
1170 int txdpaorig; /* Original physical address of descriptor ring */
1171 short txdalign; /* #bytes added to alloc'd mem to align txd */
1172 int txdalloc; /* #bytes allocated for the ring */
1173 int xmtptrbase; /* When using unaligned descriptors, the ptr register
1174 * is not just an index, it needs all 13 bits to be
1175 * an offset from the addr register.
1176 */
1177 short PAD;
1178 short nrxd;
1179 short rxin;
1180 short rxout;
1181 short PAD;
1182 void **rxp;
1183 int PAD;
1184 int PAD;
1185 int rxdpa;
1186 short rxdalign;
1187 short PAD;
1188 int PAD;
1189 int PAD;
1190 int PAD;
1191 int rxbufsize; /* rx buffer size in bytes, not including the extra headroom */
1192 int rxextrahdrroom; /* extra rx headroom. */
1193  
1194 } __attribute__((packed));
1195  
1196 struct intctrlregs {
1197 unsigned int intstatus;
1198 unsigned int intmask;
1199 };
1200  
1201 /* read: 32-bit register that can be read as 32-bit or as 2 16-bit
1202 * write: only low 16b-it half can be written
1203 */
1204 union pmqreg {
1205 unsigned int pmqhostdata; /* read only! */
1206 struct {
1207 unsigned short pmqctrlstatus; /* read/write */
1208 unsigned short PAD;
1209 } w;
1210 };
1211  
1212 /* dma registers per channel(xmt or rcv) */
1213 struct dma64regs {
1214 unsigned int control; /* enable, et al */
1215 unsigned int ptr; /* last descriptor posted to chip */
1216 unsigned int addrlow; /* desc ring base address low 32-bits (8K aligned) */
1217 unsigned int addrhigh; /* desc ring base address bits 63:32 (8K aligned) */
1218 unsigned int status0; /* current descriptor, xmt state */
1219 unsigned int status1; /* active descriptor, xmt error */
1220 };
1221  
1222 /* 4byte-wide pio register set per channel(xmt or rcv) */
1223 struct pio4regs {
1224 unsigned int fifocontrol;
1225 unsigned int fifodata;
1226 };
1227  
1228 struct fifo64 {
1229 struct dma64regs dmaxmt; /* dma tx */
1230 struct pio4regs piotx; /* pio tx */
1231 struct dma64regs dmarcv; /* dma rx */
1232 struct pio4regs piorx; /* pio rx */
1233 };
1234  
1235 struct dma32diag { /* diag access */
1236 unsigned int fifoaddr; /* diag address */
1237 unsigned int fifodatalow; /* low 32bits of data */
1238 unsigned int fifodatahigh; /* high 32bits of data */
1239 unsigned int pad; /* reserved */
1240 };
1241  
1242 /*
1243 * Host Interface Registers
1244 */
1245 struct d11regs {
1246 /* Device Control ("semi-standard host registers") */
1247 unsigned int PAD[3]; /* 0x0 - 0x8 */
1248 unsigned int biststatus; /* 0xC */
1249 unsigned int biststatus2; /* 0x10 */
1250 unsigned int PAD; /* 0x14 */
1251 unsigned int gptimer; /* 0x18 */
1252 unsigned int usectimer; /* 0x1c *//* for corerev >= 26 */
1253  
1254 /* Interrupt Control *//* 0x20 */
1255 struct intctrlregs intctrlregs[8];
1256  
1257 unsigned int PAD[40]; /* 0x60 - 0xFC */
1258  
1259 unsigned int intrcvlazy[4]; /* 0x100 - 0x10C */
1260  
1261 unsigned int PAD[4]; /* 0x110 - 0x11c */
1262  
1263 unsigned int maccontrol; /* 0x120 */
1264 unsigned int maccommand; /* 0x124 */
1265 unsigned int macintstatus; /* 0x128 */
1266 unsigned int macintmask; /* 0x12C */
1267  
1268 /* Transmit Template Access */
1269 unsigned int tplatewrptr; /* 0x130 */
1270 unsigned int tplatewrdata; /* 0x134 */
1271 unsigned int PAD[2]; /* 0x138 - 0x13C */
1272  
1273 /* PMQ registers */
1274 union pmqreg pmqreg; /* 0x140 */
1275 unsigned int pmqpatl; /* 0x144 */
1276 unsigned int pmqpath; /* 0x148 */
1277 unsigned int PAD; /* 0x14C */
1278  
1279 unsigned int chnstatus; /* 0x150 */
1280 unsigned int psmdebug; /* 0x154 */
1281 unsigned int phydebug; /* 0x158 */
1282 unsigned int machwcap; /* 0x15C */
1283  
1284 /* Extended Internal Objects */
1285 unsigned int objaddr; /* 0x160 */
1286 unsigned int objdata; /* 0x164 */
1287 unsigned int PAD[2]; /* 0x168 - 0x16c */
1288  
1289 unsigned int frmtxstatus; /* 0x170 */
1290 unsigned int frmtxstatus2; /* 0x174 */
1291 unsigned int PAD[2]; /* 0x178 - 0x17c */
1292  
1293 /* TSF host access */
1294 unsigned int tsf_timerlow; /* 0x180 */
1295 unsigned int tsf_timerhigh; /* 0x184 */
1296 unsigned int tsf_cfprep; /* 0x188 */
1297 unsigned int tsf_cfpstart; /* 0x18c */
1298 unsigned int tsf_cfpmaxdur32; /* 0x190 */
1299 unsigned int PAD[3]; /* 0x194 - 0x19c */
1300  
1301 unsigned int maccontrol1; /* 0x1a0 */
1302 unsigned int machwcap1; /* 0x1a4 */
1303 unsigned int PAD[14]; /* 0x1a8 - 0x1dc */
1304  
1305 /* Clock control and hardware workarounds*/
1306 unsigned int clk_ctl_st; /* 0x1e0 */
1307 unsigned int hw_war;
1308 unsigned int d11_phypllctl; /* the phypll request/avail bits are
1309 * moved to clk_ctl_st
1310 */
1311 unsigned int PAD[5]; /* 0x1ec - 0x1fc */
1312  
1313 /* 0x200-0x37F dma/pio registers */
1314 struct fifo64 fifo64regs[6];
1315  
1316 /* FIFO diagnostic port access */
1317 struct dma32diag dmafifo; /* 0x380 - 0x38C */
1318  
1319 unsigned int aggfifocnt; /* 0x390 */
1320 unsigned int aggfifodata; /* 0x394 */
1321 unsigned int PAD[16]; /* 0x398 - 0x3d4 */
1322 unsigned short radioregaddr; /* 0x3d8 */
1323 unsigned short radioregdata; /* 0x3da */
1324  
1325 /*
1326 * time delay between the change on rf disable input and
1327 * radio shutdown
1328 */
1329 unsigned int rfdisabledly; /* 0x3DC */
1330  
1331 /* PHY register access */
1332 unsigned short phyversion; /* 0x3e0 - 0x0 */
1333 unsigned short phybbconfig; /* 0x3e2 - 0x1 */
1334 unsigned short phyadcbias; /* 0x3e4 - 0x2 Bphy only */
1335 unsigned short phyanacore; /* 0x3e6 - 0x3 pwwrdwn on aphy */
1336 unsigned short phyrxstatus0; /* 0x3e8 - 0x4 */
1337 unsigned short phyrxstatus1; /* 0x3ea - 0x5 */
1338 unsigned short phycrsth; /* 0x3ec - 0x6 */
1339 unsigned short phytxerror; /* 0x3ee - 0x7 */
1340 unsigned short phychannel; /* 0x3f0 - 0x8 */
1341 unsigned short PAD[1]; /* 0x3f2 - 0x9 */
1342 unsigned short phytest; /* 0x3f4 - 0xa */
1343 unsigned short phy4waddr; /* 0x3f6 - 0xb */
1344 unsigned short phy4wdatahi; /* 0x3f8 - 0xc */
1345 unsigned short phy4wdatalo; /* 0x3fa - 0xd */
1346 unsigned short phyregaddr; /* 0x3fc - 0xe */
1347 unsigned short phyregdata; /* 0x3fe - 0xf */
1348  
1349 /* IHR *//* 0x400 - 0x7FE */
1350  
1351 /* RXE Block */
1352 unsigned short PAD; /* SPR_RXE_0x00 0x400 */
1353 unsigned short PAD; /* SPR_RXE_Copy_Offset 0x402 */
1354 unsigned short PAD; /* SPR_RXE_Copy_Length 0x404 */
1355 unsigned short rcv_fifo_ctl; /* SPR_RXE_FIFOCTL0 0x406 */
1356 unsigned short PAD; /* SPR_RXE_FIFOCTL1 0x408 */
1357 unsigned short rcv_frm_cnt; /* SPR_Received_Frame_Count 0x40a */
1358 unsigned short PAD; /* SPR_RXE_0x0c 0x40c */
1359 unsigned short PAD; /* SPR_RXE_RXHDR_OFFSET 0x40e */
1360 unsigned short PAD; /* SPR_RXE_RXHDR_LEN 0x410 */
1361 unsigned short PAD; /* SPR_RXE_PHYRXSTAT0 0x412 */
1362 unsigned short rssi; /* SPR_RXE_PHYRXSTAT1 0x414 */
1363 unsigned short PAD; /* SPR_RXE_0x16 0x416 */
1364 unsigned short PAD; /* SPR_RXE_FRAMELEN 0x418 */
1365 unsigned short PAD; /* SPR_RXE_0x1a 0x41a */
1366 unsigned short PAD; /* SPR_RXE_ENCODING 0x41c */
1367 unsigned short PAD; /* SPR_RXE_0x1e 0x41e */
1368 unsigned short rcm_ctl; /* SPR_RCM_Control 0x420 */
1369 unsigned short rcm_mat_data; /* SPR_RCM_Match_Data 0x422 */
1370 unsigned short rcm_mat_mask; /* SPR_RCM_Match_Mask 0x424 */
1371 unsigned short rcm_mat_dly; /* SPR_RCM_Match_Delay 0x426 */
1372 unsigned short rcm_cond_mask_l; /* SPR_RCM_Condition_Mask_Low 0x428 */
1373 unsigned short rcm_cond_mask_h; /* SPR_RCM_Condition_Mask_High 0x42A */
1374 unsigned short rcm_cond_dly; /* SPR_RCM_Condition_Delay 0x42C */
1375 unsigned short PAD; /* SPR_RXE_0x2e 0x42E */
1376 unsigned short ext_ihr_addr; /* SPR_Ext_IHR_Address 0x430 */
1377 unsigned short ext_ihr_data; /* SPR_Ext_IHR_Data 0x432 */
1378 unsigned short rxe_phyrs_2; /* SPR_RXE_PHYRXSTAT2 0x434 */
1379 unsigned short rxe_phyrs_3; /* SPR_RXE_PHYRXSTAT3 0x436 */
1380 unsigned short phy_mode; /* SPR_PHY_Mode 0x438 */
1381 unsigned short rcmta_ctl; /* SPR_RCM_TA_Control 0x43a */
1382 unsigned short rcmta_size; /* SPR_RCM_TA_Size 0x43c */
1383 unsigned short rcmta_addr0; /* SPR_RCM_TA_Address_0 0x43e */
1384 unsigned short rcmta_addr1; /* SPR_RCM_TA_Address_1 0x440 */
1385 unsigned short rcmta_addr2; /* SPR_RCM_TA_Address_2 0x442 */
1386 unsigned short PAD[30]; /* SPR_RXE_0x44 ... 0x7e 0x444 */
1387  
1388  
1389 /* PSM Block *//* 0x480 - 0x500 */
1390  
1391 unsigned short PAD; /* SPR_MAC_MAX_NAP 0x480 */
1392 unsigned short psm_maccontrol_h; /* SPR_MAC_CTLHI 0x482 */
1393 unsigned short psm_macintstatus_l; /* SPR_MAC_IRQLO 0x484 */
1394 unsigned short psm_macintstatus_h; /* SPR_MAC_IRQHI 0x486 */
1395 unsigned short psm_macintmask_l; /* SPR_MAC_IRQMASKLO 0x488 */
1396 unsigned short psm_macintmask_h; /* SPR_MAC_IRQMASKHI 0x48A */
1397 unsigned short psm_0x0c; /* SPR_PSM_0x0c 0x48C */
1398 unsigned short psm_maccommand; /* SPR_MAC_CMD 0x48E */
1399 unsigned short psm_brc; /* SPR_BRC 0x490 */
1400 unsigned short psm_phy_hdr_param; /* SPR_PHY_HDR_Parameter 0x492 */
1401 unsigned short psm_postcard; /* SPR_Postcard 0x494 */
1402 unsigned short psm_pcard_loc_l; /* SPR_Postcard_Location_Low 0x496 */
1403 unsigned short psm_pcard_loc_h; /* SPR_Postcard_Location_High 0x498 */
1404 unsigned short psm_gpio_in; /* SPR_GPIO_IN 0x49A */
1405 unsigned short psm_gpio_out; /* SPR_GPIO_OUT 0x49C */
1406 unsigned short psm_gpio_oe; /* SPR_GPIO_OUTEN 0x49E */
1407  
1408 unsigned short psm_bred_0; /* SPR_BRED0 0x4A0 */
1409 unsigned short psm_bred_1; /* SPR_BRED1 0x4A2 */
1410 unsigned short psm_bred_2; /* SPR_BRED2 0x4A4 */
1411 unsigned short psm_bred_3; /* SPR_BRED3 0x4A6 */
1412 unsigned short psm_brcl_0; /* SPR_BRCL0 0x4A8 */
1413 unsigned short psm_brcl_1; /* SPR_BRCL1 0x4AA */
1414 unsigned short psm_brcl_2; /* SPR_BRCL2 0x4AC */
1415 unsigned short psm_brcl_3; /* SPR_BRCL3 0x4AE */
1416 unsigned short psm_brpo_0; /* SPR_BRPO0 0x4B0 */
1417 unsigned short psm_brpo_1; /* SPR_BRPO1 0x4B2 */
1418 unsigned short psm_brpo_2; /* SPR_BRPO2 0x4B4 */
1419 unsigned short psm_brpo_3; /* SPR_BRPO3 0x4B6 */
1420 unsigned short psm_brwk_0; /* SPR_BRWK0 0x4B8 */
1421 unsigned short psm_brwk_1; /* SPR_BRWK1 0x4BA */
1422 unsigned short psm_brwk_2; /* SPR_BRWK2 0x4BC */
1423 unsigned short psm_brwk_3; /* SPR_BRWK3 0x4BE */
1424  
1425 unsigned short psm_base_0; /* SPR_BASE0 - Offset Register 0 0x4C0 */
1426 unsigned short psm_base_1; /* SPR_BASE1 - Offset Register 1 0x4C2 */
1427 unsigned short psm_base_2; /* SPR_BASE2 - Offset Register 2 0x4C4 */
1428 unsigned short psm_base_3; /* SPR_BASE3 - Offset Register 3 0x4C6 */
1429 unsigned short psm_base_4; /* SPR_BASE4 - Offset Register 4 0x4C8 */
1430 unsigned short psm_base_5; /* SPR_BASE5 - Offset Register 5 0x4CA */
1431 unsigned short psm_base_6; /* SPR_BASE6 - Do not use (broken) 0x4CC */
1432 unsigned short psm_ihr_err; /* SPR_PSM_0x4e 0x4CE */
1433 unsigned short psm_pc_reg_0; /* SPR_PC0 - Link Register 0 0x4D0 */
1434 unsigned short psm_pc_reg_1; /* SPR_PC1 - Link Register 1 0x4D2 */
1435 unsigned short psm_pc_reg_2; /* SPR_PC2 - Link Register 2 0x4D4 */
1436 unsigned short psm_pc_reg_3; /* SPR_PC2 - Link Register 6 0x4D6 */
1437 unsigned short psm_brc_1; /* SPR_PSM_COND - PSM external condition bits 0x4D8 */
1438 unsigned short PAD; /* SPR_PSM_0x5a ... 0x7e 0x4DA */
1439 unsigned short PAD; /* SPR_PSM_0x5c 0x4DC */
1440 unsigned short PAD; /* SPR_PSM_0x5e 0x4DE */
1441 unsigned short PAD; /* SPR_PSM_0x60 0x4E0 */
1442 unsigned short PAD; /* SPR_PSM_0x62 0x4E2 */
1443 unsigned short PAD; /* SPR_PSM_0x64 0x4E4 */
1444 unsigned short PAD; /* SPR_PSM_0x66 0x4E6 */
1445 unsigned short PAD; /* SPR_PSM_0x68 0x4E8 */
1446 unsigned short PAD; /* SPR_PSM_0x6a 0x4EA */
1447 unsigned short PAD; /* SPR_PSM_0x6c 0x4EC */
1448 unsigned short PAD; /* SPR_PSM_0x6e 0x4EE */
1449 unsigned short psm_corectlsts; /* SPR_PSM_0x70 0x4F0 *//* Corerev >= 13 */
1450 unsigned short PAD; /* SPR_PSM_0x72 0x4F2 */
1451 unsigned short PAD; /* SPR_PSM_0x74 0x4F4 */
1452 unsigned short PAD; /* SPR_PSM_0x76 0x4F6 */
1453 unsigned short PAD; /* SPR_PSM_0x78 0x4F8 */
1454 unsigned short PAD; /* SPR_PSM_0x7a 0x4FA */
1455 unsigned short PAD; /* SPR_PSM_0x7c 0x4FC */
1456 unsigned short PAD; /* SPR_PSM_0x7e 0x4FE */
1457  
1458 /* TXE0 Block *//* 0x500 - 0x580 */
1459 unsigned short txe_ctl; /* SPR_TXE0_CTL 0x500 */
1460 unsigned short txe_aux; /* SPR_TXE0_AUX 0x502 */
1461 unsigned short txe_ts_loc; /* SPR_TXE0_TS_LOC 0x504 */
1462 unsigned short txe_time_out; /* SPR_TXE0_TIMEOUT 0x506 */
1463 unsigned short txe_wm_0; /* SPR_TXE0_WM0 0x508 */
1464 unsigned short txe_wm_1; /* SPR_TXE0_WM1 0x50A */
1465 unsigned short txe_phyctl; /* SPR_TXE0_PHY_CTL 0x50C */
1466 unsigned short txe_status; /* SPR_TXE0_STATUS 0x50E */
1467 unsigned short txe_mmplcp0; /* SPR_TXE0_0x10 0x510 */
1468 unsigned short txe_mmplcp1; /* SPR_TXE0_0x12 0x512 */
1469 unsigned short txe_phyctl1; /* SPR_TXE0_0x14 0x514 */
1470  
1471 unsigned short PAD; /* SPR_TXE0_0x16 0x516 */
1472 unsigned short PAD; /* SPR_TX_STATUS0 0x518 */
1473 unsigned short PAD; /* SPR_TX_STATUS1 0x51a */
1474 unsigned short PAD; /* SPR_TX_STATUS2 0x51c */
1475 unsigned short PAD; /* SPR_TX_STATUS3 0x51e */
1476  
1477 /* Transmit control */
1478 unsigned short xmtfifodef; /* SPR_TXE0_FIFO_Def 0x520 */
1479 unsigned short xmtfifo_frame_cnt; /* SPR_TXE0_0x22 0x522 *//* Corerev >= 16 */
1480 unsigned short xmtfifo_byte_cnt; /* SPR_TXE0_0x24 0x524 *//* Corerev >= 16 */
1481 unsigned short xmtfifo_head; /* SPR_TXE0_0x26 0x526 *//* Corerev >= 16 */
1482 unsigned short xmtfifo_rd_ptr; /* SPR_TXE0_0x28 0x528 *//* Corerev >= 16 */
1483 unsigned short xmtfifo_wr_ptr; /* SPR_TXE0_0x2a 0x52A *//* Corerev >= 16 */
1484 unsigned short xmtfifodef1; /* SPR_TXE0_0x2c 0x52C *//* Corerev >= 16 */
1485  
1486 unsigned short PAD; /* SPR_TXE0_0x2e 0x52E */
1487 unsigned short PAD; /* SPR_TXE0_0x30 0x530 */
1488 unsigned short PAD; /* SPR_TXE0_0x32 0x532 */
1489 unsigned short PAD; /* SPR_TXE0_0x34 0x534 */
1490 unsigned short PAD; /* SPR_TXE0_0x36 0x536 */
1491 unsigned short PAD; /* SPR_TXE0_0x38 0x538 */
1492 unsigned short PAD; /* SPR_TXE0_0x3a 0x53A */
1493 unsigned short PAD; /* SPR_TXE0_0x3c 0x53C */
1494 unsigned short PAD; /* SPR_TXE0_0x3e 0x53E */
1495  
1496 unsigned short xmtfifocmd; /* SPR_TXE0_FIFO_CMD 0x540 */
1497 unsigned short xmtfifoflush; /* SPR_TXE0_FIFO_FLUSH 0x542 */
1498 unsigned short xmtfifothresh; /* SPR_TXE0_FIFO_THRES 0x544 */
1499 unsigned short xmtfifordy; /* SPR_TXE0_FIFO_RDY 0x546 */
1500 unsigned short xmtfifoprirdy; /* SPR_TXE0_FIFO_PRI_RDY 0x548 */
1501 unsigned short xmtfiforqpri; /* SPR_TXE0_FIFO_RQ_PRI 0x54A */
1502 unsigned short xmttplatetxptr; /* SPR_TXE0_Template_TX_Pointer 0x54C */
1503 unsigned short PAD; /* SPR_TXE0_0x4e 0x54E */
1504 unsigned short xmttplateptr; /* SPR_TXE0_Template_Pointer 0x550 */
1505 unsigned short smpl_clct_strptr; /* SPR_TXE0_0x52 0x552 *//* Corerev >= 22 */
1506 unsigned short smpl_clct_stpptr; /* SPR_TXE0_0x54 0x554 *//* Corerev >= 22 */
1507 unsigned short smpl_clct_curptr; /* SPR_TXE0_0x56 0x556 *//* Corerev >= 22 */
1508 unsigned short PAD; /* SPR_TXE0_0x58 0x558 */
1509 unsigned short PAD; /* SPR_TXE0_0x5a 0x55A */
1510 unsigned short PAD; /* SPR_TXE0_0x5c 0x55C */
1511 unsigned short PAD; /* SPR_TXE0_0x5e 0x55E */
1512 unsigned short xmttplatedatalo; /* SPR_TXE0_Template_Data_Low 0x560 */
1513 unsigned short xmttplatedatahi; /* SPR_TXE0_Template_Data_High 0x562 */
1514  
1515 unsigned short PAD; /* SPR_TXE0_0x64 0x564 */
1516 unsigned short PAD; /* SPR_TXE0_0x66 0x566 */
1517  
1518 unsigned short xmtsel; /* SPR_TXE0_SELECT 0x568 */
1519 unsigned short xmttxcnt; /* 0x56A */
1520 unsigned short xmttxshmaddr; /* 0x56C */
1521  
1522 unsigned short PAD[0x09]; /* 0x56E - 0x57E */
1523  
1524 /* TXE1 Block */
1525 unsigned short PAD[0x40]; /* 0x580 - 0x5FE */
1526  
1527 /* TSF Block */
1528 unsigned short PAD[0X02]; /* 0x600 - 0x602 */
1529 unsigned short tsf_cfpstrt_l; /* 0x604 */
1530 unsigned short tsf_cfpstrt_h; /* 0x606 */
1531 unsigned short PAD[0X05]; /* 0x608 - 0x610 */
1532 unsigned short tsf_cfppretbtt; /* 0x612 */
1533 unsigned short PAD[0XD]; /* 0x614 - 0x62C */
1534 unsigned short tsf_clk_frac_l; /* 0x62E */
1535 unsigned short tsf_clk_frac_h; /* 0x630 */
1536 unsigned short PAD[0X14]; /* 0x632 - 0x658 */
1537 unsigned short tsf_random; /* 0x65A */
1538 unsigned short PAD[0x05]; /* 0x65C - 0x664 */
1539 /* GPTimer 2 registers */
1540 unsigned short tsf_gpt2_stat; /* 0x666 */
1541 unsigned short tsf_gpt2_ctr_l; /* 0x668 */
1542 unsigned short tsf_gpt2_ctr_h; /* 0x66A */
1543 unsigned short tsf_gpt2_val_l; /* 0x66C */
1544 unsigned short tsf_gpt2_val_h; /* 0x66E */
1545 unsigned short tsf_gptall_stat; /* 0x670 */
1546 unsigned short PAD[0x07]; /* 0x672 - 0x67E */
1547  
1548 /* IFS Block */
1549 unsigned short ifs_sifs_rx_tx_tx; /* 0x680 */
1550 unsigned short ifs_sifs_nav_tx; /* 0x682 */
1551 unsigned short ifs_slot; /* 0x684 */
1552 unsigned short PAD; /* 0x686 */
1553 unsigned short ifs_ctl; /* 0x688 */
1554 unsigned short PAD[0x3]; /* 0x68a - 0x68F */
1555 unsigned short ifsstat; /* 0x690 */
1556 unsigned short ifsmedbusyctl; /* 0x692 */
1557 unsigned short iftxdur; /* 0x694 */
1558 unsigned short PAD[0x3]; /* 0x696 - 0x69b */
1559 /* EDCF support in dot11macs */
1560 unsigned short ifs_aifsn; /* 0x69c */
1561 unsigned short ifs_ctl1; /* 0x69e */
1562  
1563 /* slow clock registers */
1564 unsigned short scc_ctl; /* 0x6a0 */
1565 unsigned short scc_timer_l; /* 0x6a2 */
1566 unsigned short scc_timer_h; /* 0x6a4 */
1567 unsigned short scc_frac; /* 0x6a6 */
1568 unsigned short scc_fastpwrup_dly; /* 0x6a8 */
1569 unsigned short scc_per; /* 0x6aa */
1570 unsigned short scc_per_frac; /* 0x6ac */
1571 unsigned short scc_cal_timer_l; /* 0x6ae */
1572 unsigned short scc_cal_timer_h; /* 0x6b0 */
1573 unsigned short PAD; /* 0x6b2 */
1574  
1575 unsigned short PAD[0x26];
1576  
1577 /* NAV Block */
1578 unsigned short nav_ctl; /* 0x700 */
1579 unsigned short navstat; /* 0x702 */
1580 unsigned short PAD[0x3e]; /* 0x702 - 0x77E */
1581  
1582 /* WEP/PMQ Block *//* 0x780 - 0x7FE */
1583 unsigned short PAD[0x20]; /* 0x780 - 0x7BE */
1584  
1585 unsigned short wepctl; /* 0x7C0 */
1586 unsigned short wepivloc; /* 0x7C2 */
1587 unsigned short wepivkey; /* 0x7C4 */
1588 unsigned short wepwkey; /* 0x7C6 */
1589  
1590 unsigned short PAD[4]; /* 0x7C8 - 0x7CE */
1591 unsigned short pcmctl; /* 0X7D0 */
1592 unsigned short pcmstat; /* 0X7D2 */
1593 unsigned short PAD[6]; /* 0x7D4 - 0x7DE */
1594  
1595 unsigned short pmqctl; /* 0x7E0 */
1596 unsigned short pmqstatus; /* 0x7E2 */
1597 unsigned short pmqpat0; /* 0x7E4 */
1598 unsigned short pmqpat1; /* 0x7E6 */
1599 unsigned short pmqpat2; /* 0x7E8 */
1600  
1601 unsigned short pmqdat; /* 0x7EA */
1602 unsigned short pmqdator; /* 0x7EC */
1603 unsigned short pmqhst; /* 0x7EE */
1604 unsigned short pmqpath0; /* 0x7F0 */
1605 unsigned short pmqpath1; /* 0x7F2 */
1606 unsigned short pmqpath2; /* 0x7F4 */
1607 unsigned short pmqdath; /* 0x7F6 */
1608  
1609 unsigned short PAD[0x04]; /* 0x7F8 - 0x7FE */
1610  
1611 /* SHM *//* 0x800 - 0xEFE */
1612 unsigned short PAD[0x380]; /* 0x800 - 0xEFE */
1613 } __attribute__((packed));
1614  
1615 typedef void (*to_fun_t)(void *arg);
1616  
1617 typedef struct _ctimeout {
1618 struct _ctimeout *next;
1619 uint32 ms;
1620 to_fun_t fun;
1621 void *arg;
1622 bool expired;
1623 } ctimeout_t;
1624  
1625 struct hndrte_timer
1626 {
1627 uint32 *context; /* first field so address of context is timer struct ptr */
1628 void *data;
1629 void (*mainfn)(struct hndrte_timer *);
1630 void (*auxfn)(void *context);
1631 ctimeout_t t;
1632 int interval;
1633 int set;
1634 int periodic;
1635 bool _freedone;
1636 } __attribute__((packed));
1637  
1638 /*== maccontrol register ==*/
1639 #define MCTL_GMODE (1U << 31)
1640 #define MCTL_DISCARD_PMQ (1 << 30)
1641 #define MCTL_WAKE (1 << 26)
1642 #define MCTL_HPS (1 << 25)
1643 #define MCTL_PROMISC (1 << 24)
1644 #define MCTL_KEEPBADFCS (1 << 23)
1645 #define MCTL_KEEPCONTROL (1 << 22)
1646 #define MCTL_PHYLOCK (1 << 21)
1647 #define MCTL_BCNS_PROMISC (1 << 20)
1648 #define MCTL_LOCK_RADIO (1 << 19)
1649 #define MCTL_AP (1 << 18)
1650 #define MCTL_INFRA (1 << 17)
1651 #define MCTL_BIGEND (1 << 16)
1652 #define MCTL_GPOUT_SEL_MASK (3 << 14)
1653 #define MCTL_GPOUT_SEL_SHIFT 14
1654 #define MCTL_EN_PSMDBG (1 << 13)
1655 #define MCTL_IHR_EN (1 << 10)
1656 #define MCTL_SHM_UPPER (1 << 9)
1657 #define MCTL_SHM_EN (1 << 8)
1658 #define MCTL_PSM_JMP_0 (1 << 2)
1659 #define MCTL_PSM_RUN (1 << 1)
1660 #define MCTL_EN_MAC (1 << 0)
1661  
1662 struct ethernet_header {
1663 uint8 dst[6];
1664 uint8 src[6];
1665 uint16 type;
1666 } __attribute__((packed));
1667  
1668 struct ipv6_header {
1669 uint32 version_traffic_class_flow_label;
1670 uint16 payload_length;
1671 uint8 next_header;
1672 uint8 hop_limit;
1673 uint8 src_ip[16];
1674 uint8 dst_ip[16];
1675 } __attribute__((packed));
1676  
1677 struct ip_header {
1678 uint8 version_ihl;
1679 uint8 dscp_ecn;
1680 uint16 total_length;
1681 uint16 identification;
1682 uint16 flags_fragment_offset;
1683 uint8 ttl;
1684 uint8 protocol;
1685 uint16 header_checksum;
1686 union {
1687 uint32 integer;
1688 uint8 array[4];
1689 } src_ip;
1690 union {
1691 uint32 integer;
1692 uint8 array[4];
1693 } dst_ip;
1694 } __attribute__((packed));
1695  
1696 struct udp_header {
1697 uint16 src_port;
1698 uint16 dst_port;
1699 union {
1700 uint16 length; /* UDP: length of UDP header and payload */
1701 uint16 checksum_coverage; /* UDPLITE: checksum_coverage */
1702 } len_chk_cov;
1703 uint16 checksum;
1704 } __attribute__((packed));
1705  
1706 struct ethernet_ip_udp_header {
1707 struct ethernet_header ethernet;
1708 struct ip_header ip;
1709 struct udp_header udp;
1710 } __attribute__((packed));
1711  
1712 struct ethernet_ipv6_udp_header {
1713 struct ethernet_header ethernet;
1714 struct ipv6_header ipv6;
1715 struct udp_header udp;
1716 uint8 payload[1];
1717 } __attribute__((packed));
1718  
1719 struct nexmon_header {
1720 uint32 hooked_fct;
1721 uint32 args[3];
1722 uint8 payload[1];
1723 } __attribute__((packed));
1724