nexmon – Blame information for rev 1

Subversion Repositories:
Rev:
Rev Author Line No. Line
1 office 1 #ifndef STRUCTS_COMMON_H
2 #define STRUCTS_COMMON_H
3  
4 /*************
5 *
6 * IMPORTANT: this file was just copied from the bcm-pubic repo!
7 *
8 *************/
9  
10 #include <types.h>
11  
12 #ifndef PAD
13 #define _PADLINE(line) pad ## line
14 #define _XSTR(line) _PADLINE(line)
15 #define PAD _XSTR(__LINE__)
16 #endif
17  
18 struct phytbl_info {
19 const void *tbl_ptr;
20 uint32 tbl_len;
21 uint32 tbl_id;
22 uint32 tbl_offset;
23 uint32 tbl_width;
24 };
25  
26 struct wl_rxsts {
27 uint8 PAD[8];
28 uint16 chanspec;
29 uint16 datarate;
30 uint8 PAD1[12];
31 uint16 unkn1; /* ??? */
32 uint16 unkn2; /* increases over time */
33 uint8 PAD2[4];
34 uint8 rssi;
35 } __attribute__((packed));
36  
37 struct wlc_txh_info {
38 uint8 PAD[80];
39 } __attribute__((packed));
40  
41 struct osl_info {
42 unsigned int pktalloced;
43 int PAD[1];
44 void *callback_when_dropped;
45 unsigned int bustype;
46 } __attribute__((packed));
47  
48 /* CHECKED */
49 typedef struct sk_buff {
50 struct sk_buff *unkn; /* 0x00 */
51 struct sk_buff *head; /* 0x04 */
52 void *data; /* 0x08 */
53 short len; /* 0x0c */
54 short PAD; /* 0x0e */
55 int PAD; /* 0x10 */
56 short PAD; /* 0x14 */
57 struct sk_buff *prev; /* 0x16 */
58 short PAD; /* 0x1a */
59 int PAD; /* 0x1c */
60 int PAD; /* 0x20 */
61 int PAD; /* 0x24 */
62 void *scb; /* 0x28 */
63 } __attribute__((packed)) sk_buff;
64  
65 struct tunables {
66 char gap[62];
67 short somebnd; // @ 0x38
68 short rxbnd; // @ 0x40
69 };
70  
71 typedef void (*initfn_t)(void *);
72 typedef void (*chansetfn_t)(void *, unsigned hosrt);
73 typedef int (*longtrnfn_t)(void *, int);
74 typedef void (*txiqccgetfn_t)(void *, uint16 *, uint16 *);
75 typedef void (*txiqccmimogetfn_t)(void *, uint16 *, uint16 *, uint16 *, uint16 *);
76 typedef void (*txiqccsetfn_t)(void *, uint16, uint16);
77 typedef void (*txiqccmimosetfn_t)(void *, uint16, uint16, uint16, uint16);
78 typedef uint16 (*txloccgetfn_t)(void *);
79 typedef void (*txloccsetfn_t)(void *pi, uint16 didq);
80 typedef void (*txloccmimosetfn_t)(void *pi, uint16 diq0, uint16 diq1);
81 typedef void (*txloccmimogetfn_t)(void *, uint16 *, uint16 *);
82 typedef void (*radioloftgetfn_t)(void *, uint8 *, uint8 *, uint8 *, uint8 *);
83 typedef void (*radioloftsetfn_t)(void *, uint8, uint8, uint8, uint8);
84 typedef void (*radioloftmimogetfn_t)(void *, uint8 *, uint8 *, uint8 *, uint8 *, uint8 *, uint8 *, uint8 *, uint8 *);
85 typedef void (*radioloftmimosetfn_t)(void *, uint8, uint8, uint8, uint8, uint8, uint8, uint8, uint8);
86 typedef int32 (*rxsigpwrfn_t)(void *, int32);
87 typedef void (*detachfn_t)(void *);
88 typedef int (*txcorepwroffsetfn_t)(void *, void *);
89 typedef void (*settxpwrctrlfn_t)(void *, uint16);
90 typedef uint16 (*gettxpwrctrlfn_t)(void *);
91 typedef void (*settxpwrbyindexfn_t)(void *, int);
92 typedef bool (*ishwtxpwrctrlfn_t)(void *);
93 typedef void (*phywatchdogfn_t)(void *);
94 typedef void (*btcadjustfn_t)(void *, bool);
95 typedef uint16 (*tssicalsweepfn_t)(void *, int8 *, uint8 *);
96 typedef void (*switchradiofn_t)(void *, bool);
97 typedef void (*anacorefn_t)(void *, bool);
98 typedef void (*phywritetablefn_t)(void *pi, const void *pti);
99 typedef void (*phyreadtablefn_t)(void *pi, void *pti);
100 typedef void (*calibmodesfn_t)(void *pi, uint mode);
101 typedef void (*lowpowerbeaconmodefn_t)(void *pi, int lowpower_beacon_mode);
102 typedef bool (*fcbsinitfn_t)(void *pi, int chanidx, unsigned short chanspec);
103 typedef bool (*fcbsinitprefn_t)(void *pi, int chanidx);
104 typedef bool (*fcbsinitpostfn_t)(void *pi, int chanidx);
105 typedef bool (*fcbsfn_t)(void *pi, int chanidx);
106 typedef bool (*fcbsprefn_t)(void *pi, int chanidx);
107 typedef bool (*fcbspostfn_t)(void *pi, int chanidx);
108 typedef void (*fcbsreadtblfn_t) (void *pi, uint32 id, uint32 len, uint32 offset, uint32 width, void *data);
109 typedef uint8 (*lpcgetminidx_t)(void);
110 typedef void (*lpcsetmode_t)(void *pi, bool enable);
111 typedef uint8 (*lpcgetpwros_t)(uint8 index);
112 typedef uint8 (*lpcgettxcpwrval_t)(uint16 phytxctrlword);
113 typedef void (*lpcsettxcpwrval_t)(uint16 *phytxctrlword, uint8 txcpwrval);
114 typedef uint8 (*lpccalcpwroffset_t) (uint8 total_offset, uint8 rate_offset);
115 typedef uint8 (*lpcgetpwridx_t) (uint8 pwr_offset);
116 typedef uint8 * (*lpcgetpwrlevelptr_t) (void);
117  
118 struct phy_func_ptr {
119 initfn_t init;
120 initfn_t calinit;
121 chansetfn_t chanset;
122 initfn_t txpwrrecalc;
123 longtrnfn_t longtrn;
124 txiqccgetfn_t txiqccget;
125 txiqccmimogetfn_t txiqccmimoget;
126 txiqccsetfn_t txiqccset;
127 txiqccmimosetfn_t txiqccmimoset;
128 txloccgetfn_t txloccget;
129 txloccsetfn_t txloccset;
130 txloccmimogetfn_t txloccmimoget;
131 txloccmimosetfn_t txloccmimoset;
132 radioloftgetfn_t radioloftget;
133 radioloftsetfn_t radioloftset;
134 radioloftmimogetfn_t radioloftmimoget;
135 radioloftmimosetfn_t radioloftmimoset;
136 initfn_t carrsuppr;
137 rxsigpwrfn_t rxsigpwr;
138 detachfn_t detach;
139 txcorepwroffsetfn_t txcorepwroffsetget;
140 txcorepwroffsetfn_t txcorepwroffsetset;
141 settxpwrctrlfn_t settxpwrctrl;
142 gettxpwrctrlfn_t gettxpwrctrl;
143 ishwtxpwrctrlfn_t ishwtxpwrctrl;
144 settxpwrbyindexfn_t settxpwrbyindex;
145 btcadjustfn_t phybtcadjust;
146 phywatchdogfn_t phywatchdog;
147 tssicalsweepfn_t tssicalsweep;
148 switchradiofn_t switchradio;
149 anacorefn_t anacore;
150 phywritetablefn_t phywritetable;
151 phyreadtablefn_t phyreadtable;
152 calibmodesfn_t calibmodes;
153 lpcgetminidx_t lpcgetminidx;
154 lpcgetpwros_t lpcgetpwros;
155 lpcgettxcpwrval_t lpcgettxcpwrval;
156 lpcsettxcpwrval_t lpcsettxcpwrval;
157 lpcsetmode_t lpcsetmode;
158 };
159 typedef struct phy_func_ptr phy_func_ptr_t;
160  
161 struct phy_info_lcn20phy {
162 int PAD; // 0x000
163 int PAD; // 0x004
164 int PAD; // 0x008
165 int PAD; // 0x00c
166 int PAD; // 0x010
167 int PAD; // 0x014
168 int PAD; // 0x018
169 int PAD; // 0x01c
170 int PAD; // 0x020
171 int PAD; // 0x024
172 int PAD; // 0x028
173 int PAD; // 0x02c
174 int PAD; // 0x030
175 int PAD; // 0x034
176 };
177  
178 struct wlc_phy_shim_info {
179 struct wlc_hw_info *wlc_hw; /* pointer to main wlc_hw structure */
180 struct wlc_info *wlc; /* pointer to main wlc structure */
181 struct wl_info *wl; /* pointer to os-specific private state */
182 };
183  
184 struct shared_phy {
185 void *phy_head; // 0x000 /* head of phy list */
186 uint unit; // 0x004 /* device instance number */
187 struct osl_info *osh; // 0x008 /* pointer to os handle */
188 void *sih; // 0x00c /* si handle (cookie for siutils calls) */
189 void *physhim; // 0x010 /* phy <-> wl shim layer for wlapi */
190 uint corerev; // 0x014 /* d11corerev, shadow of wlc_hw->corerev */
191 uint32 machwcap; // 0x018 /* mac hw capability */
192 bool up; // 0x01c /* main driver is up and running */
193 bool clk; // 0x01d /* main driver make the clk available */
194 short PAD; // 0x01e
195 int PAD; // 0x020
196 int PAD; // 0x024
197 int PAD; // 0x028
198 int PAD; // 0x02c
199 int PAD; // 0x030
200 int PAD; // 0x034
201 };
202  
203 struct phy_info {
204 int PAD; // 0x000
205 int PAD; // 0x004
206 int PAD; // 0x008
207 int PAD; // 0x00c
208 int PAD; // 0x010
209 int PAD; // 0x014
210 int PAD; // 0x018
211 int PAD; // 0x01c
212 int PAD; // 0x020
213 int PAD; // 0x024
214 int PAD; // 0x028
215 int PAD; // 0x02c
216 int PAD; // 0x030
217 int PAD; // 0x034
218 struct shared_phy *sh; // 0x038
219 struct phy_func_ptr pi_fptr; // 0x03c - 0xd4
220 int PAD; // 0x0d8
221 int PAD; // 0x0dc
222 int PAD; // 0x0e0
223 struct phy_info_lcn20phy *pi_lcn20phy; // 0x0e4 // verified for bcm43430
224 volatile struct d11regs *regs; // 0x0e8
225 int PAD; // 0x0ec
226 int PAD; // 0x0f0
227 short PAD; // 0x0f4
228 short radio_chanspec; // 0x0f6
229 int PAD; // 0x0f8
230 int PAD; // 0x0fc
231 int PAD; // 0x100
232 int PAD; // 0x104
233 };
234  
235 struct wlc_hwband {
236 int bandtype; /* 0x00 */
237 int bandunit; /* 0x04 */
238 char mhfs; /* 0x05 */
239 char PAD[10]; /* 0x06 */
240 char bandhw_stf_ss_mode; /* 0x13 */
241 short CWmin; /* 0x14 */
242 short CWmax; /* 0x16 */
243 int core_flags; /* 0x18 */
244 short phytype; /* 0x1C */
245 short phyrev; /* 0x1E */
246 short radioid; /* 0x20 */
247 short radiorev; /* 0x22 */
248 struct phy_info *pi; /* 0x24 */
249 char abgphy_encore; /* 0x25 */
250 };
251  
252 struct wlc_hw_info {
253 struct wlc_info *wlc; /* 0x00 */
254 int PAD[4]; /* 0x04 */
255 struct dma_info *di[6]; /* 0x14 - only 4 bytes */
256 int PAD[17];
257 char PAD[2];
258 char ucode_loaded;
259 char PAD;
260 int PAD;
261 int sih; /* 0x78 */
262 int vars; /* 0x7C */
263 int vars_size; /* 0x80 */
264 int PAD; /* 0x84 */
265 struct d11regs* regs; /* 0x88 CHECKED */
266 // int physhim; /* 0x88 */
267 int phy_sh; /* 0x8C */
268 int PAD; /* 0x90 */
269 struct wlc_hwband *band; /* 0x94 CHECKED */
270 int PAD[5]; /* 0x98 */
271 char up; /* 0x98 */
272 char PAD; /* 0x9a */
273 int PAD[19]; /* 0x9c */
274 int maccontrol;
275 int PAD[18];
276 sk_buff *some_skbuff_ptr; // @ 0x134
277  
278 };
279  
280 #define HNDRTE_DEV_NAME_MAX 16
281  
282 typedef struct hndrte_dev {
283 char name[HNDRTE_DEV_NAME_MAX];
284 struct hndrte_devfuncs *funcs;
285 uint32 devid;
286 void *softc; /* Software context */
287 uint32 flags; /* RTEDEVFLAG_XXXX */
288 struct hndrte_dev *next;
289 struct hndrte_dev *chained;
290 void *pdev;
291 } hndrte_dev;
292  
293 struct hndrte_devfuncs {
294 void *(*probe)(struct hndrte_dev *dev, void *regs, uint bus,
295 uint16 device, uint coreid, uint unit);
296 int (*open)(struct hndrte_dev *dev);
297 int (*close)(struct hndrte_dev *dev);
298 int (*xmit)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
299 int (*recv)(struct hndrte_dev *src, struct hndrte_dev *dev, void *pkt);
300 int (*ioctl)(struct hndrte_dev *dev, uint32 cmd, void *buffer, int len,
301 int *used, int *needed, int set);
302 void (*txflowcontrol) (struct hndrte_dev *dev, bool state, int prio);
303 void (*poll)(struct hndrte_dev *dev);
304 int (*xmit_ctl)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb);
305 int (*xmit2)(struct hndrte_dev *src, struct hndrte_dev *dev, void *lb, int8 ch);
306 };
307  
308 /**
309 * Name might be inaccurate
310 */
311 /*
312 struct device {
313 char name[16]; // 0x000
314 void *init_function; // 0x010
315 int PAD; // 0x014
316 void *some_device_info; // 0x018
317 int PAD; // 0x01c
318 int PAD; // 0x020
319 struct device *chained; // 0x024
320 };
321 */
322  
323 /**
324 * Name might be inaccurate
325 */
326 struct wl_info {
327 int unit;
328 void *pub;
329 struct wlc_info *wlc;
330 struct wlc_hw_info *wlc_hw;
331 struct hndrte_dev *dev;
332 };
333  
334 /**
335 * Name might be inaccurate
336 */
337 struct sdiox_info {
338 int unit;
339 void *something;
340 void *sdio; // sdio_info struct
341 void *osh;
342 void *device_address;
343 } __attribute__((packed));
344  
345 struct wlcband {
346 int bandtype; /* 0x000 */
347 int bandunit; /* 0x004 */
348 short phytype; /* 0x008 */
349 short phyrev; /* 0x00A */
350 short radioid; /* 0x00C */
351 short radiorev; /* 0x00E */
352 void *pi; /* 0x010 */
353 char abgphy_encore; /* 0x014 */
354 char gmode; /* 0x015 */
355 char PAD;
356 char PAD;
357 struct scb *hwrs_scb; /* CHECKED */
358 int defrateset;
359 int rspec_override;
360 int mrspec_override;
361 char band_stf_ss_mode;
362 char band_stf_stbc_tx;
363 int hw_rateset;
364 char basic_rate;
365 } __attribute__((packed));
366  
367 /* per interface counters */
368 struct wlc_if_stats {
369 /* transmit stat counters */
370 uint32 txframe; /* tx data frames */
371 uint32 txbyte; /* tx data bytes */
372 uint32 txerror; /* tx data errors (derived: sum of others) */
373 uint32 txnobuf; /* tx out of buffer errors */
374 uint32 txrunt; /* tx runt frames */
375 uint32 txfail; /* tx failed frames */
376 uint32 rxframe; /* rx data frames */
377 uint32 rxbyte; /* rx data bytes */
378 uint32 rxerror; /* rx data errors (derived: sum of others) */
379 uint32 rxnobuf; /* rx out of buffer errors */
380 uint32 rxrunt; /* rx runt frames */
381 uint32 rxfragerr; /* rx fragment errors */
382 uint32 txretry; /* tx retry frames */
383 uint32 txretrie; /* tx multiple retry frames */
384 uint32 txfrmsnt; /* tx sent frames */
385 uint32 txmulti; /* tx mulitcast sent frames */
386 uint32 txfrag; /* tx fragments sent */
387 uint32 rxmulti; /* rx multicast frames */
388 };
389  
390 struct wl_if {
391 struct wlc_if *wlcif;
392 struct hndrte_dev *dev;
393 };
394  
395 struct wlc_if {
396 struct wlc_if *next;
397 uint8 type;
398 uint8 index;
399 uint8 flags;
400 struct wl_if *wlif;
401 void *qi;
402 union {
403 struct scb *scb;
404 struct wlc_bsscfg *bsscfg;
405 } u;
406 struct wlc_if_stats _cnt;
407 };
408  
409 struct wlc_info {
410 struct wlc_pub *pub; /* 0x000 */
411 struct osl_info *osh; /* 0x004 */
412 struct wl_info *wl; /* 0x008 */
413 volatile struct d11regs *regs; /* 0x00C */
414 struct wlc_hw_info *hw; /* 0x010 */
415 int PAD; /* 0x014 */
416 int PAD; /* 0x018 */
417 void *core; /* 0x01C */
418 struct wlcband *band; /* 0x020 */
419 int PAD; /* 0x024 */
420 struct wlcband *bandstate[2]; /* 0x028 */
421 int PAD; /* 0x030 */
422 int PAD; /* 0x034 */
423 int PAD; /* 0x038 */
424 int PAD; /* 0x03C */
425 int PAD; /* 0x040 */
426 int PAD; /* 0x044 */
427 int PAD; /* 0x048 */
428 int PAD; /* 0x04C */
429 int PAD; /* 0x050 */
430 int PAD; /* 0x054 */
431 int PAD; /* 0x058 */
432 int PAD; /* 0x05C */
433 int PAD; /* 0x060 */
434 int PAD; /* 0x064 */
435 int PAD; /* 0x068 */
436 int PAD; /* 0x06C */
437 int PAD; /* 0x070 */
438 int PAD; /* 0x074 */
439 int PAD; /* 0x078 */
440 int PAD; /* 0x07C */
441 int PAD; /* 0x080 */
442 int PAD; /* 0x084 */
443 int PAD; /* 0x088 */
444 int PAD; /* 0x08C */
445 int PAD; /* 0x090 */
446 int PAD; /* 0x094 */
447 int PAD; /* 0x098 */
448 int PAD; /* 0x09C */
449 int PAD; /* 0x0A0 */
450 int PAD; /* 0x0A4 */
451 int PAD; /* 0x0A8 */
452 int PAD; /* 0x0AC */
453 int PAD; /* 0x0B0 */
454 int PAD; /* 0x0B4 */
455 int PAD; /* 0x0B8 */
456 int PAD; /* 0x0BC */
457 int PAD; /* 0x0C0 */
458 int PAD; /* 0x0C4 */
459 int PAD; /* 0x0C8 */
460 int PAD; /* 0x0CC */
461 int PAD; /* 0x0D0 */
462 int PAD; /* 0x0D4 */
463 int PAD; /* 0x0D8 */
464 int PAD; /* 0x0DC */
465 int PAD; /* 0x0E0 */
466 int PAD; /* 0x0E4 */
467 int PAD; /* 0x0E8 */
468 int PAD; /* 0x0EC */
469 int PAD; /* 0x0F0 */
470 int PAD; /* 0x0F4 */
471 int PAD; /* 0x0F8 */
472 int PAD; /* 0x0FC */
473 int PAD; /* 0x100 */
474 int PAD; /* 0x104 */
475 int PAD; /* 0x108 */
476 int PAD; /* 0x10C */
477 int PAD; /* 0x110 */
478 int PAD; /* 0x114 */
479 int PAD; /* 0x118 */
480 int PAD; /* 0x11C */
481 int PAD; /* 0x120 */
482 int PAD; /* 0x124 */
483 int PAD; /* 0x128 */
484 int PAD; /* 0x12C */
485 int PAD; /* 0x130 */
486 int PAD; /* 0x134 */
487 int PAD; /* 0x138 */
488 int PAD; /* 0x13C */
489 int PAD; /* 0x140 */
490 int PAD; /* 0x144 */
491 int PAD; /* 0x148 */
492 int PAD; /* 0x14C */
493 int PAD; /* 0x150 */
494 int PAD; /* 0x154 */
495 int PAD; /* 0x158 */
496 void *cmi; /* 0x15C */
497 int PAD; /* 0x160 */
498 int PAD; /* 0x164 */
499 int PAD; /* 0x168 */
500 int PAD; /* 0x16C */
501 int PAD; /* 0x170 */
502 int PAD; /* 0x174 */
503 int PAD; /* 0x178 */
504 int PAD; /* 0x17C */
505 int PAD; /* 0x180 */
506 int PAD; /* 0x184 */
507 int PAD; /* 0x188 */
508 int PAD; /* 0x18C */
509 int PAD; /* 0x190 */
510 int PAD; /* 0x194 */
511 int PAD; /* 0x198 */
512 int PAD; /* 0x19C */
513 int PAD; /* 0x1A0 */
514 int PAD; /* 0x1A4 */
515 int PAD; /* 0x1A8 */
516 int PAD; /* 0x1AC */
517 int PAD; /* 0x1B0 */
518 int PAD; /* 0x1B4 */
519 int PAD; /* 0x1B8 */
520 int PAD; /* 0x1BC */
521 int PAD; /* 0x1C0 */
522 int PAD; /* 0x1C4 */
523 short PAD; /* 0x1C8 */
524 char bandlocked; /* 0x1CA */
525 char field_1CB; /* 0x1CB */
526 int PAD; /* 0x1CC */
527 int PAD; /* 0x1D0 */
528 int PAD; /* 0x1D4 */
529 int PAD; /* 0x1D8 */
530 int PAD; /* 0x1DC */
531 int PAD; /* 0x1E0 */
532 int PAD; /* 0x1E4 */
533 int PAD; /* 0x1E8 */
534 int PAD; /* 0x1EC */
535 int PAD; /* 0x1F0 */
536 int PAD; /* 0x1F4 */
537 int PAD; /* 0x1F8 */
538 int PAD; /* 0x1FC */
539 int PAD; /* 0x200 */
540 int PAD; /* 0x204 */
541 int monitor; /* 0x208 CHECKED */
542 int PAD; /* 0x20C */
543 int PAD; /* 0x210 */
544 int PAD; /* 0x214 */
545 int PAD; /* 0x218 */
546 int PAD; /* 0x21C */
547 int PAD; /* 0x220 */
548 int PAD; /* 0x224 */
549 short PAD; /* 0x228 */
550 short wme_dp; /* 0x22A */
551 int PAD; /* 0x22C */
552 int PAD; /* 0x230 */
553 int PAD; /* 0x234 */
554 int PAD; /* 0x238 */
555 int PAD; /* 0x23C */
556 int PAD; /* 0x240 */
557 int PAD; /* 0x244 */
558 int PAD; /* 0x248 */
559 unsigned short tx_prec_map; /* 0x24C */
560 short PAD; /* 0x24E */
561 int PAD; /* 0x250 */
562 int PAD; /* 0x254 */
563 int PAD; /* 0x258 */
564 int PAD; /* 0x25C */
565 int PAD; /* 0x260 */
566 int PAD; /* 0x264 */
567 int PAD; /* 0x268 */
568 int PAD; /* 0x26C */
569 int PAD; /* 0x270 */
570 int PAD; /* 0x274 */
571 int PAD; /* 0x278 */
572 void *eventq; /* 0x27C CHECKED */
573 int PAD; /* 0x280 */
574 int PAD; /* 0x284 */
575 int PAD; /* 0x288 */
576 int PAD; /* 0x28C */
577 int PAD; /* 0x290 */
578 int PAD; /* 0x294 */
579 int PAD; /* 0x298 */
580 int PAD; /* 0x29C */
581 int PAD; /* 0x2A0 */
582 int PAD; /* 0x2A4 */
583 int PAD; /* 0x2A8 */
584 int PAD; /* 0x2AC */
585 int PAD; /* 0x2B0 */
586 int PAD; /* 0x2B4 */
587 int PAD; /* 0x2B8 */
588 int PAD; /* 0x2BC */
589 int PAD; /* 0x2C0 */
590 int PAD; /* 0x2C4 */
591 int PAD; /* 0x2C8 */
592 int PAD; /* 0x2CC */
593 int PAD; /* 0x2D0 */
594 int PAD; /* 0x2D4 */
595 int PAD; /* 0x2D8 */
596 int PAD; /* 0x2DC */
597 int PAD; /* 0x2E0 */
598 int PAD; /* 0x2E4 */
599 int PAD; /* 0x2E8 */
600 int PAD; /* 0x2EC */
601 int PAD; /* 0x2F0 */
602 int PAD; /* 0x2F4 */
603 int PAD; /* 0x2F8 */
604 int PAD; /* 0x2FC */
605 int PAD; /* 0X300 */
606 int PAD; /* 0X304 */
607 int PAD; /* 0X308 */
608 int PAD; /* 0X30C */
609 int PAD; /* 0X310 */
610 int PAD; /* 0X314 */
611 int PAD; /* 0X318 */
612 int PAD; /* 0X31C */
613 int PAD; /* 0X320 */
614 int PAD; /* 0X324 */
615 int PAD; /* 0X328 */
616 int PAD; /* 0X32C */
617 int PAD; /* 0X330 */
618 int PAD; /* 0X334 */
619 int PAD; /* 0X338 */
620 int PAD; /* 0X33C */
621 int PAD; /* 0X340 */
622 int PAD; /* 0X344 */
623 int PAD; /* 0X348 */
624 int PAD; /* 0X34C */
625 int PAD; /* 0X350 */
626 int PAD; /* 0X354 */
627 int PAD; /* 0X358 */
628 int PAD; /* 0X35C */
629 int PAD; /* 0X360 */
630 short *field_364; /* 0X364 */
631 int PAD; /* 0X368 */
632 int PAD; /* 0X36C */
633 int PAD; /* 0X370 */
634 int PAD; /* 0X374 */
635 int PAD; /* 0X378 */
636 int PAD; /* 0X37C */
637 int PAD; /* 0X380 */
638 int PAD; /* 0X384 */
639 int PAD; /* 0X388 */
640 int PAD; /* 0X38C */
641 int PAD; /* 0X390 */
642 int PAD; /* 0X394 */
643 int PAD; /* 0X398 */
644 int PAD; /* 0X39C */
645 int PAD; /* 0X3A0 */
646 int PAD; /* 0X3A4 */
647 int PAD; /* 0X3A8 */
648 int PAD; /* 0X3AC */
649 int PAD; /* 0X3B0 */
650 int PAD; /* 0X3B4 */
651 int PAD; /* 0X3B8 */
652 int PAD; /* 0X3BC */
653 int PAD; /* 0X3C0 */
654 int PAD; /* 0X3C4 */
655 int PAD; /* 0X3C8 */
656 int PAD; /* 0X3CC */
657 int PAD; /* 0X3D0 */
658 int PAD; /* 0X3D4 */
659 int PAD; /* 0X3D8 */
660 int PAD; /* 0X3DC */
661 int PAD; /* 0X3E0 */
662 int PAD; /* 0X3E4 */
663 int PAD; /* 0X3E8 */
664 int PAD; /* 0X3EC */
665 int PAD; /* 0X3F0 */
666 int PAD; /* 0X3F4 */
667 int PAD; /* 0X3F8 */
668 int PAD; /* 0X3FC */
669 int PAD; /* 0X400 */
670 int PAD; /* 0X404 */
671 int PAD; /* 0X408 */
672 int PAD; /* 0X40C */
673 int PAD; /* 0X410 */
674 int PAD; /* 0X414 */
675 int PAD; /* 0X418 */
676 int PAD; /* 0X41C */
677 int PAD; /* 0X420 */
678 int PAD; /* 0X424 */
679 int PAD; /* 0X428 */
680 int PAD; /* 0X42C */
681 int PAD; /* 0X430 */
682 int PAD; /* 0X434 */
683 int PAD; /* 0X438 */
684 int PAD; /* 0X43C */
685 int PAD; /* 0X440 */
686 int PAD; /* 0X444 */
687 int PAD; /* 0X448 */
688 int PAD; /* 0X44C */
689 int PAD; /* 0X450 */
690 int PAD; /* 0X454 */
691 int PAD; /* 0X458 */
692 int PAD; /* 0X45C */
693 int PAD; /* 0X460 */
694 int PAD; /* 0X464 */
695 int PAD; /* 0X468 */
696 int PAD; /* 0X46C */
697 int PAD; /* 0X470 */
698 int PAD; /* 0X474 */
699 int PAD; /* 0X478 */
700 int PAD; /* 0X47C */
701 int PAD; /* 0X480 */
702 int PAD; /* 0X484 */
703 int PAD; /* 0X488 */
704 int PAD; /* 0X48C */
705 int PAD; /* 0X490 */
706 int PAD; /* 0X494 */
707 int PAD; /* 0X498 */
708 int PAD; /* 0X49C */
709 int PAD; /* 0X4A0 */
710 int PAD; /* 0X4A4 */
711 int PAD; /* 0X4A8 */
712 int PAD; /* 0X4AC */
713 int PAD; /* 0X4B0 */
714 int PAD; /* 0X4B4 */
715 int PAD; /* 0X4B8 */
716 int PAD; /* 0X4BC */
717 int PAD; /* 0X4C0 */
718 int PAD; /* 0X4C4 */
719 int PAD; /* 0X4C8 */
720 int PAD; /* 0X4CC */
721 int PAD; /* 0X4D0 */
722 int PAD; /* 0X4D4 */
723 int PAD; /* 0X4D8 */
724 int PAD; /* 0X4DC */
725 int PAD; /* 0X4E0 */
726 int PAD; /* 0X4E4 */
727 int PAD; /* 0X4E8 */
728 int PAD; /* 0X4EC */
729 int PAD; /* 0X4F0 */
730 int PAD; /* 0X4F4 */
731 int PAD; /* 0X4F8 */
732 int PAD; /* 0X4FC */
733 int PAD; /* 0X500 */
734 int PAD; /* 0X504 */
735 int PAD; /* 0X508 */
736 int PAD; /* 0X50C */
737 short some_chanspec; /* 0X510 */
738 short PAD; /* 0X512 */
739 int PAD; /* 0X514 */
740 int PAD; /* 0X518 */
741 int PAD; /* 0X51C */
742 int PAD; /* 0X520 */
743 int PAD; /* 0X524 */
744 int PAD; /* 0X528 */
745 int PAD; /* 0X52C */
746 int PAD; /* 0X530 */
747 int PAD; /* 0X534 */
748 int PAD; /* 0X538 */
749 int PAD; /* 0X53C */
750 int PAD; /* 0X540 */
751 int PAD; /* 0X544 */
752 int PAD; /* 0X548 */
753 int PAD; /* 0X54C */
754 int PAD; /* 0X550 */
755 int PAD; /* 0X554 */
756 int PAD; /* 0X558 */
757 int PAD; /* 0X55C */
758 int PAD; /* 0X560 */
759 int PAD; /* 0X564 */
760 int PAD; /* 0X568 */
761 int PAD; /* 0X56C */
762 int PAD; /* 0X570 */
763 int PAD; /* 0X574 */
764 int PAD; /* 0X578 */
765 int PAD; /* 0X57C */
766 int PAD; /* 0X580 */
767 int PAD; /* 0X584 */
768 int PAD; /* 0X588 */
769 int PAD; /* 0X58C */
770 int PAD; /* 0X590 */
771 int PAD; /* 0X594 */
772 int PAD; /* 0X598 */
773 int PAD; /* 0X59C */
774 struct wlc_if *wlcif_list; /* 0X5A0 CHECKED for 7.45.41.26*/
775 int PAD; /* 0X5A4 */
776 int PAD; /* 0X5A8 */
777 int PAD; /* 0X5AC */
778 int PAD; /* 0X5B0 */
779 int PAD; /* 0X5B4 */
780 int PAD; /* 0X5B8 */
781 int PAD; /* 0X5BC */
782 int PAD; /* 0X5C0 */
783 int PAD; /* 0X5C4 */
784 int PAD; /* 0X5C8 */
785 int PAD; /* 0X5CC */
786 void *hrti; /* 0X5D0 */
787 int PAD; /* 0X5D4 */
788 int PAD; /* 0X5D8 */
789 int PAD; /* 0X5DC */
790 int PAD; /* 0X5E0 */
791 int PAD; /* 0X5E4 */
792 void *active_queue; /* 0X5E8 */
793 int PAD; /* 0X5EC */
794 int PAD; /* 0X5F0 */
795 int PAD; /* 0X5F4 */
796 int PAD; /* 0X5F8 */
797 int PAD; /* 0X5FC */
798 };
799  
800 /* partly CHECKED */
801 struct wlc_pub {
802 struct wlc_info *wlc; /* 0x000 */
803 int PAD; /* 0x004 */
804 int PAD; /* 0x008 */
805 int PAD; /* 0x00C */
806 int PAD; /* 0x010 */
807 int PAD; /* 0x014 */
808 int PAD; /* 0x018 */
809 struct tunables *tunables; /* 0x01C */
810 int PAD; /* 0x020 */
811 char up_maybe; /* 0x024 */
812 char field_25; /* 0x025 */
813 char field_26; /* 0x026 */
814 char field_27; /* 0x027 */
815 int PAD; /* 0x028 */
816 int PAD; /* 0x02C */
817 int field_30; /* 0x030 */
818 int PAD; /* 0x034 */
819 int PAD; /* 0x038 */
820 int PAD; /* 0x03C */
821 int PAD; /* 0x040 */
822 char PAD; /* 0x044 */
823 char PAD; /* 0x045 */
824 char field_46; /* 0x046 */
825 char PAD; /* 0x047 */
826 int PAD; /* 0x048 */
827 char associated; /* 0x04C */
828 char PAD; /* 0x04D */
829 char PAD; /* 0x04E */
830 char PAD; /* 0x04F */
831 int PAD; /* 0x050 */
832 char gap2[147];
833 char is_amsdu; // @ 0xe7
834 } __attribute__((packed));
835  
836 struct wlc_bsscfg {
837 void *wlc; /* 0x000 */
838 char associated; /* 0x004 */
839 char PAD; /* 0x005 */
840 char PAD; /* 0x006 */
841 char PAD; /* 0x007 */
842 int PAD; /* 0x008 */
843 int PAD; /* 0x00C */
844 int PAD; /* 0x010 */
845 int PAD; /* 0x014 */
846 int PAD; /* 0x018 */
847 int PAD; /* 0x01C */
848 int PAD; /* 0x020 */
849 int PAD; /* 0x024 */
850 int PAD; /* 0x028 */
851 int PAD; /* 0x02C */
852 int PAD; /* 0x030 */
853 int PAD; /* 0x034 */
854 int PAD; /* 0x038 */
855 int PAD; /* 0x03C */
856 int PAD; /* 0x040 */
857 int PAD; /* 0x044 */
858 int PAD; /* 0x048 */
859 int PAD; /* 0x04C */
860 int PAD; /* 0x050 */
861 int PAD; /* 0x054 */
862 int PAD; /* 0x058 */
863 int PAD; /* 0x05C */
864 int PAD; /* 0x060 */
865 int PAD; /* 0x064 */
866 int PAD; /* 0x068 */
867 int PAD; /* 0x06C */
868 int PAD; /* 0x070 */
869 int PAD; /* 0x074 */
870 int PAD; /* 0x078 */
871 int PAD; /* 0x07C */
872 int PAD; /* 0x080 */
873 int PAD; /* 0x084 */
874 int PAD; /* 0x088 */
875 int PAD; /* 0x08C */
876 int PAD; /* 0x090 */
877 int PAD; /* 0x094 */
878 int PAD; /* 0x098 */
879 int PAD; /* 0x09C */
880 int PAD; /* 0x0A0 */
881 int PAD; /* 0x0A4 */
882 int PAD; /* 0x0A8 */
883 int PAD; /* 0x0AC */
884 int PAD; /* 0x0B0 */
885 int PAD; /* 0x0B4 */
886 int PAD; /* 0x0B8 */
887 int PAD; /* 0x0BC */
888 int PAD; /* 0x0C0 */
889 int PAD; /* 0x0C4 */
890 int PAD; /* 0x0C8 */
891 int PAD; /* 0x0CC */
892 int PAD; /* 0x0D0 */
893 int PAD; /* 0x0D4 */
894 int PAD; /* 0x0D8 */
895 int PAD; /* 0x0DC */
896 int PAD; /* 0x0E0 */
897 int PAD; /* 0x0E4 */
898 int PAD; /* 0x0E8 */
899 int PAD; /* 0x0EC */
900 int PAD; /* 0x0F0 */
901 int PAD; /* 0x0F4 */
902 int PAD; /* 0x0F8 */
903 int PAD; /* 0x0FC */
904 int PAD; /* 0x100 */
905 int PAD; /* 0x104 */
906 int PAD; /* 0x108 */
907 int PAD; /* 0x10C */
908 int PAD; /* 0x110 */
909 int PAD; /* 0x114 */
910 int PAD; /* 0x118 */
911 int PAD; /* 0x11C */
912 int PAD; /* 0x120 */
913 int PAD; /* 0x124 */
914 int PAD; /* 0x128 */
915 int PAD; /* 0x12C */
916 int PAD; /* 0x130 */
917 int PAD; /* 0x134 */
918 int PAD; /* 0x138 */
919 int PAD; /* 0x13C */
920 int PAD; /* 0x140 */
921 int PAD; /* 0x144 */
922 int PAD; /* 0x148 */
923 int PAD; /* 0x14C */
924 int PAD; /* 0x150 */
925 int PAD; /* 0x154 */
926 int PAD; /* 0x158 */
927 int PAD; /* 0x15C */
928 int PAD; /* 0x160 */
929 int PAD; /* 0x164 */
930 int PAD; /* 0x168 */
931 int PAD; /* 0x16C */
932 int PAD; /* 0x170 */
933 int PAD; /* 0x174 */
934 int PAD; /* 0x178 */
935 int PAD; /* 0x17C */
936 int PAD; /* 0x180 */
937 int PAD; /* 0x184 */
938 int PAD; /* 0x188 */
939 int PAD; /* 0x18C */
940 int PAD; /* 0x190 */
941 int PAD; /* 0x194 */
942 int PAD; /* 0x198 */
943 int PAD; /* 0x19C */
944 int PAD; /* 0x1A0 */
945 int PAD; /* 0x1A4 */
946 int PAD; /* 0x1A8 */
947 int PAD; /* 0x1AC */
948 int PAD; /* 0x1B0 */
949 int PAD; /* 0x1B4 */
950 int PAD; /* 0x1B8 */
951 int PAD; /* 0x1BC */
952 int PAD; /* 0x1C0 */
953 int PAD; /* 0x1C4 */
954 int PAD; /* 0x1C8 */
955 int PAD; /* 0x1CC */
956 int PAD; /* 0x1D0 */
957 int PAD; /* 0x1D4 */
958 int PAD; /* 0x1D8 */
959 int PAD; /* 0x1DC */
960 int PAD; /* 0x1E0 */
961 int PAD; /* 0x1E4 */
962 int PAD; /* 0x1E8 */
963 int PAD; /* 0x1EC */
964 int PAD; /* 0x1F0 */
965 int PAD; /* 0x1F4 */
966 int PAD; /* 0x1F8 */
967 int PAD; /* 0x1FC */
968 int PAD; /* 0x200 */
969 int PAD; /* 0x204 */
970 int PAD; /* 0x208 */
971 int PAD; /* 0x20C */
972 int PAD; /* 0x210 */
973 int PAD; /* 0x214 */
974 int PAD; /* 0x218 */
975 int PAD; /* 0x21C */
976 int PAD; /* 0x220 */
977 int PAD; /* 0x224 */
978 int PAD; /* 0x228 */
979 int PAD; /* 0x22C */
980 int PAD; /* 0x230 */
981 int PAD; /* 0x234 */
982 int PAD; /* 0x238 */
983 int PAD; /* 0x23C */
984 int PAD; /* 0x240 */
985 int PAD; /* 0x244 */
986 int PAD; /* 0x248 */
987 int PAD; /* 0x24C */
988 int PAD; /* 0x250 */
989 int PAD; /* 0x254 */
990 int PAD; /* 0x258 */
991 int PAD; /* 0x25C */
992 int PAD; /* 0x260 */
993 int PAD; /* 0x264 */
994 int PAD; /* 0x268 */
995 int PAD; /* 0x26C */
996 int PAD; /* 0x270 */
997 int PAD; /* 0x274 */
998 int PAD; /* 0x278 */
999 int PAD; /* 0x27C */
1000 int PAD; /* 0x280 */
1001 int PAD; /* 0x284 */
1002 int PAD; /* 0x288 */
1003 int PAD; /* 0x28C */
1004 int PAD; /* 0x290 */
1005 int PAD; /* 0x294 */
1006 int PAD; /* 0x298 */
1007 int PAD; /* 0x29C */
1008 int PAD; /* 0x2A0 */
1009 int PAD; /* 0x2A4 */
1010 int PAD; /* 0x2A8 */
1011 int PAD; /* 0x2AC */
1012 int PAD; /* 0x2B0 */
1013 int PAD; /* 0x2B4 */
1014 int PAD; /* 0x2B8 */
1015 int PAD; /* 0x2BC */
1016 int PAD; /* 0x2C0 */
1017 int PAD; /* 0x2C4 */
1018 int PAD; /* 0x2C8 */
1019 int PAD; /* 0x2CC */
1020 int PAD; /* 0x2D0 */
1021 int PAD; /* 0x2D4 */
1022 int PAD; /* 0x2D8 */
1023 int PAD; /* 0x2DC */
1024 int PAD; /* 0x2E0 */
1025 int PAD; /* 0x2E4 */
1026 int PAD; /* 0x2E8 */
1027 int PAD; /* 0x2EC */
1028 int PAD; /* 0x2F0 */
1029 int PAD; /* 0x2F4 */
1030 int PAD; /* 0x2F8 */
1031 int PAD; /* 0x2FC */
1032 int PAD; /* 0X300 */
1033 int PAD; /* 0X304 */
1034 int PAD; /* 0X308 */
1035 int PAD; /* 0X30C */
1036 int PAD; /* 0X310 */
1037 int PAD; /* 0X314 */
1038 int PAD; /* 0X318 */
1039 int PAD; /* 0X31C */
1040 int PAD; /* 0X320 */
1041 int PAD; /* 0X324 */
1042 int PAD; /* 0X328 */
1043 int PAD; /* 0X32C */
1044 int PAD; /* 0X330 */
1045 int PAD; /* 0X334 */
1046 int PAD; /* 0X338 */
1047 int PAD; /* 0X33C */
1048 int PAD; /* 0X340 */
1049 int PAD; /* 0X344 */
1050 int PAD; /* 0X348 */
1051 int PAD; /* 0X34C */
1052 int PAD; /* 0X350 */
1053 int PAD; /* 0X354 */
1054 int PAD; /* 0X358 */
1055 int PAD; /* 0X35C */
1056 int PAD; /* 0X360 */
1057 int PAD; /* 0X364 */
1058 int PAD; /* 0X368 */
1059 int PAD; /* 0X36C */
1060 int PAD; /* 0X370 */
1061 int PAD; /* 0X374 */
1062 int PAD; /* 0X378 */
1063 int PAD; /* 0X37C */
1064 int PAD; /* 0X380 */
1065 int PAD; /* 0X384 */
1066 int PAD; /* 0X388 */
1067 int PAD; /* 0X38C */
1068 int PAD; /* 0X390 */
1069 int PAD; /* 0X394 */
1070 int PAD; /* 0X398 */
1071 int PAD; /* 0X39C */
1072 int PAD; /* 0X3A0 */
1073 int PAD; /* 0X3A4 */
1074 int PAD; /* 0X3A8 */
1075 int PAD; /* 0X3AC */
1076 int PAD; /* 0X3B0 */
1077 int PAD; /* 0X3B4 */
1078 int PAD; /* 0X3B8 */
1079 int PAD; /* 0X3BC */
1080 int PAD; /* 0X3C0 */
1081 int PAD; /* 0X3C4 */
1082 int PAD; /* 0X3C8 */
1083 int PAD; /* 0X3CC */
1084 int PAD; /* 0X3D0 */
1085 int PAD; /* 0X3D4 */
1086 int PAD; /* 0X3D8 */
1087 int PAD; /* 0X3DC */
1088 int PAD; /* 0X3E0 */
1089 int PAD; /* 0X3E4 */
1090 int PAD; /* 0X3E8 */
1091 int PAD; /* 0X3EC */
1092 int PAD; /* 0X3F0 */
1093 int PAD; /* 0X3F4 */
1094 int PAD; /* 0X3F8 */
1095 int PAD; /* 0X3FC */
1096 int PAD; /* 0X400 */
1097 int PAD; /* 0X404 */
1098 int PAD; /* 0X408 */
1099 int PAD; /* 0X40C */
1100 int PAD; /* 0X410 */
1101 int PAD; /* 0X414 */
1102 int PAD; /* 0X418 */
1103 int PAD; /* 0X41C */
1104 int PAD; /* 0X420 */
1105 int PAD; /* 0X424 */
1106 int PAD; /* 0X428 */
1107 int PAD; /* 0X42C */
1108 int PAD; /* 0X430 */
1109 int PAD; /* 0X434 */
1110 int PAD; /* 0X438 */
1111 int PAD; /* 0X43C */
1112 int PAD; /* 0X440 */
1113 int PAD; /* 0X444 */
1114 int PAD; /* 0X448 */
1115 int PAD; /* 0X44C */
1116 int PAD; /* 0X450 */
1117 int PAD; /* 0X454 */
1118 int PAD; /* 0X458 */
1119 int PAD; /* 0X45C */
1120 int PAD; /* 0X460 */
1121 int PAD; /* 0X464 */
1122 int PAD; /* 0X468 */
1123 int PAD; /* 0X46C */
1124 int PAD; /* 0X470 */
1125 int PAD; /* 0X474 */
1126 int PAD; /* 0X478 */
1127 int PAD; /* 0X47C */
1128 int PAD; /* 0X480 */
1129 int PAD; /* 0X484 */
1130 int PAD; /* 0X488 */
1131 int PAD; /* 0X48C */
1132 int PAD; /* 0X490 */
1133 int PAD; /* 0X494 */
1134 int PAD; /* 0X498 */
1135 int PAD; /* 0X49C */
1136 int PAD; /* 0X4A0 */
1137 int PAD; /* 0X4A4 */
1138 int PAD; /* 0X4A8 */
1139 int PAD; /* 0X4AC */
1140 int PAD; /* 0X4B0 */
1141 int PAD; /* 0X4B4 */
1142 int PAD; /* 0X4B8 */
1143 int PAD; /* 0X4BC */
1144 int PAD; /* 0X4C0 */
1145 int PAD; /* 0X4C4 */
1146 int PAD; /* 0X4C8 */
1147 int PAD; /* 0X4CC */
1148 int PAD; /* 0X4D0 */
1149 int PAD; /* 0X4D4 */
1150 int PAD; /* 0X4D8 */
1151 int PAD; /* 0X4DC */
1152 int PAD; /* 0X4E0 */
1153 int PAD; /* 0X4E4 */
1154 int PAD; /* 0X4E8 */
1155 int PAD; /* 0X4EC */
1156 int PAD; /* 0X4F0 */
1157 int PAD; /* 0X4F4 */
1158 int PAD; /* 0X4F8 */
1159 int PAD; /* 0X4FC */
1160 int PAD; /* 0X500 */
1161 int PAD; /* 0X504 */
1162 int PAD; /* 0X508 */
1163 int PAD; /* 0X50C */
1164 int PAD; /* 0X510 */
1165 int PAD; /* 0X514 */
1166 int PAD; /* 0X518 */
1167 int PAD; /* 0X51C */
1168 int PAD; /* 0X520 */
1169 int PAD; /* 0X524 */
1170 int PAD; /* 0X528 */
1171 int PAD; /* 0X52C */
1172 int PAD; /* 0X530 */
1173 int PAD; /* 0X534 */
1174 int PAD; /* 0X538 */
1175 int PAD; /* 0X53C */
1176 int PAD; /* 0X540 */
1177 short PAD; /* 0X544 */
1178 short field_546; /* 0X546 */
1179 int PAD; /* 0X548 */
1180 int PAD; /* 0X54C */
1181 int PAD; /* 0X550 */
1182 int PAD; /* 0X554 */
1183 int PAD; /* 0X558 */
1184 int PAD; /* 0X55C */
1185 int PAD; /* 0X560 */
1186 int PAD; /* 0X564 */
1187 int PAD; /* 0X568 */
1188 int PAD; /* 0X56C */
1189 int PAD; /* 0X570 */
1190 int PAD; /* 0X574 */
1191 int PAD; /* 0X578 */
1192 int PAD; /* 0X57C */
1193 int PAD; /* 0X580 */
1194 int PAD; /* 0X584 */
1195 } __attribute__((packed));
1196  
1197 // Checked
1198 struct wlc_event_msg {
1199 uint16 flag1;
1200 uint16 flag2;
1201 uint32 event_type;
1202 uint32 status;
1203 uint32 reason;
1204 uint32 auth_type;
1205 uint32 datalen;
1206 int PAD;
1207 int PAD;
1208 int PAD;
1209 } __attribute__((packed));
1210  
1211 // Checked
1212 struct wlc_event {
1213 struct wlc_event_msg event;
1214 int PAD;
1215 int PAD;
1216 int PAD;
1217 int PAD;
1218 int PAD;
1219 void *data; /* 0x038 */
1220 int PAD;
1221 } __attribute__((packed));
1222  
1223 struct scb {
1224 int PAD;
1225 int PAD;
1226 int PAD;
1227 int PAD;
1228 void *bsscfg;
1229 } __attribute__((packed));
1230  
1231 struct hnddma_pub {
1232 void *di_fn; /* DMA function pointers */
1233 unsigned int txavail; /* # free tx descriptors */
1234 unsigned int dmactrlflags; /* dma control flags */
1235 /* rx error counters */
1236 unsigned int rxgiants; /* rx giant frames */
1237 unsigned int rxnobuf; /* rx out of dma descriptors */
1238 /* tx error counters */
1239 unsigned int txnobuf; /* tx out of dma descriptors */
1240 } __attribute__((packed));
1241  
1242 struct dma_info {
1243 struct hnddma_pub hnddma; /* exported structure */
1244 int msg_level; /* message level pointer */
1245 int something;
1246 char name[8]; /* callers name for diag msgs */
1247 void *osh;
1248 void *sih;
1249 bool dma64; /* this dma engine is operating in 64-bit mode */
1250 bool addrext; /* this dma engine supports DmaExtendedAddrChanges */
1251 char gap2[2];
1252 void *txregs; /* 64-bit dma tx engine registers */
1253 void *rxregs; /* 64-bit dma rx engine registers */
1254 void *txd; /* pointer to dma64 tx descriptor ring */
1255 void *rxd; /* pointer to dma64 rx descriptor ring */
1256 short dmadesc_align; /* alignment requirement for dma descriptors */
1257 short ntxd; /* # tx descriptors tunable */
1258 short txin; /* index of next descriptor to reclaim */
1259 short txout; /* index of next descriptor to post */
1260 void **txp; /* pointer to parallel array of pointers to packets */
1261 void *tx_dmah; /* DMA MAP meta-data handle */
1262 int txp_dmah;
1263 int txdpa; /* Aligned physical address of descriptor ring */
1264 int txdpaorig; /* Original physical address of descriptor ring */
1265 short txdalign; /* #bytes added to alloc'd mem to align txd */
1266 int txdalloc; /* #bytes allocated for the ring */
1267 int xmtptrbase; /* When using unaligned descriptors, the ptr register
1268 * is not just an index, it needs all 13 bits to be
1269 * an offset from the addr register.
1270 */
1271 short PAD;
1272 short nrxd;
1273 short rxin;
1274 short rxout;
1275 short PAD;
1276 void **rxp;
1277 int PAD;
1278 int PAD;
1279 int rxdpa;
1280 short rxdalign;
1281 short PAD;
1282 int PAD;
1283 int PAD;
1284 int PAD;
1285 int rxbufsize; /* rx buffer size in bytes, not including the extra headroom */
1286 int rxextrahdrroom; /* extra rx headroom. */
1287  
1288 } __attribute__((packed));
1289  
1290 struct intctrlregs {
1291 unsigned int intstatus;
1292 unsigned int intmask;
1293 };
1294  
1295 /* read: 32-bit register that can be read as 32-bit or as 2 16-bit
1296 * write: only low 16b-it half can be written
1297 */
1298 union pmqreg {
1299 unsigned int pmqhostdata; /* read only! */
1300 struct {
1301 unsigned short pmqctrlstatus; /* read/write */
1302 unsigned short PAD;
1303 } w;
1304 };
1305  
1306 /* dma registers per channel(xmt or rcv) */
1307 struct dma64regs {
1308 unsigned int control; /* enable, et al */
1309 unsigned int ptr; /* last descriptor posted to chip */
1310 unsigned int addrlow; /* desc ring base address low 32-bits (8K aligned) */
1311 unsigned int addrhigh; /* desc ring base address bits 63:32 (8K aligned) */
1312 unsigned int status0; /* current descriptor, xmt state */
1313 unsigned int status1; /* active descriptor, xmt error */
1314 };
1315  
1316 /* 4byte-wide pio register set per channel(xmt or rcv) */
1317 struct pio4regs {
1318 unsigned int fifocontrol;
1319 unsigned int fifodata;
1320 };
1321  
1322 struct fifo64 {
1323 struct dma64regs dmaxmt; /* dma tx */
1324 struct pio4regs piotx; /* pio tx */
1325 struct dma64regs dmarcv; /* dma rx */
1326 struct pio4regs piorx; /* pio rx */
1327 };
1328  
1329 struct dma32diag { /* diag access */
1330 unsigned int fifoaddr; /* diag address */
1331 unsigned int fifodatalow; /* low 32bits of data */
1332 unsigned int fifodatahigh; /* high 32bits of data */
1333 unsigned int pad; /* reserved */
1334 };
1335  
1336 /*
1337 * Host Interface Registers
1338 */
1339 struct d11regs {
1340 /* Device Control ("semi-standard host registers") */
1341 unsigned int PAD[3]; /* 0x0 - 0x8 */
1342 unsigned int biststatus; /* 0xC */
1343 unsigned int biststatus2; /* 0x10 */
1344 unsigned int PAD; /* 0x14 */
1345 unsigned int gptimer; /* 0x18 */
1346 unsigned int usectimer; /* 0x1c *//* for corerev >= 26 */
1347  
1348 /* Interrupt Control *//* 0x20 */
1349 struct intctrlregs intctrlregs[8];
1350  
1351 unsigned int PAD[40]; /* 0x60 - 0xFC */
1352  
1353 unsigned int intrcvlazy[4]; /* 0x100 - 0x10C */
1354  
1355 unsigned int PAD[4]; /* 0x110 - 0x11c */
1356  
1357 unsigned int maccontrol; /* 0x120 */
1358 unsigned int maccommand; /* 0x124 */
1359 unsigned int macintstatus; /* 0x128 */
1360 unsigned int macintmask; /* 0x12C */
1361  
1362 /* Transmit Template Access */
1363 unsigned int tplatewrptr; /* 0x130 */
1364 unsigned int tplatewrdata; /* 0x134 */
1365 unsigned int PAD[2]; /* 0x138 - 0x13C */
1366  
1367 /* PMQ registers */
1368 union pmqreg pmqreg; /* 0x140 */
1369 unsigned int pmqpatl; /* 0x144 */
1370 unsigned int pmqpath; /* 0x148 */
1371 unsigned int PAD; /* 0x14C */
1372  
1373 unsigned int chnstatus; /* 0x150 */
1374 unsigned int psmdebug; /* 0x154 */
1375 unsigned int phydebug; /* 0x158 */
1376 unsigned int machwcap; /* 0x15C */
1377  
1378 /* Extended Internal Objects */
1379 unsigned int objaddr; /* 0x160 */
1380 unsigned int objdata; /* 0x164 */
1381 unsigned int PAD[2]; /* 0x168 - 0x16c */
1382  
1383 unsigned int frmtxstatus; /* 0x170 */
1384 unsigned int frmtxstatus2; /* 0x174 */
1385 unsigned int PAD[2]; /* 0x178 - 0x17c */
1386  
1387 /* TSF host access */
1388 unsigned int tsf_timerlow; /* 0x180 */
1389 unsigned int tsf_timerhigh; /* 0x184 */
1390 unsigned int tsf_cfprep; /* 0x188 */
1391 unsigned int tsf_cfpstart; /* 0x18c */
1392 unsigned int tsf_cfpmaxdur32; /* 0x190 */
1393 unsigned int PAD[3]; /* 0x194 - 0x19c */
1394  
1395 unsigned int maccontrol1; /* 0x1a0 */
1396 unsigned int machwcap1; /* 0x1a4 */
1397 unsigned int PAD[14]; /* 0x1a8 - 0x1dc */
1398  
1399 /* Clock control and hardware workarounds*/
1400 unsigned int clk_ctl_st; /* 0x1e0 */
1401 unsigned int hw_war;
1402 unsigned int d11_phypllctl; /* the phypll request/avail bits are
1403 * moved to clk_ctl_st
1404 */
1405 unsigned int PAD[5]; /* 0x1ec - 0x1fc */
1406  
1407 /* 0x200-0x37F dma/pio registers */
1408 struct fifo64 fifo64regs[6];
1409  
1410 /* FIFO diagnostic port access */
1411 struct dma32diag dmafifo; /* 0x380 - 0x38C */
1412  
1413 unsigned int aggfifocnt; /* 0x390 */
1414 unsigned int aggfifodata; /* 0x394 */
1415 unsigned int PAD[16]; /* 0x398 - 0x3d4 */
1416 unsigned short radioregaddr; /* 0x3d8 */
1417 unsigned short radioregdata; /* 0x3da */
1418  
1419 /*
1420 * time delay between the change on rf disable input and
1421 * radio shutdown
1422 */
1423 unsigned int rfdisabledly; /* 0x3DC */
1424  
1425 /* PHY register access */
1426 unsigned short phyversion; /* 0x3e0 - 0x0 */
1427 unsigned short phybbconfig; /* 0x3e2 - 0x1 */
1428 unsigned short phyadcbias; /* 0x3e4 - 0x2 Bphy only */
1429 unsigned short phyanacore; /* 0x3e6 - 0x3 pwwrdwn on aphy */
1430 unsigned short phyrxstatus0; /* 0x3e8 - 0x4 */
1431 unsigned short phyrxstatus1; /* 0x3ea - 0x5 */
1432 unsigned short phycrsth; /* 0x3ec - 0x6 */
1433 unsigned short phytxerror; /* 0x3ee - 0x7 */
1434 unsigned short phychannel; /* 0x3f0 - 0x8 */
1435 unsigned short PAD[1]; /* 0x3f2 - 0x9 */
1436 unsigned short phytest; /* 0x3f4 - 0xa */
1437 unsigned short phy4waddr; /* 0x3f6 - 0xb */
1438 unsigned short phy4wdatahi; /* 0x3f8 - 0xc */
1439 unsigned short phy4wdatalo; /* 0x3fa - 0xd */
1440 unsigned short phyregaddr; /* 0x3fc - 0xe */
1441 unsigned short phyregdata; /* 0x3fe - 0xf */
1442  
1443 /* IHR *//* 0x400 - 0x7FE */
1444  
1445 /* RXE Block */
1446 unsigned short PAD; /* SPR_RXE_0x00 0x400 */
1447 unsigned short PAD; /* SPR_RXE_Copy_Offset 0x402 */
1448 unsigned short PAD; /* SPR_RXE_Copy_Length 0x404 */
1449 unsigned short rcv_fifo_ctl; /* SPR_RXE_FIFOCTL0 0x406 */
1450 unsigned short PAD; /* SPR_RXE_FIFOCTL1 0x408 */
1451 unsigned short rcv_frm_cnt; /* SPR_Received_Frame_Count 0x40a */
1452 unsigned short PAD; /* SPR_RXE_0x0c 0x40c */
1453 unsigned short PAD; /* SPR_RXE_RXHDR_OFFSET 0x40e */
1454 unsigned short PAD; /* SPR_RXE_RXHDR_LEN 0x410 */
1455 unsigned short PAD; /* SPR_RXE_PHYRXSTAT0 0x412 */
1456 unsigned short rssi; /* SPR_RXE_PHYRXSTAT1 0x414 */
1457 unsigned short PAD; /* SPR_RXE_0x16 0x416 */
1458 unsigned short PAD; /* SPR_RXE_FRAMELEN 0x418 */
1459 unsigned short PAD; /* SPR_RXE_0x1a 0x41a */
1460 unsigned short PAD; /* SPR_RXE_ENCODING 0x41c */
1461 unsigned short PAD; /* SPR_RXE_0x1e 0x41e */
1462 unsigned short rcm_ctl; /* SPR_RCM_Control 0x420 */
1463 unsigned short rcm_mat_data; /* SPR_RCM_Match_Data 0x422 */
1464 unsigned short rcm_mat_mask; /* SPR_RCM_Match_Mask 0x424 */
1465 unsigned short rcm_mat_dly; /* SPR_RCM_Match_Delay 0x426 */
1466 unsigned short rcm_cond_mask_l; /* SPR_RCM_Condition_Mask_Low 0x428 */
1467 unsigned short rcm_cond_mask_h; /* SPR_RCM_Condition_Mask_High 0x42A */
1468 unsigned short rcm_cond_dly; /* SPR_RCM_Condition_Delay 0x42C */
1469 unsigned short PAD; /* SPR_RXE_0x2e 0x42E */
1470 unsigned short ext_ihr_addr; /* SPR_Ext_IHR_Address 0x430 */
1471 unsigned short ext_ihr_data; /* SPR_Ext_IHR_Data 0x432 */
1472 unsigned short rxe_phyrs_2; /* SPR_RXE_PHYRXSTAT2 0x434 */
1473 unsigned short rxe_phyrs_3; /* SPR_RXE_PHYRXSTAT3 0x436 */
1474 unsigned short phy_mode; /* SPR_PHY_Mode 0x438 */
1475 unsigned short rcmta_ctl; /* SPR_RCM_TA_Control 0x43a */
1476 unsigned short rcmta_size; /* SPR_RCM_TA_Size 0x43c */
1477 unsigned short rcmta_addr0; /* SPR_RCM_TA_Address_0 0x43e */
1478 unsigned short rcmta_addr1; /* SPR_RCM_TA_Address_1 0x440 */
1479 unsigned short rcmta_addr2; /* SPR_RCM_TA_Address_2 0x442 */
1480 unsigned short PAD[30]; /* SPR_RXE_0x44 ... 0x7e 0x444 */
1481  
1482  
1483 /* PSM Block *//* 0x480 - 0x500 */
1484  
1485 unsigned short PAD; /* SPR_MAC_MAX_NAP 0x480 */
1486 unsigned short psm_maccontrol_h; /* SPR_MAC_CTLHI 0x482 */
1487 unsigned short psm_macintstatus_l; /* SPR_MAC_IRQLO 0x484 */
1488 unsigned short psm_macintstatus_h; /* SPR_MAC_IRQHI 0x486 */
1489 unsigned short psm_macintmask_l; /* SPR_MAC_IRQMASKLO 0x488 */
1490 unsigned short psm_macintmask_h; /* SPR_MAC_IRQMASKHI 0x48A */
1491 unsigned short PAD; /* SPR_PSM_0x0c 0x48C */
1492 unsigned short psm_maccommand; /* SPR_MAC_CMD 0x48E */
1493 unsigned short psm_brc; /* SPR_BRC 0x490 */
1494 unsigned short psm_phy_hdr_param; /* SPR_PHY_HDR_Parameter 0x492 */
1495 unsigned short psm_postcard; /* SPR_Postcard 0x494 */
1496 unsigned short psm_pcard_loc_l; /* SPR_Postcard_Location_Low 0x496 */
1497 unsigned short psm_pcard_loc_h; /* SPR_Postcard_Location_High 0x498 */
1498 unsigned short psm_gpio_in; /* SPR_GPIO_IN 0x49A */
1499 unsigned short psm_gpio_out; /* SPR_GPIO_OUT 0x49C */
1500 unsigned short psm_gpio_oe; /* SPR_GPIO_OUTEN 0x49E */
1501  
1502 unsigned short psm_bred_0; /* SPR_BRED0 0x4A0 */
1503 unsigned short psm_bred_1; /* SPR_BRED1 0x4A2 */
1504 unsigned short psm_bred_2; /* SPR_BRED2 0x4A4 */
1505 unsigned short psm_bred_3; /* SPR_BRED3 0x4A6 */
1506 unsigned short psm_brcl_0; /* SPR_BRCL0 0x4A8 */
1507 unsigned short psm_brcl_1; /* SPR_BRCL1 0x4AA */
1508 unsigned short psm_brcl_2; /* SPR_BRCL2 0x4AC */
1509 unsigned short psm_brcl_3; /* SPR_BRCL3 0x4AE */
1510 unsigned short psm_brpo_0; /* SPR_BRPO0 0x4B0 */
1511 unsigned short psm_brpo_1; /* SPR_BRPO1 0x4B2 */
1512 unsigned short psm_brpo_2; /* SPR_BRPO2 0x4B4 */
1513 unsigned short psm_brpo_3; /* SPR_BRPO3 0x4B6 */
1514 unsigned short psm_brwk_0; /* SPR_BRWK0 0x4B8 */
1515 unsigned short psm_brwk_1; /* SPR_BRWK1 0x4BA */
1516 unsigned short psm_brwk_2; /* SPR_BRWK2 0x4BC */
1517 unsigned short psm_brwk_3; /* SPR_BRWK3 0x4BE */
1518  
1519 unsigned short psm_base_0; /* SPR_BASE0 - Offset Register 0 0x4C0 */
1520 unsigned short psm_base_1; /* SPR_BASE1 - Offset Register 1 0x4C2 */
1521 unsigned short psm_base_2; /* SPR_BASE2 - Offset Register 2 0x4C4 */
1522 unsigned short psm_base_3; /* SPR_BASE3 - Offset Register 3 0x4C6 */
1523 unsigned short psm_base_4; /* SPR_BASE4 - Offset Register 4 0x4C8 */
1524 unsigned short psm_base_5; /* SPR_BASE5 - Offset Register 5 0x4CA */
1525 unsigned short psm_base_6; /* SPR_BASE6 - Do not use (broken) 0x4CC */
1526 unsigned short psm_pc_reg_0; /* SPR_PSM_0x4e 0x4CE */
1527 unsigned short psm_pc_reg_1; /* SPR_PC0 - Link Register 0 0x4D0 */
1528 unsigned short psm_pc_reg_2; /* SPR_PC1 - Link Register 1 0x4D2 */
1529 unsigned short psm_pc_reg_3; /* SPR_PC2 - Link Register 2 0x4D4 */
1530 unsigned short PAD; /* SPR_PC2 - Link Register 6 0x4D6 */
1531 unsigned short PAD; /* SPR_PSM_COND - PSM external condition bits 0x4D8 */
1532 unsigned short PAD; /* SPR_PSM_0x5a ... 0x7e 0x4DA */
1533 unsigned short PAD; /* SPR_PSM_0x5c 0x4DC */
1534 unsigned short PAD; /* SPR_PSM_0x5e 0x4DE */
1535 unsigned short PAD; /* SPR_PSM_0x60 0x4E0 */
1536 unsigned short PAD; /* SPR_PSM_0x62 0x4E2 */
1537 unsigned short PAD; /* SPR_PSM_0x64 0x4E4 */
1538 unsigned short PAD; /* SPR_PSM_0x66 0x4E6 */
1539 unsigned short PAD; /* SPR_PSM_0x68 0x4E8 */
1540 unsigned short PAD; /* SPR_PSM_0x6a 0x4EA */
1541 unsigned short PAD; /* SPR_PSM_0x6c 0x4EC */
1542 unsigned short PAD; /* SPR_PSM_0x6e 0x4EE */
1543 unsigned short psm_corectlsts; /* SPR_PSM_0x70 0x4F0 *//* Corerev >= 13 */
1544 unsigned short PAD; /* SPR_PSM_0x72 0x4F2 */
1545 unsigned short PAD; /* SPR_PSM_0x74 0x4F4 */
1546 unsigned short PAD; /* SPR_PSM_0x76 0x4F6 */
1547 unsigned short PAD; /* SPR_PSM_0x78 0x4F8 */
1548 unsigned short PAD; /* SPR_PSM_0x7a 0x4FA */
1549 unsigned short PAD; /* SPR_PSM_0x7c 0x4FC */
1550 unsigned short PAD; /* SPR_PSM_0x7e 0x4FE */
1551  
1552 /* TXE0 Block *//* 0x500 - 0x580 */
1553 unsigned short txe_ctl; /* SPR_TXE0_CTL 0x500 */
1554 unsigned short txe_aux; /* SPR_TXE0_AUX 0x502 */
1555 unsigned short txe_ts_loc; /* SPR_TXE0_TS_LOC 0x504 */
1556 unsigned short txe_time_out; /* SPR_TXE0_TIMEOUT 0x506 */
1557 unsigned short txe_wm_0; /* SPR_TXE0_WM0 0x508 */
1558 unsigned short txe_wm_1; /* SPR_TXE0_WM1 0x50A */
1559 unsigned short txe_phyctl; /* SPR_TXE0_PHY_CTL 0x50C */
1560 unsigned short txe_status; /* SPR_TXE0_STATUS 0x50E */
1561 unsigned short txe_mmplcp0; /* SPR_TXE0_0x10 0x510 */
1562 unsigned short txe_mmplcp1; /* SPR_TXE0_0x12 0x512 */
1563 unsigned short txe_phyctl1; /* SPR_TXE0_0x14 0x514 */
1564  
1565 unsigned short PAD; /* SPR_TXE0_0x16 0x516 */
1566 unsigned short PAD; /* SPR_TX_STATUS0 0x518 */
1567 unsigned short PAD; /* SPR_TX_STATUS1 0x51a */
1568 unsigned short PAD; /* SPR_TX_STATUS2 0x51c */
1569 unsigned short PAD; /* SPR_TX_STATUS3 0x51e */
1570  
1571 /* Transmit control */
1572 unsigned short xmtfifodef; /* SPR_TXE0_FIFO_Def 0x520 */
1573 unsigned short xmtfifo_frame_cnt; /* SPR_TXE0_0x22 0x522 *//* Corerev >= 16 */
1574 unsigned short xmtfifo_byte_cnt; /* SPR_TXE0_0x24 0x524 *//* Corerev >= 16 */
1575 unsigned short xmtfifo_head; /* SPR_TXE0_0x26 0x526 *//* Corerev >= 16 */
1576 unsigned short xmtfifo_rd_ptr; /* SPR_TXE0_0x28 0x528 *//* Corerev >= 16 */
1577 unsigned short xmtfifo_wr_ptr; /* SPR_TXE0_0x2a 0x52A *//* Corerev >= 16 */
1578 unsigned short xmtfifodef1; /* SPR_TXE0_0x2c 0x52C *//* Corerev >= 16 */
1579  
1580 unsigned short PAD; /* SPR_TXE0_0x2e 0x52E */
1581 unsigned short PAD; /* SPR_TXE0_0x30 0x530 */
1582 unsigned short PAD; /* SPR_TXE0_0x32 0x532 */
1583 unsigned short PAD; /* SPR_TXE0_0x34 0x534 */
1584 unsigned short PAD; /* SPR_TXE0_0x36 0x536 */
1585 unsigned short PAD; /* SPR_TXE0_0x38 0x538 */
1586 unsigned short PAD; /* SPR_TXE0_0x3a 0x53A */
1587 unsigned short PAD; /* SPR_TXE0_0x3c 0x53C */
1588 unsigned short PAD; /* SPR_TXE0_0x3e 0x53E */
1589  
1590 unsigned short xmtfifocmd; /* SPR_TXE0_FIFO_CMD 0x540 */
1591 unsigned short xmtfifoflush; /* SPR_TXE0_FIFO_FLUSH 0x542 */
1592 unsigned short xmtfifothresh; /* SPR_TXE0_FIFO_THRES 0x544 */
1593 unsigned short xmtfifordy; /* SPR_TXE0_FIFO_RDY 0x546 */
1594 unsigned short xmtfifoprirdy; /* SPR_TXE0_FIFO_PRI_RDY 0x548 */
1595 unsigned short xmtfiforqpri; /* SPR_TXE0_FIFO_RQ_PRI 0x54A */
1596 unsigned short xmttplatetxptr; /* SPR_TXE0_Template_TX_Pointer 0x54C */
1597 unsigned short PAD; /* SPR_TXE0_0x4e 0x54E */
1598 unsigned short xmttplateptr; /* SPR_TXE0_Template_Pointer 0x550 */
1599 unsigned short smpl_clct_strptr; /* SPR_TXE0_0x52 0x552 *//* Corerev >= 22 */
1600 unsigned short smpl_clct_stpptr; /* SPR_TXE0_0x54 0x554 *//* Corerev >= 22 */
1601 unsigned short smpl_clct_curptr; /* SPR_TXE0_0x56 0x556 *//* Corerev >= 22 */
1602 unsigned short PAD; /* SPR_TXE0_0x58 0x558 */
1603 unsigned short PAD; /* SPR_TXE0_0x5a 0x55A */
1604 unsigned short PAD; /* SPR_TXE0_0x5c 0x55C */
1605 unsigned short PAD; /* SPR_TXE0_0x5e 0x55E */
1606 unsigned short xmttplatedatalo; /* SPR_TXE0_Template_Data_Low 0x560 */
1607 unsigned short xmttplatedatahi; /* SPR_TXE0_Template_Data_High 0x562 */
1608  
1609 unsigned short PAD; /* SPR_TXE0_0x64 0x564 */
1610 unsigned short PAD; /* SPR_TXE0_0x66 0x566 */
1611  
1612 unsigned short xmtsel; /* SPR_TXE0_SELECT 0x568 */
1613 unsigned short xmttxcnt; /* 0x56A */
1614 unsigned short xmttxshmaddr; /* 0x56C */
1615  
1616 unsigned short PAD[0x09]; /* 0x56E - 0x57E */
1617  
1618 /* TXE1 Block */
1619 unsigned short PAD[0x40]; /* 0x580 - 0x5FE */
1620  
1621 /* TSF Block */
1622 unsigned short PAD[0X02]; /* 0x600 - 0x602 */
1623 unsigned short tsf_cfpstrt_l; /* 0x604 */
1624 unsigned short tsf_cfpstrt_h; /* 0x606 */
1625 unsigned short PAD[0X05]; /* 0x608 - 0x610 */
1626 unsigned short tsf_cfppretbtt; /* 0x612 */
1627 unsigned short PAD[0XD]; /* 0x614 - 0x62C */
1628 unsigned short tsf_clk_frac_l; /* 0x62E */
1629 unsigned short tsf_clk_frac_h; /* 0x630 */
1630 unsigned short PAD[0X14]; /* 0x632 - 0x658 */
1631 unsigned short tsf_random; /* 0x65A */
1632 unsigned short PAD[0x05]; /* 0x65C - 0x664 */
1633 /* GPTimer 2 registers */
1634 unsigned short tsf_gpt2_stat; /* 0x666 */
1635 unsigned short tsf_gpt2_ctr_l; /* 0x668 */
1636 unsigned short tsf_gpt2_ctr_h; /* 0x66A */
1637 unsigned short tsf_gpt2_val_l; /* 0x66C */
1638 unsigned short tsf_gpt2_val_h; /* 0x66E */
1639 unsigned short tsf_gptall_stat; /* 0x670 */
1640 unsigned short PAD[0x07]; /* 0x672 - 0x67E */
1641  
1642 /* IFS Block */
1643 unsigned short ifs_sifs_rx_tx_tx; /* 0x680 */
1644 unsigned short ifs_sifs_nav_tx; /* 0x682 */
1645 unsigned short ifs_slot; /* 0x684 */
1646 unsigned short PAD; /* 0x686 */
1647 unsigned short ifs_ctl; /* 0x688 */
1648 unsigned short PAD[0x3]; /* 0x68a - 0x68F */
1649 unsigned short ifsstat; /* 0x690 */
1650 unsigned short ifsmedbusyctl; /* 0x692 */
1651 unsigned short iftxdur; /* 0x694 */
1652 unsigned short PAD[0x3]; /* 0x696 - 0x69b */
1653 /* EDCF support in dot11macs */
1654 unsigned short ifs_aifsn; /* 0x69c */
1655 unsigned short ifs_ctl1; /* 0x69e */
1656  
1657 /* slow clock registers */
1658 unsigned short scc_ctl; /* 0x6a0 */
1659 unsigned short scc_timer_l; /* 0x6a2 */
1660 unsigned short scc_timer_h; /* 0x6a4 */
1661 unsigned short scc_frac; /* 0x6a6 */
1662 unsigned short scc_fastpwrup_dly; /* 0x6a8 */
1663 unsigned short scc_per; /* 0x6aa */
1664 unsigned short scc_per_frac; /* 0x6ac */
1665 unsigned short scc_cal_timer_l; /* 0x6ae */
1666 unsigned short scc_cal_timer_h; /* 0x6b0 */
1667 unsigned short PAD; /* 0x6b2 */
1668  
1669 unsigned short PAD[0x26];
1670  
1671 /* NAV Block */
1672 unsigned short nav_ctl; /* 0x700 */
1673 unsigned short navstat; /* 0x702 */
1674 unsigned short PAD[0x3e]; /* 0x702 - 0x77E */
1675  
1676 /* WEP/PMQ Block *//* 0x780 - 0x7FE */
1677 unsigned short PAD[0x20]; /* 0x780 - 0x7BE */
1678  
1679 unsigned short wepctl; /* 0x7C0 */
1680 unsigned short wepivloc; /* 0x7C2 */
1681 unsigned short wepivkey; /* 0x7C4 */
1682 unsigned short wepwkey; /* 0x7C6 */
1683  
1684 unsigned short PAD[4]; /* 0x7C8 - 0x7CE */
1685 unsigned short pcmctl; /* 0X7D0 */
1686 unsigned short pcmstat; /* 0X7D2 */
1687 unsigned short PAD[6]; /* 0x7D4 - 0x7DE */
1688  
1689 unsigned short pmqctl; /* 0x7E0 */
1690 unsigned short pmqstatus; /* 0x7E2 */
1691 unsigned short pmqpat0; /* 0x7E4 */
1692 unsigned short pmqpat1; /* 0x7E6 */
1693 unsigned short pmqpat2; /* 0x7E8 */
1694  
1695 unsigned short pmqdat; /* 0x7EA */
1696 unsigned short pmqdator; /* 0x7EC */
1697 unsigned short pmqhst; /* 0x7EE */
1698 unsigned short pmqpath0; /* 0x7F0 */
1699 unsigned short pmqpath1; /* 0x7F2 */
1700 unsigned short pmqpath2; /* 0x7F4 */
1701 unsigned short pmqdath; /* 0x7F6 */
1702  
1703 unsigned short PAD[0x04]; /* 0x7F8 - 0x7FE */
1704  
1705 /* SHM *//* 0x800 - 0xEFE */
1706 unsigned short PAD[0x380]; /* 0x800 - 0xEFE */
1707 } __attribute__((packed));
1708  
1709 /*== maccontrol register ==*/
1710 #define MCTL_GMODE (1U << 31)
1711 #define MCTL_DISCARD_PMQ (1 << 30)
1712 #define MCTL_WAKE (1 << 26)
1713 #define MCTL_HPS (1 << 25)
1714 #define MCTL_PROMISC (1 << 24)
1715 #define MCTL_KEEPBADFCS (1 << 23)
1716 #define MCTL_KEEPCONTROL (1 << 22)
1717 #define MCTL_PHYLOCK (1 << 21)
1718 #define MCTL_BCNS_PROMISC (1 << 20)
1719 #define MCTL_LOCK_RADIO (1 << 19)
1720 #define MCTL_AP (1 << 18)
1721 #define MCTL_INFRA (1 << 17)
1722 #define MCTL_BIGEND (1 << 16)
1723 #define MCTL_GPOUT_SEL_MASK (3 << 14)
1724 #define MCTL_GPOUT_SEL_SHIFT 14
1725 #define MCTL_EN_PSMDBG (1 << 13)
1726 #define MCTL_IHR_EN (1 << 10)
1727 #define MCTL_SHM_UPPER (1 << 9)
1728 #define MCTL_SHM_EN (1 << 8)
1729 #define MCTL_PSM_JMP_0 (1 << 2)
1730 #define MCTL_PSM_RUN (1 << 1)
1731 #define MCTL_EN_MAC (1 << 0)
1732  
1733  
1734 struct ethernet_header {
1735 uint8 dst[6];
1736 uint8 src[6];
1737 uint16 type;
1738 } __attribute__((packed));
1739  
1740 struct ipv6_header {
1741 uint32 version_traffic_class_flow_label;
1742 uint16 payload_length;
1743 uint8 next_header;
1744 uint8 hop_limit;
1745 uint8 src_ip[16];
1746 uint8 dst_ip[16];
1747 } __attribute__((packed));
1748  
1749 struct ip_header {
1750 uint8 version_ihl;
1751 uint8 dscp_ecn;
1752 uint16 total_length;
1753 uint16 identification;
1754 uint16 flags_fragment_offset;
1755 uint8 ttl;
1756 uint8 protocol;
1757 uint16 header_checksum;
1758 union {
1759 uint32 integer;
1760 uint8 array[4];
1761 } src_ip;
1762 union {
1763 uint32 integer;
1764 uint8 array[4];
1765 } dst_ip;
1766 } __attribute__((packed));
1767  
1768 struct udp_header {
1769 uint16 src_port;
1770 uint16 dst_port;
1771 union {
1772 uint16 length; /* UDP: length of UDP header and payload */
1773 uint16 checksum_coverage; /* UDPLITE: checksum_coverage */
1774 } len_chk_cov;
1775 uint16 checksum;
1776 } __attribute__((packed));
1777  
1778 struct ethernet_ip_udp_header {
1779 struct ethernet_header ethernet;
1780 struct ip_header ip;
1781 struct udp_header udp;
1782 } __attribute__((packed));
1783  
1784 typedef void (*to_fun_t)(void *arg);
1785  
1786 typedef struct _ctimeout {
1787 struct _ctimeout *next;
1788 uint32 ms;
1789 to_fun_t fun;
1790 void *arg;
1791 bool expired;
1792 } ctimeout_t;
1793  
1794  
1795 struct hndrte_timer
1796 {
1797 uint32 *context; /* first field so address of context is timer struct ptr */
1798 void *data;
1799 void (*mainfn)(struct hndrte_timer *);
1800 void (*auxfn)(void *context);
1801 ctimeout_t t;
1802 int interval;
1803 int set;
1804 int periodic;
1805 bool _freedone;
1806 } __attribute__((packed));
1807  
1808 struct tdls_iovar {
1809 uint8 ea[6];
1810 uint8 mode; /* mode: depends on iovar */
1811 uint8 chanspec[2];
1812 uint8 PAD;
1813 uint8 PAD;
1814 uint8 PAD;
1815 uint8 PAD;
1816 uint8 PAD;
1817 uint8 PAD;
1818 uint8 PAD;
1819 } __attribute__((packed));
1820  
1821 /*
1822 struct bdc_ethernet_ip_udp_header {
1823 struct bdc_header bdc;
1824 struct ethernet_header ethernet;
1825 struct ip_header ip;
1826 struct udp_header udp;
1827 } __attribute__((packed));
1828  
1829 struct bdc_ethernet_ipv6_udp_header {
1830 struct bdc_header bdc;
1831 struct ethernet_header ethernet;
1832 struct ipv6_header ipv6;
1833 struct udp_header udp;
1834 uint8 payload[1];
1835 } __attribute__((packed));
1836 */
1837  
1838 struct nexmon_header {
1839 uint32 hooked_fct;
1840 uint32 args[3];
1841 uint8 payload[1];
1842 } __attribute__((packed));
1843  
1844 #endif /*STRUCTS_COMMON_H */