OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | --- a/drivers/pci/host/Kconfig |
2 | +++ b/drivers/pci/host/Kconfig |
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3 | @@ -220,4 +220,9 @@ config VMD |
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4 | To compile this driver as a module, choose M here: the |
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5 | module will be called vmd. |
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6 | |||
7 | +config PCIE_OXNAS |
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8 | + bool "PLX Oxnas PCIe controller" |
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9 | + depends on ARCH_OXNAS |
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10 | + select PCIEPORTBUS |
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11 | + |
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12 | endmenu |
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13 | --- a/drivers/pci/host/Makefile |
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14 | +++ b/drivers/pci/host/Makefile |
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15 | @@ -20,6 +20,7 @@ obj-$(CONFIG_PCIE_ALTERA) += pcie-altera |
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16 | obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o |
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17 | obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o |
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18 | obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o |
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19 | +obj-$(CONFIG_PCIE_OXNAS) += pcie-oxnas.o |
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20 | obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o |
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21 | obj-$(CONFIG_VMD) += vmd.o |
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22 | |||
23 | --- a/arch/arm/boot/dts/ox820.dtsi |
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24 | +++ b/arch/arm/boot/dts/ox820.dtsi |
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25 | @@ -307,6 +307,83 @@ |
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26 | reg = <0x1000 0x1000>, |
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27 | <0x100 0x500>; |
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28 | }; |
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29 | + |
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30 | + pcie0: pcie-controller@c00000 { |
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31 | + compatible = "plxtech,nas782x-pcie"; |
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32 | + device_type = "pci"; |
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33 | + #address-cells = <3>; |
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34 | + #size-cells = <2>; |
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35 | + |
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36 | + /* flag & space bus address host address size */ |
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37 | + ranges = < 0x82000000 0 0x48000000 0x48000000 0 0x2000000 |
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38 | + 0xC2000000 0 0x4A000000 0x4A000000 0 0x1E00000 |
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39 | + 0x81000000 0 0x4BE00000 0x4BE00000 0 0x0100000 |
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40 | + 0x80000000 0 0x4BF00000 0x4BF00000 0 0x0100000>; |
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41 | + |
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42 | + bus-range = <0x00 0x7f>; |
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43 | + |
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44 | + /* cfg inbound translator phy*/ |
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45 | + reg = <0x47C00000 0x1000>, <0x47D00000 0x100>, <0x44A00000 0x10>; |
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46 | + |
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47 | + #interrupt-cells = <1>; |
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48 | + /* wild card mask, match all bus address & interrupt specifier */ |
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49 | + /* format: bus address mask, interrupt specifier mask */ |
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50 | + /* each bit 1 means need match, 0 means ignored when match */ |
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51 | + interrupt-map-mask = <0 0 0 0>; |
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52 | + /* format: a list of: bus address, interrupt specifier, |
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53 | + * parent interrupt controller & specifier */ |
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54 | + interrupt-map = <0 0 0 0 &gic 0 19 0x304>; |
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55 | + |
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56 | + gpios = <&gpio1 12 0>; |
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57 | + clocks = <&stdclk CLK_820_PCIEA>, <&pllb>; |
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58 | + clock-names = "pcie", "busclk"; |
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59 | + resets = <&reset RESET_PCIEA>, <&reset RESET_PCIEPHY>; |
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60 | + reset-names = "pcie", "phy"; |
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61 | + |
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62 | + plxtech,pcie-hcsl-bit = <2>; |
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63 | + plxtech,pcie-ctrl-offset = <0x120>; |
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64 | + plxtech,pcie-outbound-offset = <0x138>; |
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65 | + status = "disabled"; |
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66 | + }; |
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67 | + |
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68 | + pcie1: pcie-controller@e00000 { |
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69 | + compatible = "plxtech,nas782x-pcie"; |
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70 | + device_type = "pci"; |
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71 | + #address-cells = <3>; |
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72 | + #size-cells = <2>; |
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73 | + |
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74 | + /* flag & space bus address host address size */ |
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75 | + ranges = < 0x82000000 0 0x4C000000 0x4C000000 0 0x2000000 |
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76 | + 0xC2000000 0 0x4E000000 0x4E000000 0 0x1E00000 |
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77 | + 0x81000000 0 0x4FE00000 0x4FE00000 0 0x0100000 |
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78 | + 0x80000000 0 0x4FF00000 0x4FF00000 0 0x0100000>; |
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79 | + |
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80 | + bus-range = <0x80 0xff>; |
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81 | + |
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82 | + /* cfg inbound translator phy*/ |
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83 | + reg = <0x47E00000 0x1000>, <0x47F00000 0x100>, <0x44A00000 0x10>; |
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84 | + |
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85 | + #interrupt-cells = <1>; |
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86 | + /* wild card mask, match all bus address & interrupt specifier */ |
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87 | + /* format: bus address mask, interrupt specifier mask */ |
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88 | + /* each bit 1 means need match, 0 means ignored when match */ |
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89 | + interrupt-map-mask = <0 0 0 0>; |
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90 | + /* format: a list of: bus address, interrupt specifier, |
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91 | + * parent interrupt controller & specifier */ |
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92 | + interrupt-map = <0 0 0 0 &gic 0 20 0x304>; |
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93 | + |
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94 | + /* gpios = <&gpio1 12 0>; */ |
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95 | + clocks = <&stdclk CLK_820_PCIEB>, <&pllb>; |
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96 | + clock-names = "pcie", "busclk"; |
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97 | + resets = <&reset RESET_PCIEB>, <&reset RESET_PCIEPHY>; |
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98 | + reset-names = "pcie", "phy"; |
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99 | + |
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100 | + plxtech,pcie-hcsl-bit = <3>; |
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101 | + plxtech,pcie-ctrl-offset = <0x124>; |
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102 | + plxtech,pcie-outbound-offset = <0x174>; |
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103 | + status = "disabled"; |
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104 | + }; |
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105 | + |
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106 | }; |
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107 | }; |
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108 | }; |