OpenWrt – Blame information for rev 4

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Rev Author Line No. Line
4 office 1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "lantiq,falcon";
5  
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips34kc";
9 };
10 };
11  
12 aliases {
13 serial0 = &serial0;
14 serial1 = &serial1;
15 gpio0 = &gpio0;
16 gpio1 = &gpio1;
17 gpio2 = &gpio2;
18 gpio3 = &gpio3;
19 gpio4 = &gpio4;
20 };
21  
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25  
26 clocks {
27 compatible = "simple-bus";
28  
29 cpu_clk: cpu {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <400000000>;
33 clock-output-names = "cpu";
34 };
35  
36 io_clk: io {
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <200000000>;
40 clock-output-names = "io";
41 };
42  
43 fpi_clk: fpi {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <100000000>;
47 clock-output-names = "fpi";
48 };
49 };
50  
51 ebu_cs0: localbus@10000000 {
52 #address-cells = <1>;
53 #size-cells = <1>;
54 compatible = "lantiq,localbus", "simple-bus";
55 reg = <0x10000000 0x4000000>;
56 ranges = <0x0 0x10000000 0x4000000>;
57 };
58 ebu_cs1: localbus@14000000 {
59 #address-cells = <1>;
60 #size-cells = <1>;
61 compatible = "lantiq,localbus", "simple-bus";
62 reg = <0x14000000 0x4000000>;
63 ranges = <0x0 0x14000000 0x4000000>;
64 };
65  
66 ebu@18000000 {
67 compatible = "lantiq,ebu-falcon";
68 reg = <0x18000000 0x100>;
69 };
70  
71 sbs2@1D000000 {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 compatible = "lantiq,sysb2", "simple-bus";
75 reg = <0x1D000000 0x1000000>;
76 ranges = <0x0 0x1D000000 0x1000000>;
77  
78 clock_sysgpe: clock-controller@700000 {
79 compatible = "lantiq,sysgpe-falcon";
80 reg = <0x700000 0x100>;
81 #clock-cells = <1>;
82 };
83  
84 mps@4000 {
85 compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100";
86 reg = <0x4000 0x1000>;
87 interrupt-parent = <&icu0>;
88 interrupts = <154 155>;
89 lantiq,mbx = <&mpsmbx>;
90 };
91  
92 gpio0: gpio@810000 {
93 compatible = "lantiq,falcon-gpio";
94 gpio-controller;
95 #gpio-cells = <2>;
96 interrupt-controller;
97 #interrupt-cells = <2>;
98 interrupt-parent = <&icu0>;
99 interrupts = <44>;
100 reg = <0x810000 0x80>;
101 clocks = <&clock_syseth 16>;
102 };
103  
104 gpio2: gpio@810100 {
105 compatible = "lantiq,falcon-gpio";
106 gpio-controller;
107 #gpio-cells = <2>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
110 interrupt-parent = <&icu0>;
111 interrupts = <46>;
112 reg = <0x810100 0x80>;
113 clocks = <&clock_syseth 17>;
114 };
115  
116 clock_syseth: clock-controller@B00000 {
117 compatible = "lantiq,syseth-falcon";
118 reg = <0xB00000 0x100>;
119 #clock-cells = <1>;
120 };
121  
122 pad@B01000 {
123 compatible = "lantiq,pad-falcon";
124 reg = <0xB01000 0x100>;
125 lantiq,bank = <0>;
126 clocks = <&clock_syseth 20>;
127 };
128  
129 pad@B02000 {
130 compatible = "lantiq,pad-falcon";
131 reg = <0xB02000 0x100>;
132 lantiq,bank = <2>;
133 clocks = <&clock_syseth 21>;
134 };
135 };
136  
137 fpi@1E000000 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "lantiq,fpi", "simple-bus";
141 reg = <0x1E000000 0x1000000>;
142 ranges = <0x0 0x1E000000 0x1000000>;
143  
144 serial1: serial@100B00 {
145 status = "disabled";
146 compatible = "lantiq,asc";
147 reg = <0x100B00 0x100>;
148 interrupt-parent = <&icu0>;
149 interrupts = <112 113 114>;
150 line = <1>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&asc1_pins>;
153 clocks = <&clock_sys1 11>;
154 };
155  
156 serial0: serial@100C00 {
157 compatible = "lantiq,asc";
158 reg = <0x100C00 0x100>;
159 interrupt-parent = <&icu0>;
160 interrupts = <104 105 106>;
161 line = <0>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&asc0_pins>;
164 clocks = <&clock_sys1 12>;
165 };
166  
167 spi: spi@100D00 {
168 status = "disabled";
169 compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc";
170 interrupts = <22 23 24 25>;
171 interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
172 #address-cells = <1>;
173 #size-cells = <0>;
174 reg = <0x100D00 0x100>;
175 interrupt-parent = <&icu0>;
176 clocks = <&clock_sys1 13>;
177 base_cs = <1>;
178 num_cs = <2>;
179 };
180  
181 gptc@100E00 {
182 compatible = "lantiq,gptc-falcon";
183 reg = <0x100E00 0x100>;
184 };
185  
186 i2c: i2c@200000 {
187 status = "disabled";
188 #address-cells = <1>;
189 #size-cells = <0>;
190 compatible = "lantiq,lantiq-i2c";
191 reg = <0x200000 0x10000>;
192 interrupt-parent = <&icu0>;
193 interrupts = <18 19 20 21>;
194 gpios = <&gpio1 7 0 &gpio1 8 0>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&i2c_pins>;
197 clocks = <&clock_sys1 14>;
198 };
199  
200 gpio1: gpio@800100 {
201 compatible = "lantiq,falcon-gpio";
202 gpio-controller;
203 #gpio-cells = <2>;
204 interrupt-controller;
205 #interrupt-cells = <2>;
206 interrupt-parent = <&icu0>;
207 interrupts = <45>;
208 reg = <0x800100 0x100>;
209 clocks = <&clock_sys1 16>;
210 };
211  
212 gpio3: gpio@800200 {
213 compatible = "lantiq,falcon-gpio";
214 gpio-controller;
215 #gpio-cells = <2>;
216 interrupt-controller;
217 #interrupt-cells = <2>;
218 interrupt-parent = <&icu0>;
219 interrupts = <47>;
220 reg = <0x800200 0x100>;
221 clocks = <&clock_sys1 17>;
222 };
223  
224 gpio4: gpio@800300 {
225 compatible = "lantiq,falcon-gpio";
226 gpio-controller;
227 #gpio-cells = <2>;
228 interrupt-controller;
229 #interrupt-cells = <2>;
230 interrupt-parent = <&icu0>;
231 interrupts = <48>;
232 reg = <0x800300 0x100>;
233 clocks = <&clock_sys1 18>;
234 };
235  
236 pad@800400 {
237 compatible = "lantiq,pad-falcon";
238 reg = <0x800400 0x100>;
239 lantiq,bank = <1>;
240 clocks = <&clock_sys1 20>;
241 };
242  
243 pad@800500 {
244 compatible = "lantiq,pad-falcon";
245 reg = <0x800500 0x100>;
246 lantiq,bank = <3>;
247 clocks = <&clock_sys1 21>;
248 };
249  
250 pad@800600 {
251 compatible = "lantiq,pad-falcon";
252 reg = <0x800600 0x100>;
253 lantiq,bank = <4>;
254 clocks = <&clock_sys1 22>;
255 };
256  
257 status@802000 {
258 compatible = "lantiq,status-falcon";
259 reg = <0x802000 0x80>;
260 };
261  
262 clock_sys1: clock-controller@F00000 {
263 compatible = "lantiq,sys1-falcon";
264 reg = <0xF00000 0x100>;
265 #clock-cells = <1>;
266 };
267 };
268  
269 sbs0@1F000000 {
270 #address-cells = <1>;
271 #size-cells = <1>;
272 compatible = "simple-bus";
273 reg = <0x1F000000 0x400000>;
274 ranges = <0x0 0x1F000000 0x400000>;
275  
276 mpsmbx: mpsmbx@200000 {
277 reg = <0x200000 0x200>;
278 };
279 };
280  
281 sbs1@1F700000 {
282  
283 };
284  
285 biu@1F800000 {
286 #address-cells = <1>;
287 #size-cells = <1>;
288 compatible = "lantiq,biu", "simple-bus";
289 reg = <0x1F800000 0x800000>;
290 ranges = <0x0 0x1F800000 0x800000>;
291  
292 icu0: icu@80200 {
293 #interrupt-cells = <1>;
294 interrupt-controller;
295 compatible = "lantiq,icu";
296 reg = <0x80200 0x28
297 0x80228 0x28
298 0x80250 0x28
299 0x80278 0x28
300 0x802a0 0x28>;
301 };
302  
303 watchdog@803F0 {
304 compatible = "lantiq,wdt";
305 reg = <0x803F0 0x10>;
306 clocks = <&io_clk>; /* currently no effect */
307 };
308 };
309  
310 pinctrl {
311 compatible = "lantiq,pinctrl-falcon";
312 pinctrl-names = "default";
313 pinctrl-0 = <&state_default>;
314  
315 state_default: pinctrl0 {
316 /*ntr {
317 lantiq,groups = "ntr8k";
318 lantiq,function = "ntr";
319 };*/
320 hrst {
321 lantiq,groups = "hrst";
322 lantiq,function = "rst";
323 };
324 };
325  
326 asc0_pins: asc0 {
327 asc0 {
328 lantiq,groups = "asc0";
329 lantiq,function = "asc";
330 };
331 };
332 asc1_pins: asc1 {
333 asc1 {
334 lantiq,groups = "asc1";
335 lantiq,function = "asc";
336 };
337 };
338 i2c_pins: i2c {
339 i2c {
340 lantiq,groups = "i2c";
341 lantiq,function = "i2c";
342 };
343 };
344 bootled_pins: bootled {
345 bootled {
346 lantiq,groups = "bootled";
347 lantiq,function = "led";
348 };
349 };
350 ntr_ntr8k: ntr8k {
351 ntr8k {
352 lantiq,groups = "ntr8k";
353 lantiq,function = "ntr";
354 };
355 };
356 ntr_pps: pps {
357 pps {
358 lantiq,groups = "pps";
359 lantiq,function = "ntr";
360 };
361 };
362 ntr_gpio: gpio {
363 gpio {
364 lantiq,pins = "io5";
365 lantiq,mux = <1>;
366 lantiq,output = <0>;
367 };
368 };
369 slic_pins: slic {
370 slic {
371 lantiq,groups = "slic";
372 lantiq,function = "slic";
373 };
374 };
375 };
376  
377 pinselect-ntr {
378 compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr";
379 pinctrl-names = "ntr8k", "pps", "gpio";
380 pinctrl-0 = <&ntr_ntr8k>;
381 pinctrl-1 = <&ntr_pps>;
382 pinctrl-2 = <&ntr_gpio>;
383 };
384  
385 pinselect-asc1 {
386 compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1";
387 pinctrl-names = "default", "asc1";
388 pinctrl-0 = <&slic_pins>;
389 pinctrl-1 = <&asc1_pins>;
390 };
391  
392 };