OpenWrt – Blame information for rev 4
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Rev | Author | Line No. | Line |
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4 | office | 1 | #include "vr9.dtsi" |
2 | |||
3 | #include <dt-bindings/input/input.h> |
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4 | |||
5 | / { |
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6 | compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9"; |
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7 | |||
8 | chosen { |
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9 | bootargs = "console=ttyLTQ0,115200"; |
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10 | }; |
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11 | |||
12 | aliases { |
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13 | led-boot = &power_green; |
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14 | led-failsafe = &power_red; |
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15 | led-running = &power_green; |
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16 | |||
17 | led-dsl = &dsl_green; |
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18 | led-internet = &internet_green; |
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19 | led-wifi = &wireless_green; |
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20 | }; |
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21 | |||
22 | memory@0 { |
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23 | reg = <0x0 0x8000000>; |
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24 | }; |
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25 | |||
26 | fpi@10000000 { |
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27 | gpio: pinmux@E100B10 { |
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28 | pinctrl-names = "default"; |
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29 | pinctrl-0 = <&state_default>; |
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30 | |||
31 | state_default: pinmux { |
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32 | exin3 { |
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33 | lantiq,groups = "exin3"; |
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34 | lantiq,function = "exin"; |
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35 | }; |
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36 | mdio { |
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37 | lantiq,groups = "mdio"; |
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38 | lantiq,function = "mdio"; |
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39 | }; |
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40 | gphy-leds { |
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41 | lantiq,groups = "gphy0 led1", "gphy1 led1", |
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42 | "gphy0 led2", "gphy1 led2"; |
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43 | lantiq,function = "gphy"; |
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44 | lantiq,pull = <2>; |
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45 | lantiq,open-drain = <0>; |
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46 | lantiq,output = <1>; |
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47 | }; |
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48 | stp { |
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49 | lantiq,groups = "stp"; |
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50 | lantiq,function = "stp"; |
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51 | lantiq,pull = <2>; |
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52 | lantiq,open-drain = <0>; |
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53 | lantiq,output = <1>; |
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54 | }; |
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55 | pci-in { |
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56 | lantiq,groups = "req1"; |
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57 | lantiq,function = "pci"; |
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58 | lantiq,output = <0>; |
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59 | lantiq,open-drain = <1>; |
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60 | lantiq,pull = <2>; |
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61 | }; |
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62 | pci-out { |
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63 | lantiq,groups = "gnt1"; |
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64 | lantiq,function = "pci"; |
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65 | lantiq,output = <1>; |
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66 | lantiq,open-drain = <0>; |
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67 | lantiq,pull = <0>; |
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68 | }; |
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69 | pci_rst { |
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70 | lantiq,pins = "io21"; |
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71 | lantiq,output = <1>; |
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72 | lantiq,open-drain = <0>; |
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73 | lantiq,pull = <2>; |
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74 | }; |
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75 | pcie-rst { |
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76 | lantiq,pins = "io38"; |
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77 | lantiq,pull = <0>; |
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78 | lantiq,output = <1>; |
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79 | }; |
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80 | ifxhcd-rst { |
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81 | lantiq,pins = "io33"; |
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82 | lantiq,pull = <0>; |
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83 | lantiq,open-drain = <0>; |
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84 | lantiq,output = <1>; |
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85 | }; |
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86 | nand_out { |
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87 | lantiq,groups = "nand cle", "nand ale"; |
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88 | lantiq,function = "ebu"; |
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89 | lantiq,output = <1>; |
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90 | lantiq,open-drain = <0>; |
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91 | lantiq,pull = <0>; |
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92 | }; |
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93 | nand_cs1 { |
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94 | lantiq,groups = "nand cs1"; |
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95 | lantiq,function = "ebu"; |
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96 | lantiq,open-drain = <0>; |
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97 | lantiq,pull = <0>; |
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98 | }; |
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99 | }; |
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100 | }; |
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101 | |||
102 | stp: stp@E100BB0 { |
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103 | compatible = "lantiq,gpio-stp-xway"; |
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104 | reg = <0xE100BB0 0x40>; |
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105 | #gpio-cells = <2>; |
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106 | gpio-controller; |
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107 | |||
108 | lantiq,shadow = <0xffffff>; |
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109 | lantiq,groups = <0x7>; |
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110 | lantiq,dsl = <0x0>; |
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111 | lantiq,phy1 = <0x0>; |
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112 | lantiq,phy2 = <0x0>; |
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113 | }; |
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114 | |||
115 | ifxhcd@E101000 { |
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116 | status = "okay"; |
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117 | gpios = <&gpio 33 GPIO_ACTIVE_HIGH>; |
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118 | lantiq,portmask = <0x3>; |
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119 | }; |
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120 | |||
121 | ifxhcd@E106000 { |
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122 | status = "okay"; |
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123 | gpios = <&gpio 33 GPIO_ACTIVE_HIGH>; |
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124 | }; |
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125 | |||
126 | pci@E105400 { |
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127 | status = "okay"; |
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128 | gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; |
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129 | }; |
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130 | }; |
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131 | |||
132 | gphy-xrx200 { |
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133 | compatible = "lantiq,phy-xrx200"; |
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134 | firmware1 = "lantiq/xrx200_phy11g_a14.bin"; /*VR9 1.1*/ |
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135 | firmware2 = "lantiq/xrx200_phy11g_a22.bin"; /*VR9 1.2*/ |
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136 | phys = [ 00 01 ]; |
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137 | }; |
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138 | |||
139 | gpio-keys-polled { |
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140 | compatible = "gpio-keys-polled"; |
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141 | #address-cells = <1>; |
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142 | #size-cells = <0>; |
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143 | poll-interval = <100>; |
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144 | |||
145 | reset { |
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146 | label = "reset"; |
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147 | gpios = <&gpio 39 GPIO_ACTIVE_LOW>; |
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148 | linux,code = <KEY_RESTART>; |
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149 | }; |
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150 | |||
151 | rfkill { |
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152 | label = "rfkill"; |
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153 | gpios = <&gpio 1 GPIO_ACTIVE_LOW>; |
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154 | linux,code = <KEY_RFKILL>; |
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155 | }; |
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156 | }; |
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157 | |||
158 | gpio-leds { |
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159 | compatible = "gpio-leds"; |
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160 | |||
161 | internet_red { |
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162 | label = "p2812hnufx:red:internet"; |
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163 | gpios = <&stp 16 GPIO_ACTIVE_LOW>; |
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164 | }; |
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165 | internet_green: internet_green { |
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166 | label = "p2812hnufx:green:internet"; |
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167 | gpios = <&stp 17 GPIO_ACTIVE_LOW>; |
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168 | }; |
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169 | dsl_green: dsl_green { |
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170 | label = "p2812hnufx:green:dsl"; |
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171 | gpios = <&stp 18 GPIO_ACTIVE_LOW>; |
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172 | }; |
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173 | dsl_orange { |
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174 | label = "p2812hnufx:orange:dsl"; |
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175 | gpios = <&stp 19 GPIO_ACTIVE_LOW>; |
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176 | }; |
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177 | wireless_orange { |
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178 | label = "p2812hnufx:orange:wlan"; |
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179 | gpios = <&stp 20 GPIO_ACTIVE_LOW>; |
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180 | }; |
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181 | wireless_green: wireless_green { |
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182 | label = "p2812hnufx:green:wlan"; |
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183 | gpios = <&stp 21 GPIO_ACTIVE_LOW>; |
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184 | }; |
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185 | power_red: power { |
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186 | label = "p2812hnufx:red:power"; |
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187 | gpios = <&stp 22 GPIO_ACTIVE_LOW>; |
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188 | }; |
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189 | power_green: power2 { |
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190 | label = "p2812hnufx:green:power"; |
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191 | gpios = <&stp 23 GPIO_ACTIVE_LOW>; |
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192 | default-state = "keep"; |
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193 | }; |
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194 | phone1 { |
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195 | label = "p2812hnufx:green:phone"; |
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196 | gpios = <&gpio 11 GPIO_ACTIVE_LOW>; |
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197 | }; |
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198 | phone1warn { |
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199 | label = "p2812hnufx:orange:phone"; |
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200 | gpios = <&gpio 12 GPIO_ACTIVE_LOW>; |
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201 | }; |
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202 | phone2warn { |
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203 | label = "p2812hnufx:orange:phone2"; |
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204 | gpios = <&gpio 26 GPIO_ACTIVE_LOW>; |
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205 | }; |
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206 | phone2 { |
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207 | label = "p2812hnufx:green:phone2"; |
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208 | gpios = <&gpio 28 GPIO_ACTIVE_LOW>; |
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209 | }; |
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210 | }; |
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211 | }; |
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212 | |||
213 | ð0 { |
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214 | lan: interface@0 { |
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215 | compatible = "lantiq,xrx200-pdi"; |
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216 | #address-cells = <1>; |
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217 | #size-cells = <0>; |
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218 | reg = <0>; |
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219 | mac-address = [ 00 11 22 33 44 55 ]; |
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220 | lantiq,switch; |
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221 | |||
222 | ethernet@0 { |
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223 | compatible = "lantiq,xrx200-pdi-port"; |
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224 | reg = <0>; |
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225 | phy-mode = "rgmii"; |
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226 | phy-handle = <&phy0>; |
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227 | }; |
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228 | ethernet@1 { |
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229 | compatible = "lantiq,xrx200-pdi-port"; |
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230 | reg = <1>; |
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231 | phy-mode = "rgmii"; |
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232 | phy-handle = <&phy1>; |
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233 | }; |
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234 | ethernet@2 { |
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235 | compatible = "lantiq,xrx200-pdi-port"; |
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236 | reg = <2>; |
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237 | phy-mode = "gmii"; |
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238 | phy-handle = <&phy11>; |
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239 | }; |
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240 | ethernet@4 { |
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241 | compatible = "lantiq,xrx200-pdi-port"; |
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242 | reg = <4>; |
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243 | phy-mode = "gmii"; |
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244 | phy-handle = <&phy13>; |
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245 | }; |
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246 | ethernet@5 { |
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247 | compatible = "lantiq,xrx200-pdi-port"; |
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248 | reg = <5>; |
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249 | phy-mode = "rgmii"; |
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250 | phy-handle = <&phy5>; |
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251 | }; |
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252 | }; |
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253 | |||
254 | mdio@0 { |
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255 | #address-cells = <1>; |
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256 | #size-cells = <0>; |
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257 | compatible = "lantiq,xrx200-mdio"; |
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258 | |||
259 | phy0: ethernet-phy@0 { |
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260 | reg = <0x0>; |
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261 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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262 | }; |
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263 | phy1: ethernet-phy@1 { |
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264 | reg = <0x1>; |
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265 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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266 | }; |
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267 | phy5: ethernet-phy@5 { |
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268 | reg = <0x5>; |
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269 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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270 | }; |
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271 | phy11: ethernet-phy@11 { |
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272 | reg = <0x11>; |
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273 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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274 | }; |
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275 | phy13: ethernet-phy@13 { |
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276 | reg = <0x13>; |
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277 | compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; |
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278 | }; |
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279 | }; |
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280 | }; |