OpenWrt – Blame information for rev 4

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Rev Author Line No. Line
4 office 1 /dts-v1/;
2  
3 #include "vr9.dtsi"
4  
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
7  
8 / {
9 compatible = "avm,fritz3370", "lantiq,xway", "lantiq,vr9";
10 model = "Fritz!Box WLAN 3370";
11  
12 chosen {
13 bootargs = "console=ttyLTQ0,115200 ubi.mtd=1,512 root=/dev/mtdblock9";
14 };
15  
16 aliases {
17 led-boot = &power_green;
18 led-failsafe = &power_red;
19 led-running = &power_green;
20  
21 led-dsl = &dsl;
22 led-internet = &info_green;
23 led-wifi = &wifi;
24 };
25  
26 memory@0 {
27 reg = <0x0 0x8000000>;
28 };
29  
30 gpio-keys-polled {
31 compatible = "gpio-keys-polled";
32 #address-cells = <1>;
33 #size-cells = <0>;
34 poll-interval = <100>;
35 power {
36 label = "power";
37 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
38 linux,code = <KEY_POWER>;
39 };
40 /* wifi {
41 label = "wifi";
42 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
43 linux,code = <BTN_1>;
44 };*/
45 };
46  
47 gpio-leds {
48 compatible = "gpio-leds";
49  
50 power_green: power {
51 label = "fritz3370:green:power";
52 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
53 default-state = "keep";
54 };
55 power_red: power2 {
56 label = "fritz3370:red:power";
57 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
58 };
59 info_red {
60 label = "fritz3370:red:info";
61 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
62 };
63 wifi: wifi {
64 label = "fritz3370:green:wlan";
65 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
66 };
67 dsl: dsl {
68 label = "fritz3370:green:dsl";
69 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
70 };
71 lan {
72 label = "fritz3370:green:lan";
73 gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
74 };
75 info_green: info_green {
76 label = "fritz3370:green:info";
77 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
78 };
79 };
80 };
81  
82 &eth0 {
83 lan: interface@0 {
84 compatible = "lantiq,xrx200-pdi";
85 #address-cells = <1>;
86 #size-cells = <0>;
87 reg = <0>;
88 mtd-mac-address = <&urlader 0x987>;
89 mtd-mac-address-increment = <(-2)>;
90 lantiq,switch;
91  
92 ethernet@0 {
93 compatible = "lantiq,xrx200-pdi-port";
94 reg = <0>;
95 phy-mode = "rgmii";
96 phy-handle = <&phy0>;
97 gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
98 };
99 ethernet@1 {
100 compatible = "lantiq,xrx200-pdi-port";
101 reg = <1>;
102 phy-mode = "rgmii";
103 phy-handle = <&phy1>;
104 gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
105 };
106 ethernet@2 {
107 compatible = "lantiq,xrx200-pdi-port";
108 reg = <2>;
109 phy-mode = "gmii";
110 phy-handle = <&phy11>;
111 };
112 ethernet@3 {
113 compatible = "lantiq,xrx200-pdi-port";
114 reg = <4>;
115 phy-mode = "gmii";
116 phy-handle = <&phy13>;
117 };
118 };
119  
120 mdio@0 {
121 #address-cells = <1>;
122 #size-cells = <0>;
123 compatible = "lantiq,xrx200-mdio";
124 reg = <0>;
125  
126 phy0: ethernet-phy@0 {
127 reg = <0x0>;
128 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
129 };
130 phy1: ethernet-phy@1 {
131 reg = <0x1>;
132 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
133 };
134 phy11: ethernet-phy@11 {
135 reg = <0x11>;
136 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
137 };
138 phy13: ethernet-phy@13 {
139 reg = <0x13>;
140 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
141 };
142 };
143 };
144  
145 &gphy0 {
146 lantiq,gphy-mode = <GPHY_MODE_GE>;
147 };
148  
149 &gphy1 {
150 lantiq,gphy-mode = <GPHY_MODE_GE>;
151 };
152  
153 &gpio {
154 pinctrl-names = "default";
155 pinctrl-0 = <&state_default>;
156  
157 state_default: pinmux {
158 mdio {
159 lantiq,groups = "mdio";
160 lantiq,function = "mdio";
161 };
162 nand {
163 lantiq,groups = "nand cle", "nand ale",
164 "nand rd", "nand cs1", "nand rdy";
165 lantiq,function = "ebu";
166 lantiq,pull = <1>;
167 };
168 phy-rst {
169 lantiq,pins = "io37", "io44";
170 lantiq,pull = <0>;
171 lantiq,open-drain = <0>;
172 lantiq,output = <1>;
173 };
174 pcie-rst {
175 lantiq,pins = "io38";
176 lantiq,pull = <0>;
177 lantiq,output = <1>;
178 };
179 };
180 pins_spi_default: pins_spi_default {
181 spi_in {
182 lantiq,groups = "spi_di";
183 lantiq,function = "spi";
184 };
185 spi_out {
186 lantiq,groups = "spi_do", "spi_clk",
187 "spi_cs4";
188 lantiq,function = "spi";
189 lantiq,output = <1>;
190 };
191 };
192 };
193  
194 &localbus {
195 nand@1 {
196 compatible = "lantiq,nand-xway";
197 bank-width = <2>;
198 reg = <1 0x0 0x2000000>;
199 #address-cells = <1>;
200 #size-cells = <1>;
201  
202 partitions {
203 compatible = "fixed-partitions";
204 #address-cells = <1>;
205 #size-cells = <1>;
206  
207 partition@0 {
208 label = "kernel";
209 reg = <0x0 0x400000>;
210 };
211  
212 partition@400000 {
213 label = "rootfs_ubi";
214 reg = <0x400000 0x3000000>;
215 };
216  
217 partition@3400000 {
218 label = "vr9_firmware";
219 reg = <0x3400000 0x400000>;
220 };
221 partition@3800000 {
222 label = "reserved";
223 reg = <0x3800000 0x3000000>;
224 };
225 partition@6800000 {
226 label = "config";
227 reg = <0x6800000 0x200000>;
228 };
229 partition@6a00000 {
230 label = "nand-filesystem";
231 reg = <0x6a00000 0x1600000>;
232 };
233 };
234 };
235 };
236  
237 &pcie0 {
238 pcie@0 {
239 reg = <0 0 0 0 0>;
240 #interrupt-cells = <1>;
241 #size-cells = <2>;
242 #address-cells = <3>;
243 device_type = "pci";
244  
245 wifi@0,0 {
246 compatible = "pci0,0";
247 reg = <0 0 0 0 0>;
248 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
249 };
250 };
251 };
252  
253 &spi {
254 status = "okay";
255  
256 pinctrl-names = "default";
257 pinctrl-0 = <&pins_spi_default>;
258  
259 m25p80@4 {
260 #address-cells = <1>;
261 #size-cells = <1>;
262 compatible = "jedec,spi-nor";
263 reg = <4 0>;
264 spi-max-frequency = <1000000>;
265  
266 urlader: partition@0 {
267 reg = <0x0 0x20000>;
268 label = "urlader";
269 read-only;
270 };
271  
272 partition@20000 {
273 reg = <0x20000 0x10000>;
274 label = "tffs (1)";
275 read-only;
276 };
277  
278 partition@30000 {
279 reg = <0x30000 0x10000>;
280 label = "tffs (2)";
281 read-only;
282 };
283 };
284 };
285  
286 /*
287 * TODO: add phy-supply, gpio 5 GPIO_ACTIVE_HIGH and gpio 14 GPIO_ACTIVE_HIGH are
288 * related
289 */
290 &usb_phy0 {
291 status = "okay";
292 };
293  
294 &usb0 {
295 status = "okay";
296 };