OpenWrt – Blame information for rev 4

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4 office 1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 * Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 *
16 */
17  
18 #include "qcom-ipq4019.dtsi"
19 #include "qcom-ipq4019-bus.dtsi"
20 #include <dt-bindings/gpio/gpio.h>
21 #include <dt-bindings/input/input.h>
22 #include <dt-bindings/soc/qcom,tcsr.h>
23  
24 / {
25 model = "8devices Jalapeno";
26 compatible = "8dev,jalapeno", "qcom,ipq4019";
27  
28 soc {
29 mdio@90000 {
30 status = "okay";
31 pinctrl-0 = <&mdio_pins>;
32 pinctrl-names = "default";
33 };
34  
35 ess-psgmii@98000 {
36 status = "okay";
37 };
38  
39 counter@4a1000 {
40 compatible = "qcom,qca-gcnt";
41 reg = <0x4a1000 0x4>;
42 };
43  
44 tcsr@1949000 {
45 compatible = "qcom,tcsr";
46 reg = <0x1949000 0x100>;
47 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
48 };
49  
50 tcsr@194b000 {
51 /* select hostmode */
52 compatible = "qcom,tcsr";
53 reg = <0x194b000 0x100>;
54 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
55 status = "okay";
56 };
57  
58 ess_tcsr@1953000 {
59 compatible = "qcom,tcsr";
60 reg = <0x1953000 0x1000>;
61 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
62 };
63  
64 tcsr@1957000 {
65 compatible = "qcom,tcsr";
66 reg = <0x1957000 0x100>;
67 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
68 };
69  
70 usb2: usb2@60f8800 {
71 status = "okay";
72 };
73  
74 serial@78af000 {
75 pinctrl-0 = <&serial_pins>;
76 pinctrl-names = "default";
77 status = "okay";
78 };
79  
80 usb3: usb3@8af8800 {
81 status = "okay";
82 };
83  
84 crypto@8e3a000 {
85 status = "okay";
86 };
87  
88 watchdog@b017000 {
89 status = "okay";
90 };
91  
92 ess-switch@c000000 {
93 status = "okay";
94 switch_lan_bmp = <0x10>; /* lan port bitmap */
95 };
96  
97 edma@c080000 {
98 status = "okay";
99 };
100 };
101 };
102  
103 &tlmm {
104 mdio_pins: mdio_pinmux {
105 pinmux_1 {
106 pins = "gpio53";
107 function = "mdio";
108 };
109 pinmux_2 {
110 pins = "gpio52";
111 function = "mdc";
112 };
113 pinconf {
114 pins = "gpio52", "gpio53";
115 bias-pull-up;
116 };
117 };
118  
119 serial_pins: serial_pinmux {
120 mux {
121 pins = "gpio60", "gpio61";
122 function = "blsp_uart0";
123 bias-disable;
124 };
125 };
126  
127 spi_0_pins: spi_0_pinmux {
128 pin {
129 function = "blsp_spi0";
130 pins = "gpio55", "gpio56", "gpio57";
131 drive-strength = <2>;
132 bias-disable;
133 };
134 pin_cs {
135 function = "gpio";
136 pins = "gpio54", "gpio59";
137 drive-strength = <2>;
138 bias-disable;
139 output-high;
140 };
141 };
142 };
143  
144 &blsp_dma {
145 status = "okay";
146 };
147  
148 &spi_0 {
149 pinctrl-0 = <&spi_0_pins>;
150 pinctrl-names = "default";
151 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
152 status = "okay";
153  
154 m25p80@0 {
155 #address-cells = <1>;
156 #size-cells = <0>;
157 reg = <0>;
158 compatible = "jedec,spi-nor";
159 spi-max-frequency = <24000000>;
160  
161 partitions {
162 compatible = "fixed-partitions";
163 #address-cells = <1>;
164 #size-cells = <1>;
165  
166 partition0@0 {
167 label = "SBL1";
168 reg = <0x00000000 0x00040000>;
169 read-only;
170 };
171 partition1@40000 {
172 label = "MIBIB";
173 reg = <0x00040000 0x00020000>;
174 read-only;
175 };
176 partition2@60000 {
177 label = "QSEE";
178 reg = <0x00060000 0x00060000>;
179 read-only;
180 };
181 partition3@c0000 {
182 label = "CDT";
183 reg = <0x000c0000 0x00010000>;
184 read-only;
185 };
186 partition4@d0000 {
187 label = "DDRPARAMS";
188 reg = <0x000d0000 0x00010000>;
189 read-only;
190 };
191 partition5@e0000 {
192 label = "APPSBLENV"; /* uboot env*/
193 reg = <0x000e0000 0x00010000>;
194 read-only;
195 };
196 partition5@f0000 {
197 label = "APPSBL"; /* uboot */
198 reg = <0x000f0000 0x00080000>;
199 read-only;
200 };
201 partition5@170000 {
202 label = "ART";
203 reg = <0x00170000 0x00010000>;
204 read-only;
205 };
206 };
207 };
208  
209 mt29f@1 {
210 status = "okay";
211 #address-cells = <1>;
212 #size-cells = <0>;
213 compatible = "spinand,mt29f", "w25n01gv";
214 reg = <1>;
215 spi-max-frequency = <24000000>;
216 partitions {
217 compatible = "fixed-partitions";
218 #address-cells = <1>;
219 #size-cells = <1>;
220  
221 partition0@0 {
222 label = "ubi";
223 reg = <0x00000000 0x08000000>;
224 };
225 };
226 };
227 };
228  
229 &cryptobam {
230 status = "okay";
231 };
232  
233 &gmac0 {
234 qcom,poll_required = <1>;
235 qcom,poll_required_dynamic = <1>;
236 qcom,phy_mdio_addr = <3>;
237 vlan_tag = <1 0x10>;
238 };
239  
240 &gmac1 {
241 qcom,poll_required = <1>;
242 qcom,poll_required_dynamic = <1>;
243 qcom,phy_mdio_addr = <4>;
244 vlan_tag = <2 0x20>;
245 };
246  
247 &wifi0 {
248 status = "okay";
249 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
250 };
251  
252 &wifi1 {
253 status = "okay";
254 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
255 };
256  
257 &usb3_ss_phy {
258 status = "okay";
259 };
260  
261 &usb3_hs_phy {
262 status = "okay";
263 };
264  
265 &usb2_hs_phy {
266 status = "okay";
267 };