OpenWrt – Blame information for rev 4

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4 office 1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm6368";
5  
6 aliases {
7 pflash = &pflash;
8 pinctrl = &pinctrl;
9 serial0 = &uart0;
10 serial1 = &uart1;
11 spi0 = &lsspi;
12 };
13  
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17  
18 cpu@0 {
19 compatible = "brcm,bmips4350", "mips,mips4Kc";
20 device_type = "cpu";
21 reg = <0>;
22 };
23  
24 cpu@1 {
25 compatible = "brcm,bmips4350", "mips,mips4Kc";
26 device_type = "cpu";
27 reg = <1>;
28 };
29 };
30  
31 cpu_intc: interrupt-controller {
32 #address-cells = <0>;
33 compatible = "mti,cpu-interrupt-controller";
34  
35 interrupt-controller;
36 #interrupt-cells = <1>;
37 };
38  
39 memory { device_type = "memory"; reg = <0 0>; };
40  
41 ubus@10000000 {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 ranges;
45 compatible = "simple-bus";
46 interrupt-parent = <&periph_intc>;
47  
48 ext_intc0: interrupt-controller@10000018 {
49 compatible = "brcm,bcm6345-ext-intc";
50 reg = <0x10000018 0x4>;
51  
52 interrupt-controller;
53 #interrupt-cells = <2>;
54  
55 interrupts = <20>, <21>, <22>, <23>;
56 };
57  
58 ext_intc1: interrupt-controller@1000001c {
59 compatible = "brcm,bcm6345-ext-intc";
60 reg = <0x1000001c 0x4>;
61  
62 interrupt-controller;
63 #interrupt-cells = <2>;
64  
65 interrupts = <24>, <25>;
66 };
67  
68 periph_intc: interrupt-controller@10000020 {
69 compatible = "brcm,bcm6345-l1-intc";
70 reg = <0x10000020 0x10>,
71 <0x10000030 0x10>;
72  
73 interrupt-controller;
74 #interrupt-cells = <1>;
75  
76 interrupt-parent = <&cpu_intc>;
77 interrupts = <2>, <3>;
78 };
79  
80 pinctrl: pin-controller@10000080 {
81 compatible = "brcm,bcm6368-pinctrl";
82 reg = <0x10000080 0x8>,
83 <0x10000088 0x8>,
84 <0x10000098 0x4>;
85 reg-names = "dirout", "dat", "mode";
86 brcm,gpiobasemode = <&gpiobasemode>;
87  
88 gpio-controller;
89 #gpio-cells = <2>;
90  
91 interrupts-extended = <&ext_intc1 0 0>,
92 <&ext_intc1 1 0>,
93 <&ext_intc0 0 0>,
94 <&ext_intc0 1 0>,
95 <&ext_intc0 2 0>,
96 <&ext_intc0 3 0>;
97 interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
98 "gpio36", "gpio37";
99  
100 pinctrl_analog_afe_0: analog_afe_0 {
101 function = "analog_afe_0";
102 pins = "gpio0";
103 };
104  
105 pinctrl_analog_afe_1: analog_afe_1 {
106 function = "analog_afe_1";
107 pins = "gpio1";
108 };
109  
110 pinctrl_sys_irq: sys_irq {
111 function = "sys_irq";
112 pins = "gpio2";
113 };
114  
115 pinctrl_serial_led: serial_led {
116 pinctrl_serial_led_data: serial_led_data {
117 function = "serial_led_data";
118 pins = "gpio3";
119 };
120  
121 pinctrl_serial_led_clk: serial_led_clk {
122 function = "serial_led_clk";
123 pins = "gpio4";
124 };
125 };
126  
127 pinctrl_inet_led: inet_led {
128 function = "inet_led";
129 pins = "gpio5";
130 };
131  
132 pinctrl_ephy0_led: ephy0_led {
133 function = "ephy0_led";
134 pins = "gpio6";
135 };
136  
137 pinctrl_ephy1_led: ephy1_led {
138 function = "ephy1_led";
139 pins = "gpio7";
140 };
141  
142 pinctrl_ephy2_led: ephy2_led {
143 function = "ephy2_led";
144 pins = "gpio8";
145 };
146  
147 pinctrl_ephy3_led: ephy3_led {
148 function = "ephy3_led";
149 pins = "gpio9";
150 };
151  
152 pinctrl_robosw_led_data: robosw_led_data {
153 function = "robosw_led_data";
154 pins = "gpio10";
155 };
156  
157 pinctrl_robosw_led_clk: robosw_led_clk {
158 function = "robosw_led_clk";
159 pins = "gpio11";
160 };
161  
162 pinctrl_robosw_led0: robosw_led0 {
163 function = "robosw_led0";
164 pins = "gpio12";
165 };
166  
167 pinctrl_robosw_led1: robosw_led1 {
168 function = "robosw_led1";
169 pins = "gpio13";
170 };
171  
172 pinctrl_usb_device_led: usb_device_led {
173 function = "usb_device_led";
174 pins = "gpio14";
175 };
176  
177 pinctrl_pci: pci {
178 pinctrl_pci_req1: pci_req1 {
179 function = "pci_req1";
180 pins = "gpio16";
181 };
182  
183 pinctrl_pci_gnt1: pci_gnt1 {
184 function = "pci_gnt1";
185 pins = "gpio17";
186 };
187  
188 pinctrl_pci_intb: pci_intb {
189 function = "pci_intb";
190 pins = "gpio18";
191 };
192  
193 pinctrl_pci_req0: pci_req0 {
194 function = "pci_req0";
195 pins = "gpio19";
196 };
197  
198 pinctrl_pci_gnt0: pci_gnt0 {
199 function = "pci_gnt0";
200 pins = "gpio20";
201 };
202 };
203  
204 pinctrl_pcmcia: pcmcia {
205 pinctrl_pcmcia_cd1: pcmcia_cd1 {
206 function = "pcmcia_cd1";
207 pins = "gpio22";
208 };
209  
210 pinctrl_pcmcia_cd2: pcmcia_cd2 {
211 function = "pcmcia_cd2";
212 pins = "gpio23";
213 };
214  
215 pinctrl_pcmcia_vs1: pcmcia_vs1 {
216 function = "pcmcia_vs1";
217 pins = "gpio24";
218 };
219  
220 pinctrl_pcmcia_vs2: pcmcia_vs2 {
221 function = "pcmcia_vs2";
222 pins = "gpio25";
223 };
224 };
225  
226 pinctrl_ebi_cs2: ebi_cs2 {
227 function = "ebi_cs2";
228 pins = "gpio26";
229 };
230  
231 pinctrl_ebi_cs3: ebi_cs3 {
232 function = "ebi_cs2";
233 pins = "gpio27";
234 };
235  
236 pinctrl_spi_cs2: spi_cs2 {
237 function = "spi_cs2";
238 pins = "gpio28";
239 };
240  
241 pinctrl_spi_cs3: spi_cs3 {
242 function = "spi_cs3";
243 pins = "gpio29";
244 };
245  
246 pinctrl_spi_cs4: spi_cs4 {
247 function = "spi_cs4";
248 pins = "gpio30";
249 };
250  
251 pinctrl_spi_cs5: spi_cs5 {
252 function = "spi_cs5";
253 pins = "gpio31";
254 };
255  
256 pinctrl_uart1: uart1 {
257 function = "uart1";
258 group = "uart1_grp";
259 };
260 };
261  
262 gpiobasemode: gpiobasemode@100000b8 {
263 compatible = "brcm,bcm6368-gpiobasemode", "syscon";
264 reg = <0x100000b8 0x4>;
265 };
266  
267 leds: led-controller@100000d0 {
268 #address-cells = <1>;
269 #size-cells = <0>;
270 compatible = "brcm,bcm6358-leds";
271 reg = <0x100000d0 0x8>;
272 status = "disabled";
273 };
274  
275 uart0: serial@10000100 {
276 compatible = "brcm,bcm6345-uart";
277 reg = <0x10000100 0x18>;
278  
279 interrupt-parent = <&periph_intc>;
280 interrupts = <2>;
281  
282 /* clocks = <&periph_clk>; */
283 /* clock-names = "refclk"; */
284  
285 status = "disabled";
286 };
287  
288 uart1: serial@10000120 {
289 compatible = "brcm,bcm6345-uart";
290 reg = <0x10000120 0x18>;
291  
292 interrupt-parent = <&periph_intc>;
293 interrupts = <3>;
294  
295 /* clocks = <&periph_clk>; */
296 /* clock-names = "refclk"; */
297  
298 status = "disabled";
299 };
300  
301 lsspi: spi@10000800 {
302 #address-cells = <1>;
303 #size-cells = <0>;
304 compatible = "brcm,bcm6358-spi";
305 reg = <0x10000800 0x70c>;
306 interrupts = <1>;
307 /* clocks = <&clkctl 9>; */
308 };
309 };
310  
311 pflash: nor@18000000 {
312 compatible = "cfi-flash";
313 reg = <0x18000000 0x2000000>;
314 bank-width = <2>;
315 #address-cells = <1>;
316 #size-cells = <1>;
317 status = "disabled";
318 };
319 };